diff --git a/Ryujinx.Core/OsHle/Services/Nv/NvGpuGpu/NvGpuGpuGetTpcMasks.cs b/Ryujinx.Core/OsHle/Services/Nv/NvGpuGpu/NvGpuGpuGetTpcMasks.cs
index 686649127f..04c4c9cd47 100644
--- a/Ryujinx.Core/OsHle/Services/Nv/NvGpuGpu/NvGpuGpuGetTpcMasks.cs
+++ b/Ryujinx.Core/OsHle/Services/Nv/NvGpuGpu/NvGpuGpuGetTpcMasks.cs
@@ -5,6 +5,7 @@
         public int  MaskBufferSize;
         public int  Reserved;
         public long MaskBufferAddress;
-        public long Unk;
+        public int  TpcMask;
+        public int  Padding;
     }
 }
diff --git a/Ryujinx.Core/OsHle/Services/Nv/NvGpuGpu/NvGpuGpuIoctl.cs b/Ryujinx.Core/OsHle/Services/Nv/NvGpuGpu/NvGpuGpuIoctl.cs
index 9af9ad5971..b34d346b51 100644
--- a/Ryujinx.Core/OsHle/Services/Nv/NvGpuGpu/NvGpuGpuIoctl.cs
+++ b/Ryujinx.Core/OsHle/Services/Nv/NvGpuGpu/NvGpuGpuIoctl.cs
@@ -140,7 +140,14 @@ namespace Ryujinx.Core.OsHle.Services.Nv.NvGpuGpu
             long InputPosition  = Context.Request.GetBufferType0x21Position();
             long OutputPosition = Context.Request.GetBufferType0x22Position();
 
-            Context.Ns.Log.PrintStub(LogClass.ServiceNv, "Stubbed.");
+            NvGpuGpuGetTpcMasks Args = AMemoryHelper.Read<NvGpuGpuGetTpcMasks>(Context.Memory, InputPosition);
+
+            if (Args.MaskBufferSize != 0)
+            {
+                Args.TpcMask = 3;
+            }
+
+            AMemoryHelper.Write(Context.Memory, OutputPosition, Args);
 
             return NvResult.Success;
         }