From b7a48c422aa7293525909ac7b32575bce8575bde Mon Sep 17 00:00:00 2001
From: Tony Wasserka <NeoBrainX@gmail.com>
Date: Sun, 21 Dec 2014 02:49:45 +0100
Subject: [PATCH] Pica/CommandProcessor: Add support for integer uniforms.
---
src/video_core/command_processor.cpp | 13 +++++++++++++
src/video_core/pica.h | 10 +++++++++-
src/video_core/vertex_shader.cpp | 7 +++++++
src/video_core/vertex_shader.h | 1 +
4 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp
index 9602779f4..9e1975ddb 100644
--- a/src/video_core/command_processor.cpp
+++ b/src/video_core/command_processor.cpp
@@ -173,6 +173,19 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
break;
+ case PICA_REG_INDEX_WORKAROUND(vs_int_uniforms[0], 0x2b1):
+ case PICA_REG_INDEX_WORKAROUND(vs_int_uniforms[1], 0x2b2):
+ case PICA_REG_INDEX_WORKAROUND(vs_int_uniforms[2], 0x2b3):
+ case PICA_REG_INDEX_WORKAROUND(vs_int_uniforms[3], 0x2b4):
+ {
+ int index = (id - PICA_REG_INDEX_WORKAROUND(vs_int_uniforms[0], 0x2b1));
+ auto values = registers.vs_int_uniforms[index];
+ VertexShader::GetIntUniform(index) = Math::Vec4<u8>(values.x, values.y, values.z, values.w);
+ LOG_ERROR(HW_GPU, "Set integer uniform %d to %02x %02x %02x %02x",
+ index, values.x.Value(), values.y.Value(), values.z.Value(), values.w.Value());
+ break;
+ }
+
case PICA_REG_INDEX_WORKAROUND(vs_uniform_setup.set_value[0], 0x2c1):
case PICA_REG_INDEX_WORKAROUND(vs_uniform_setup.set_value[1], 0x2c2):
case PICA_REG_INDEX_WORKAROUND(vs_uniform_setup.set_value[2], 0x2c3):
diff --git a/src/video_core/pica.h b/src/video_core/pica.h
index 38bac748c..f518cc98b 100644
--- a/src/video_core/pica.h
+++ b/src/video_core/pica.h
@@ -495,8 +495,14 @@ struct Regs {
INSERT_PADDING_WORDS(0x51);
BitField<0, 16, u32> vs_bool_uniforms;
+ union {
+ BitField< 0, 8, u32> x;
+ BitField< 8, 8, u32> y;
+ BitField<16, 8, u32> z;
+ BitField<24, 8, u32> w;
+ } vs_int_uniforms[4];
- INSERT_PADDING_WORDS(0x9);
+ INSERT_PADDING_WORDS(0x5);
// Offset to shader program entry point (in words)
BitField<0, 16, u32> vs_main_offset;
@@ -625,6 +631,7 @@ struct Regs {
ADD_FIELD(trigger_draw_indexed);
ADD_FIELD(triangle_topology);
ADD_FIELD(vs_bool_uniforms);
+ ADD_FIELD(vs_int_uniforms);
ADD_FIELD(vs_main_offset);
ADD_FIELD(vs_input_register_map);
ADD_FIELD(vs_uniform_setup);
@@ -696,6 +703,7 @@ ASSERT_REG_POSITION(trigger_draw, 0x22e);
ASSERT_REG_POSITION(trigger_draw_indexed, 0x22f);
ASSERT_REG_POSITION(triangle_topology, 0x25e);
ASSERT_REG_POSITION(vs_bool_uniforms, 0x2b0);
+ASSERT_REG_POSITION(vs_int_uniforms, 0x2b1);
ASSERT_REG_POSITION(vs_main_offset, 0x2ba);
ASSERT_REG_POSITION(vs_input_register_map, 0x2bb);
ASSERT_REG_POSITION(vs_uniform_setup, 0x2c0);
diff --git a/src/video_core/vertex_shader.cpp b/src/video_core/vertex_shader.cpp
index bed5081a0..090ffd420 100644
--- a/src/video_core/vertex_shader.cpp
+++ b/src/video_core/vertex_shader.cpp
@@ -30,6 +30,8 @@ static struct {
Math::Vec4<float24> f[96];
std::array<bool,16> b;
+
+ std::array<Math::Vec4<u8>,4> i;
} shader_uniforms;
// TODO: Not sure where the shader binary and swizzle patterns are supposed to be loaded to!
@@ -57,6 +59,11 @@ bool& GetBoolUniform(u32 index)
return shader_uniforms.b[index];
}
+Math::Vec4<u8>& GetIntUniform(u32 index)
+{
+ return shader_uniforms.i[index];
+}
+
const std::array<u32, 1024>& GetShaderBinary()
{
return shader_memory;
diff --git a/src/video_core/vertex_shader.h b/src/video_core/vertex_shader.h
index af3fb2a2f..3a68a3409 100644
--- a/src/video_core/vertex_shader.h
+++ b/src/video_core/vertex_shader.h
@@ -73,6 +73,7 @@ OutputVertex RunShader(const InputVertex& input, int num_attributes);
Math::Vec4<float24>& GetFloatUniform(u32 index);
bool& GetBoolUniform(u32 index);
+Math::Vec4<u8>& GetIntUniform(u32 index);
const std::array<u32, 1024>& GetShaderBinary();
const std::array<u32, 1024>& GetSwizzlePatterns();