Initial PhobGCC v2.0 Commit
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# Ignore list for KiCAD Projects
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# Temporary files
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*.000
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*.bak
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*.bck
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*.kicad_pcb-bak
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*.sch-bak
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*.kicad_sch-bak
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*~
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*.kicad_prl
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*-backups*
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_autosave-*
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*.tmp
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*-save.pro
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*-save.kicad_pcb
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fp-lib-table
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fp-info-cache
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sym-lib-table
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# Netlist files (exported from Eeschema)
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*.net
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*.xml
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# Autorouter files (exported from Pcbnew)
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*.dsn
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*.ses
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# Fabrication Outputs
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*.gb*
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*.gt*
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*.gm*
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*.drl
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*BOM.csv
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*pos.csv
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*.rar
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PCB/KiCAD/PhobGCC_2_0_0_footprints.pretty/Ghost Logo 2.kicad_mod
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743
PCB/KiCAD/PhobGCC_2_0_0_footprints.pretty/Ghost Logo 2.kicad_mod
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
(fp_line (start -2.725 -2.725) (end -2.725 -2.465) (layer "F.SilkS") (width 0.12) (tstamp 9bed23d0-38c4-4cff-8328-7db371b53406))
|
||||
(fp_line (start 0 -2.725) (end -2.725 -2.725) (layer "F.SilkS") (width 0.12) (tstamp a3ba0e13-eede-4fe7-8cc9-c668b8d102d4))
|
||||
(fp_line (start 2.725 2.725) (end 2.725 2.465) (layer "F.SilkS") (width 0.12) (tstamp f7be8250-c839-4d1a-af3d-6b159a01931f))
|
||||
(fp_line (start 4.65 -2.86) (end -4.65 -2.86) (layer "F.CrtYd") (width 0.05) (tstamp 12d35bcf-8dc6-47ca-8d02-22e12bfe7994))
|
||||
(fp_line (start -4.65 2.86) (end 4.65 2.86) (layer "F.CrtYd") (width 0.05) (tstamp 1c0fb223-99fb-45c8-a5ed-30b097223e72))
|
||||
(fp_line (start 4.65 2.86) (end 4.65 -2.86) (layer "F.CrtYd") (width 0.05) (tstamp 3262db9e-49bd-4d55-8a8c-68c2188d903b))
|
||||
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|
||||
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|
||||
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|
||||
(fp_line (start 2.615 -2.615) (end 2.615 2.615) (layer "F.Fab") (width 0.1) (tstamp acc3cdc7-a9aa-4cb1-afb9-886502fdcb93))
|
||||
(fp_line (start -2.615 2.615) (end -2.615 -1.615) (layer "F.Fab") (width 0.1) (tstamp ae55856e-53ed-4507-979a-9ab50aadf120))
|
||||
(fp_line (start -1.615 -2.615) (end 2.615 -2.615) (layer "F.Fab") (width 0.1) (tstamp fdc2d5a2-94f1-4ebb-b648-bcebc4f0b2d1))
|
||||
(pad "1" smd roundrect (at -3.6 -1.905) (size 1.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 45d7e082-8d10-48cc-a4fa-9fa31ab1b3db))
|
||||
(pad "2" smd roundrect (at -3.6 -0.635) (size 1.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 7c722639-abd2-4754-ab43-ded4ad98397e))
|
||||
(pad "3" smd roundrect (at -3.6 0.635) (size 1.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp ffa8a20f-3798-40ec-b8c2-71f70c9d01dd))
|
||||
(pad "4" smd roundrect (at -3.6 1.905) (size 1.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 4f80a102-6efc-4637-9cc0-d7b0f21a1261))
|
||||
(pad "5" smd roundrect (at 3.6 1.905) (size 1.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp a8813b9a-0349-428c-8553-5b80f43a780d))
|
||||
(pad "6" smd roundrect (at 3.6 0.635) (size 1.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp acc2e8fb-e11c-49f1-a2a0-b8385d23f232))
|
||||
(pad "7" smd roundrect (at 3.6 -0.635) (size 1.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 5d4f7cd9-b0bd-4ca3-8df2-43dbe54bf2bf))
|
||||
(pad "8" smd roundrect (at 3.6 -1.905) (size 1.6 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 4b115f55-fc32-48c6-b52c-ecb1a97ea5c7))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-8_5.23x5.23mm_P1.27mm.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
|
@ -0,0 +1,43 @@
|
|||
(footprint "SOT-223-3_TabPin2" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 5A02FF57)
|
||||
(descr "module CMS SOT223 4 pins")
|
||||
(tags "CMS SOT")
|
||||
(property "Sheetfile" "PhobGCC_2_0_0_proto_1.kicad_sch")
|
||||
(property "Sheetname" "")
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 0 -4.5) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp a306710c-a691-4985-b591-d63df8416f9d)
|
||||
)
|
||||
(fp_text value "AMS1117-3.3" (at 0 4.5) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
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||||
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|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab")
|
||||
(effects (font (size 0.8 0.8) (thickness 0.12)))
|
||||
(tstamp 6c1b95b6-c2e1-4d2f-a5a7-ca741f955128)
|
||||
)
|
||||
(fp_line (start 1.91 -3.41) (end 1.91 -2.15) (layer "F.SilkS") (width 0.12) (tstamp 0fa22346-f6ed-4c72-8be2-b42b01bac380))
|
||||
(fp_line (start -4.1 -3.41) (end 1.91 -3.41) (layer "F.SilkS") (width 0.12) (tstamp 850816ba-3666-4b68-bfb9-2115dcdf4e63))
|
||||
(fp_line (start -1.85 3.41) (end 1.91 3.41) (layer "F.SilkS") (width 0.12) (tstamp e0ddff53-5eca-4df2-96c4-ab0b1374ca35))
|
||||
(fp_line (start 1.91 3.41) (end 1.91 2.15) (layer "F.SilkS") (width 0.12) (tstamp e9449625-b4f9-471c-ab7f-58059d5495df))
|
||||
(fp_line (start -4.4 3.6) (end 4.4 3.6) (layer "F.CrtYd") (width 0.05) (tstamp 08657fb8-3af6-42ba-a926-353e5ee38abf))
|
||||
(fp_line (start -4.4 -3.6) (end -4.4 3.6) (layer "F.CrtYd") (width 0.05) (tstamp 451efcea-71b1-4309-b58a-3ba1fe3d3972))
|
||||
(fp_line (start 4.4 -3.6) (end -4.4 -3.6) (layer "F.CrtYd") (width 0.05) (tstamp 5f67d520-2915-47b2-a22f-9df3cd373fd5))
|
||||
(fp_line (start 4.4 3.6) (end 4.4 -3.6) (layer "F.CrtYd") (width 0.05) (tstamp f5116d8d-6d96-44e5-9439-6fcd3ed02036))
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||||
(fp_line (start -1.85 3.35) (end 1.85 3.35) (layer "F.Fab") (width 0.1) (tstamp 1313e62c-58a5-427c-bf0e-2c898bc069cb))
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||||
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|
||||
(fp_line (start -1.85 -2.35) (end -0.85 -3.35) (layer "F.Fab") (width 0.1) (tstamp d4168513-42a8-49a9-ad8e-17cad31c5275))
|
||||
(fp_line (start -1.85 -2.35) (end -1.85 3.35) (layer "F.Fab") (width 0.1) (tstamp e15fddf1-d3b8-42b5-8828-baae673289f1))
|
||||
(fp_line (start 1.85 -3.35) (end 1.85 3.35) (layer "F.Fab") (width 0.1) (tstamp ff4b49be-bb35-4797-ad9b-43b41b3763b3))
|
||||
(pad "1" smd rect (at -3.15 -2.3) (size 2 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 92e3bb07-0718-4f0d-ba19-047b169e89cf))
|
||||
(pad "2" smd rect (at -3.15 0) (size 2 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 234cc188-546d-41bb-b97a-721de78dbcc7))
|
||||
(pad "2" smd rect (at 3.15 0) (size 2 3.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 23660f70-bc2d-4e80-814b-843bfbe44800))
|
||||
(pad "3" smd rect (at -3.15 2.3) (size 2 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 77f0cdc1-bc76-45c0-a77b-a476ff420f8c))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Package_TO_SOT_SMD.3dshapes/SOT-223.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
43
PCB/KiCAD/PhobGCC_2_0_0_footprints.pretty/SOT-23.kicad_mod
Normal file
43
PCB/KiCAD/PhobGCC_2_0_0_footprints.pretty/SOT-23.kicad_mod
Normal file
|
@ -0,0 +1,43 @@
|
|||
(footprint "SOT-23" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 5FA16958)
|
||||
(descr "SOT, 3 Pin (https://www.jedec.org/system/files/docs/to-236h.pdf variant AB), generated with kicad-footprint-generator ipc_gullwing_generator.py")
|
||||
(tags "SOT TO_SOT_SMD")
|
||||
(property "LCSC" "C15127")
|
||||
(property "Sheetfile" "PhobGCC_2_0_0_proto_1.kicad_sch")
|
||||
(property "Sheetname" "")
|
||||
(attr smd)
|
||||
(fp_text reference "REF**" (at 1.58 -2.24 -180) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 956dd30c-0ad6-4937-93fa-f65ee3364d24)
|
||||
)
|
||||
(fp_text value "Q_PMOS_GDS" (at 0 2.4 -180) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 74a33953-f4e2-40a2-8ec3-5cfffd3939d5)
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0 -180) (layer "F.Fab")
|
||||
(effects (font (size 0.32 0.32) (thickness 0.05)))
|
||||
(tstamp b0733893-19a2-48d3-bdde-5c9ada961012)
|
||||
)
|
||||
(fp_line (start 0 -1.56) (end 0.65 -1.56) (layer "F.SilkS") (width 0.12) (tstamp 18c27fa5-f500-4168-a370-5fccc4e2d659))
|
||||
(fp_line (start 0 1.56) (end 0.65 1.56) (layer "F.SilkS") (width 0.12) (tstamp 74b21ada-1c00-4be2-b933-50319524f59d))
|
||||
(fp_line (start 0 1.56) (end -0.65 1.56) (layer "F.SilkS") (width 0.12) (tstamp bbaeabfe-75b1-433d-9d15-fa841bbb440c))
|
||||
(fp_line (start 0 -1.56) (end -1.675 -1.56) (layer "F.SilkS") (width 0.12) (tstamp c938c91f-db78-451e-a59f-1264496b8a45))
|
||||
(fp_line (start -1.92 1.7) (end 1.92 1.7) (layer "F.CrtYd") (width 0.05) (tstamp 6da409c2-1937-49df-a914-63389411f54d))
|
||||
(fp_line (start -1.92 -1.7) (end -1.92 1.7) (layer "F.CrtYd") (width 0.05) (tstamp 806ad1ed-db06-4a6e-8a76-324d9962f135))
|
||||
(fp_line (start 1.92 1.7) (end 1.92 -1.7) (layer "F.CrtYd") (width 0.05) (tstamp b238ba85-f13a-4732-8452-3239bfa6eb15))
|
||||
(fp_line (start 1.92 -1.7) (end -1.92 -1.7) (layer "F.CrtYd") (width 0.05) (tstamp ba759d22-ecca-4b39-8b42-e670945cfb5d))
|
||||
(fp_line (start -0.65 -1.125) (end -0.325 -1.45) (layer "F.Fab") (width 0.1) (tstamp 175d4acb-9f09-48de-8c63-15ad8a38c8ba))
|
||||
(fp_line (start -0.65 1.45) (end -0.65 -1.125) (layer "F.Fab") (width 0.1) (tstamp 438c60d9-2228-4d88-bcea-53121b988800))
|
||||
(fp_line (start 0.65 -1.45) (end 0.65 1.45) (layer "F.Fab") (width 0.1) (tstamp 5bb14fca-e771-4dba-bf12-5479914d4ccc))
|
||||
(fp_line (start 0.65 1.45) (end -0.65 1.45) (layer "F.Fab") (width 0.1) (tstamp ac8c50dc-bf28-43d1-a308-4d4af522ef5a))
|
||||
(fp_line (start -0.325 -1.45) (end 0.65 -1.45) (layer "F.Fab") (width 0.1) (tstamp b7e9f6a7-0bfc-4560-8c5d-274d7f5d907a))
|
||||
(pad "1" smd roundrect (at -0.9375 -0.95) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 2dc2b0ff-6baf-44e7-a7f9-48041a9bc842))
|
||||
(pad "2" smd roundrect (at -0.9375 0.95) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 1cc62f4f-615c-4899-bca3-bda990c30330))
|
||||
(pad "3" smd roundrect (at 0.9375 0) (size 1.475 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp e715feda-9429-4543-9ad7-330817c6bbc8))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl"
|
||||
(offset (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
|
@ -0,0 +1,53 @@
|
|||
(footprint "SW_TS-1187A-B-A-B" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 63700E0B)
|
||||
(property "MANUFACTURER" "XKB Industrial Precision")
|
||||
(property "MAXIMUM_PACKAGE_HEIGHT" "1.5mm")
|
||||
(property "PARTREV" "A0")
|
||||
(property "STANDARD" "Manufacturer Recommendations")
|
||||
(property "Sheetfile" "PhobGCC_2_0_0_proto_1.kicad_sch")
|
||||
(property "Sheetname" "")
|
||||
(attr through_hole)
|
||||
(fp_text reference "REF**" (at -0.825 -3.635 180) (layer "F.SilkS")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp 9177ff37-0169-41de-b3c3-87d4e48f0b74)
|
||||
)
|
||||
(fp_text value "BOOTSEL" (at 6.795 3.565 180) (layer "F.Fab")
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
(tstamp b080c352-c54d-4483-94c8-01aaf7bd456b)
|
||||
)
|
||||
(fp_line (start 2.55 1.18) (end 2.55 -1.18) (layer "F.SilkS") (width 0.127) (tstamp 78d6d93d-c76b-4245-ae83-6160e40ad148))
|
||||
(fp_line (start 2.25 2.55) (end -2.25 2.55) (layer "F.SilkS") (width 0.127) (tstamp 83e0849f-2218-4346-87eb-67eee923c6de))
|
||||
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|
||||
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|
||||
(fp_circle (center -4.25 -1.875) (end -4.15 -1.875) (layer "F.SilkS") (width 0.2) (fill none) (tstamp 06817885-49ac-457e-99af-97b9aaab99fa))
|
||||
(fp_line (start 3.75 2.5) (end 3.75 1.25) (layer "F.CrtYd") (width 0.05) (tstamp 10e25b31-bead-4768-8fdb-6e1095ad580f))
|
||||
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|
||||
(fp_line (start 3.75 -2.5) (end 3.75 -1.25) (layer "F.CrtYd") (width 0.05) (tstamp 39b71035-64d5-483d-b35b-5eba19ebafca))
|
||||
(fp_line (start -2.8 -1.25) (end -2.8 1.25) (layer "F.CrtYd") (width 0.05) (tstamp 3c94c354-431f-40aa-85de-cd15672a382b))
|
||||
(fp_line (start 3.75 1.25) (end 2.8 1.25) (layer "F.CrtYd") (width 0.05) (tstamp 447c38e8-b2a6-49d5-a733-117538f06b5d))
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
(fp_line (start 3.75 2.5) (end 2.8 2.5) (layer "F.CrtYd") (width 0.05) (tstamp 7e372a29-8baa-41e6-9735-6ed64eb371e5))
|
||||
(fp_line (start -2.8 -2.8) (end -2.8 -2.5) (layer "F.CrtYd") (width 0.05) (tstamp 7e4a4060-062b-47b9-80a8-a3f4324df626))
|
||||
(fp_line (start -3.75 -1.25) (end -2.8 -1.25) (layer "F.CrtYd") (width 0.05) (tstamp 8a3ad958-2d2d-453e-ae68-f69670071d79))
|
||||
(fp_line (start 2.8 -1.25) (end 2.8 1.25) (layer "F.CrtYd") (width 0.05) (tstamp 9f28aaba-05c7-4404-ab36-41576943f6a5))
|
||||
(fp_line (start 2.8 -2.8) (end 2.8 -2.5) (layer "F.CrtYd") (width 0.05) (tstamp a0f2ae3f-6938-4ee7-88af-0cd202d657b0))
|
||||
(fp_line (start -3.75 1.25) (end -2.8 1.25) (layer "F.CrtYd") (width 0.05) (tstamp a1c7ac69-4571-4fe4-b551-d83cff8bcadb))
|
||||
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(pad "B" smd rect (at 3 -1.875) (size 1 0.75) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 89085121-712d-4206-9a55-741c8c57024c))
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)
|
16
PCB/KiCAD/PhobGCC_2_0_0_footprints.pretty/Slot.kicad_mod
Normal file
16
PCB/KiCAD/PhobGCC_2_0_0_footprints.pretty/Slot.kicad_mod
Normal file
|
@ -0,0 +1,16 @@
|
|||
(footprint "Slot" (version 20211014) (generator pcbnew)
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(layer "F.Cu")
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||||
(tedit 615BCFD8)
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(property "Sheetfile" "PhobGCC_2_0_0_proto_1.kicad_sch")
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||||
(property "Sheetname" "")
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(attr through_hole)
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(fp_text reference "REF**" (at -3 -4.35) (layer "F.SilkS") hide
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 8d1e5e78-6816-4df1-a337-d2fd23554002)
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)
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(fp_text value "Slot" (at 2.35 -2.75) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 4688f9dd-24aa-443b-84cc-a74753a29cc6)
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)
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||||
(pad "" np_thru_hole oval (at 0 0) (size 2.8 2.2) (drill oval 2.8 2.2) (layers *.Cu *.Mask) (tstamp 73ada1f7-e963-4d2d-aa41-dd22a6d1e2b8))
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)
|
|
@ -0,0 +1,127 @@
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(footprint "Start_Contact" (version 20211014) (generator pcbnew)
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(layer "F.Cu")
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(property "Sheetname" "")
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(attr through_hole)
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(fp_text reference "REF**" (at -5.8 -1.05) (layer "F.SilkS") hide
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(tstamp ffdeb6bd-186b-4e85-aff3-c8234e8fb83d)
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)
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(fp_text value "Start" (at -0.017 -4.697 180) (layer "F.SilkS")
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)
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)
|
|
@ -0,0 +1,65 @@
|
|||
(footprint "USB_Micro-B_Amphenol_10118194_Horizontal" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tedit 5F2142B6)
|
||||
(descr "USB Micro-B receptacle, horizontal, SMD, 10118194, https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/10118194.pdf")
|
||||
(tags "USB Micro B horizontal SMD")
|
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(property "Sheetfile" "PhobGCC_2_0_0_proto_1.kicad_sch")
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(property "Sheetname" "")
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(attr smd)
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(tstamp 640de53a-5e09-4a93-b5b1-6269d224de71)
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)
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(fp_text value "USB_B_Micro" (at 0 4.75) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 0373bfee-4163-4e9b-93a7-c103feb446da)
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)
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)
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)
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|
||||
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|
||||
(offset (xyz 0 0 0))
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(rotate (xyz 0 0 0))
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)
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|
|
@ -0,0 +1,38 @@
|
|||
(footprint "Z_Switch_Edge_Omron" (version 20211014) (generator pcbnew)
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||||
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|
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|
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(property "Contact_Current_Rating" "50 mA")
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(property "Sheetfile" "PhobGCC_2_0_0_proto_1.kicad_sch")
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60150
PCB/KiCAD/PhobGCC_2_0_0_proto_1.kicad_pcb
Normal file
60150
PCB/KiCAD/PhobGCC_2_0_0_proto_1.kicad_pcb
Normal file
File diff suppressed because it is too large
Load diff
459
PCB/KiCAD/PhobGCC_2_0_0_proto_1.kicad_pro
Normal file
459
PCB/KiCAD/PhobGCC_2_0_0_proto_1.kicad_pro
Normal file
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||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "PhobGCC_2_0_0_proto_1.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.15,
|
||||
"diff_pair_gap": 0.155,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.77,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.15,
|
||||
"diff_pair_gap": 0.155,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.77,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "USB",
|
||||
"nets": [],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.25,
|
||||
"via_diameter": 0.8,
|
||||
"via_drill": 0.4,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "PhobGCC_test.step",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 0.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "Pcbnew",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"852dabbf-de45-4470-8176-59d37a754407",
|
||||
""
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
8472
PCB/KiCAD/PhobGCC_2_0_0_proto_1.kicad_sch
Normal file
8472
PCB/KiCAD/PhobGCC_2_0_0_proto_1.kicad_sch
Normal file
File diff suppressed because it is too large
Load diff
29469
PCB/Models/10118194C.igs
Normal file
29469
PCB/Models/10118194C.igs
Normal file
File diff suppressed because it is too large
Load diff
27189
PCB/Models/10118194c.stp
Normal file
27189
PCB/Models/10118194c.stp
Normal file
File diff suppressed because it is too large
Load diff
17425
PCB/Models/FH34SRJ-12S-0.5SH.igs
Normal file
17425
PCB/Models/FH34SRJ-12S-0.5SH.igs
Normal file
File diff suppressed because it is too large
Load diff
10116
PCB/Models/FH34SRJ-12S-0.5SH.stp
Normal file
10116
PCB/Models/FH34SRJ-12S-0.5SH.stp
Normal file
File diff suppressed because it is too large
Load diff
37174
PCB/Models/PhobGCC_test.step
Normal file
37174
PCB/Models/PhobGCC_test.step
Normal file
File diff suppressed because it is too large
Load diff
22584
PCB/Models/RP2040_QFN_PACKAGE.STEP
Normal file
22584
PCB/Models/RP2040_QFN_PACKAGE.STEP
Normal file
File diff suppressed because it is too large
Load diff
3686
PCB/Models/SOIC_128JVSIQ_WIN.step
Normal file
3686
PCB/Models/SOIC_128JVSIQ_WIN.step
Normal file
File diff suppressed because it is too large
Load diff
8615
PCB/Models/TS-1187A-B-A-B--3DModel-STEP-56544.STEP
Normal file
8615
PCB/Models/TS-1187A-B-A-B--3DModel-STEP-56544.STEP
Normal file
File diff suppressed because it is too large
Load diff
Loading…
Reference in a new issue