308 lines
6.9 KiB
Rust
308 lines
6.9 KiB
Rust
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use core::convert::Infallible;
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use core::hint::unreachable_unchecked;
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use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin};
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use crate::pac;
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use crate::pac::p0 as gpio;
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use crate::peripherals;
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/// Represents a digital input or output level.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Level {
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Low,
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High,
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}
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/// Represents a pull setting for an input.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Pull {
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None,
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Up,
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Down,
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}
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/// A GPIO port with up to 32 pins.
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#[derive(Debug, Eq, PartialEq)]
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pub enum Port {
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/// Port 0, available on all nRF52 and nRF51 MCUs.
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Port0,
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/// Port 1, only available on some nRF52 MCUs.
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#[cfg(any(feature = "52833", feature = "52840"))]
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Port1,
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}
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pub struct Input<T: Pin> {
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pin: T,
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}
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impl<T: Pin> Input<T> {
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pub fn new(pin: T, pull: Pull) -> Self {
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pin.conf().write(|w| {
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w.dir().input();
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w.input().connect();
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match pull {
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Pull::None => {
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w.pull().disabled();
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}
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Pull::Up => {
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w.pull().pullup();
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}
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Pull::Down => {
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w.pull().pulldown();
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}
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}
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w.drive().s0s1();
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w.sense().disabled();
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w
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});
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Self { pin }
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}
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}
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impl<T: Pin> Drop for Input<T> {
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fn drop(&mut self) {
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self.pin.conf().reset();
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}
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}
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impl<T: Pin> InputPin for Input<T> {
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type Error = Infallible;
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fn is_high(&self) -> Result<bool, Self::Error> {
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self.is_low().map(|v| !v)
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}
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fn is_low(&self) -> Result<bool, Self::Error> {
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Ok(self.pin.block().in_.read().bits() & (1 << self.pin.pin()) == 0)
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}
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}
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pub struct Output<T: Pin> {
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pin: T,
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}
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impl<T: Pin> Output<T> {
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// TODO opendrain
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pub fn new(pin: T, initial_output: Level) -> Self {
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pin.conf().write(|w| {
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w.dir().output();
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w.input().disconnect();
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w.pull().disabled();
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w.drive().s0s1();
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w.sense().disabled();
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w
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});
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Self { pin }
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}
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}
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impl<T: Pin> Drop for Output<T> {
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fn drop(&mut self) {
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self.pin.conf().reset();
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}
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}
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impl<T: Pin> OutputPin for Output<T> {
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type Error = Infallible;
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/// Set the output as high.
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fn set_high(&mut self) -> Result<(), Self::Error> {
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unsafe {
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self.pin
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.block()
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.outset
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.write(|w| w.bits(1u32 << self.pin.pin()));
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}
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Ok(())
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}
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/// Set the output as low.
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fn set_low(&mut self) -> Result<(), Self::Error> {
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unsafe {
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self.pin
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.block()
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.outclr
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.write(|w| w.bits(1u32 << self.pin.pin()));
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}
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Ok(())
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}
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}
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impl<T: Pin> StatefulOutputPin for Output<T> {
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/// Is the output pin set as high?
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fn is_set_high(&self) -> Result<bool, Self::Error> {
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self.is_set_low().map(|v| !v)
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}
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/// Is the output pin set as low?
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fn is_set_low(&self) -> Result<bool, Self::Error> {
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Ok(self.pin.block().out.read().bits() & (1 << self.pin.pin()) == 0)
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}
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}
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pub(crate) mod sealed {
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use super::*;
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pub trait Pin {
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fn pin_port(&self) -> u8;
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#[inline]
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fn _pin(&self) -> u8 {
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#[cfg(any(feature = "52833", feature = "52840"))]
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{
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self.pin_port() % 32
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}
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#[cfg(not(any(feature = "52833", feature = "52840")))]
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{
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self.pin_port()
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}
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}
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fn block(&self) -> &gpio::RegisterBlock {
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unsafe {
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match self.pin_port() / 32 {
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0 => &*pac::P0::ptr(),
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#[cfg(any(feature = "52833", feature = "52840"))]
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1 => &*pac::P1::ptr(),
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_ => unreachable_unchecked(),
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}
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}
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}
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fn conf(&self) -> &gpio::PIN_CNF {
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&self.block().pin_cnf[self._pin() as usize]
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}
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/// Set the output as high.
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fn set_high(&self) {
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unsafe {
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self.block().outset.write(|w| w.bits(1u32 << self._pin()));
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}
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}
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/// Set the output as low.
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fn set_low(&self) {
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unsafe {
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self.block().outclr.write(|w| w.bits(1u32 << self._pin()));
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}
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}
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}
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}
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pub trait Pin: sealed::Pin + Sized {
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#[inline]
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fn pin(&self) -> u8 {
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self._pin()
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}
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#[inline]
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fn port(&self) -> Port {
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match self.pin_port() / 32 {
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1 => Port::Port0,
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#[cfg(any(feature = "52833", feature = "52840"))]
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1 => Port::Port1,
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_ => unsafe { unreachable_unchecked() },
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}
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}
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#[inline]
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fn psel_bits(&self) -> u32 {
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self.pin_port() as u32
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}
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fn degrade(self) -> AnyPin {
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AnyPin {
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pin_port: self.pin_port(),
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}
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}
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}
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pub struct AnyPin {
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pin_port: u8,
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}
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impl AnyPin {
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pub unsafe fn from_psel_bits(psel_bits: u32) -> Self {
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Self {
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pin_port: psel_bits as u8,
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}
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}
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}
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impl Pin for AnyPin {}
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impl sealed::Pin for AnyPin {
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fn pin_port(&self) -> u8 {
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self.pin_port
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}
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}
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macro_rules! make_impl {
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($type:ident, $port_num:expr, $pin_num:expr) => {
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impl Pin for peripherals::$type {}
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impl sealed::Pin for peripherals::$type {
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fn pin_port(&self) -> u8 {
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$port_num * 32 + $pin_num
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}
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}
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};
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}
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make_impl!(P0_00, 0, 0);
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make_impl!(P0_01, 0, 1);
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make_impl!(P0_02, 0, 2);
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make_impl!(P0_03, 0, 3);
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make_impl!(P0_04, 0, 4);
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make_impl!(P0_05, 0, 5);
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make_impl!(P0_06, 0, 6);
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make_impl!(P0_07, 0, 7);
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make_impl!(P0_08, 0, 8);
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make_impl!(P0_09, 0, 9);
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make_impl!(P0_10, 0, 10);
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make_impl!(P0_11, 0, 11);
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make_impl!(P0_12, 0, 12);
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make_impl!(P0_13, 0, 13);
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make_impl!(P0_14, 0, 14);
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make_impl!(P0_15, 0, 15);
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make_impl!(P0_16, 0, 16);
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make_impl!(P0_17, 0, 17);
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make_impl!(P0_18, 0, 18);
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make_impl!(P0_19, 0, 19);
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make_impl!(P0_20, 0, 20);
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make_impl!(P0_21, 0, 21);
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make_impl!(P0_22, 0, 22);
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make_impl!(P0_23, 0, 23);
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make_impl!(P0_24, 0, 24);
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make_impl!(P0_25, 0, 25);
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make_impl!(P0_26, 0, 26);
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make_impl!(P0_27, 0, 27);
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make_impl!(P0_28, 0, 28);
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make_impl!(P0_29, 0, 29);
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make_impl!(P0_30, 0, 30);
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make_impl!(P0_31, 0, 31);
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#[cfg(any(feature = "52833", feature = "52840"))]
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mod _p1 {
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use super::*;
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make_impl!(P1_00, 1, 0);
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make_impl!(P1_01, 1, 1);
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make_impl!(P1_02, 1, 2);
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make_impl!(P1_03, 1, 3);
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make_impl!(P1_04, 1, 4);
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make_impl!(P1_05, 1, 5);
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make_impl!(P1_06, 1, 6);
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make_impl!(P1_07, 1, 7);
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make_impl!(P1_08, 1, 8);
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make_impl!(P1_09, 1, 9);
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make_impl!(P1_10, 1, 10);
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make_impl!(P1_11, 1, 11);
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make_impl!(P1_12, 1, 12);
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make_impl!(P1_13, 1, 13);
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make_impl!(P1_14, 1, 14);
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make_impl!(P1_15, 1, 15);
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}
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