From 007f45292762ab27291dd54bd0cfdeb23e390de4 Mon Sep 17 00:00:00 2001
From: goueslati <ghaith.oueslati@habemus.com>
Date: Thu, 4 May 2023 11:02:17 +0100
Subject: [PATCH] removed hardcoded addresses in memory.x

---
 embassy-stm32/src/tl_mbox/mod.rs    | 38 ++++++++++++++---------------
 examples/stm32wb/Cargo.toml         |  2 +-
 examples/stm32wb/memory.x           | 21 ++--------------
 examples/stm32wb/src/bin/tl_mbox.rs |  3 +++
 4 files changed, 25 insertions(+), 39 deletions(-)

diff --git a/embassy-stm32/src/tl_mbox/mod.rs b/embassy-stm32/src/tl_mbox/mod.rs
index 54db78bd8..73d2ca6d6 100644
--- a/embassy-stm32/src/tl_mbox/mod.rs
+++ b/embassy-stm32/src/tl_mbox/mod.rs
@@ -196,67 +196,67 @@ pub struct RefTable {
 #[link_section = "TL_REF_TABLE"]
 pub static mut TL_REF_TABLE: MaybeUninit<RefTable> = MaybeUninit::uninit();
 
-#[link_section = "TL_DEVICE_INFO_TABLE"]
+#[link_section = "MB_MEM1"]
 static mut TL_DEVICE_INFO_TABLE: MaybeUninit<DeviceInfoTable> = MaybeUninit::uninit();
 
-#[link_section = "TL_BLE_TABLE"]
+#[link_section = "MB_MEM1"]
 static mut TL_BLE_TABLE: MaybeUninit<BleTable> = MaybeUninit::uninit();
 
-#[link_section = "TL_THREAD_TABLE"]
+#[link_section = "MB_MEM1"]
 static mut TL_THREAD_TABLE: MaybeUninit<ThreadTable> = MaybeUninit::uninit();
 
-#[link_section = "TL_SYS_TABLE"]
+#[link_section = "MB_MEM1"]
 static mut TL_SYS_TABLE: MaybeUninit<SysTable> = MaybeUninit::uninit();
 
-#[link_section = "TL_MEM_MANAGER_TABLE"]
+#[link_section = "MB_MEM1"]
 static mut TL_MEM_MANAGER_TABLE: MaybeUninit<MemManagerTable> = MaybeUninit::uninit();
 
-#[link_section = "TL_TRACES_TABLE"]
+#[link_section = "MB_MEM1"]
 static mut TL_TRACES_TABLE: MaybeUninit<TracesTable> = MaybeUninit::uninit();
 
-#[link_section = "TL_MAC_802_15_4_TABLE"]
+#[link_section = "MB_MEM1"]
 static mut TL_MAC_802_15_4_TABLE: MaybeUninit<Mac802_15_4Table> = MaybeUninit::uninit();
 
 #[allow(dead_code)] // Not used currently but reserved
-#[link_section = "FREE_BUF_QUEUE"]
+#[link_section = "MB_MEM2"]
 static mut FREE_BUFF_QUEUE: MaybeUninit<LinkedListNode> = MaybeUninit::uninit();
 
 // not in shared RAM
 static mut LOCAL_FREE_BUF_QUEUE: MaybeUninit<LinkedListNode> = MaybeUninit::uninit();
 
 #[allow(dead_code)] // Not used currently but reserved
-#[link_section = "TRACES_EVT_QUEUE"]
+#[link_section = "MB_MEM2"]
 static mut TRACES_EVT_QUEUE: MaybeUninit<LinkedListNode> = MaybeUninit::uninit();
 
-#[link_section = "CS_BUFFER"]
+#[link_section = "MB_MEM2"]
 static mut CS_BUFFER: MaybeUninit<[u8; TL_PACKET_HEADER_SIZE + TL_EVT_HEADER_SIZE + TL_CS_EVT_SIZE]> =
     MaybeUninit::uninit();
 
-#[link_section = "EVT_QUEUE"]
+#[link_section = "MB_MEM2"]
 static mut EVT_QUEUE: MaybeUninit<LinkedListNode> = MaybeUninit::uninit();
 
-#[link_section = "SYSTEM_EVT_QUEUE"]
+#[link_section = "MB_MEM2"]
 static mut SYSTEM_EVT_QUEUE: MaybeUninit<LinkedListNode> = MaybeUninit::uninit();
 
-#[link_section = "SYS_CMD_BUF"]
+#[link_section = "MB_MEM2"]
 static mut SYS_CMD_BUF: MaybeUninit<CmdPacket> = MaybeUninit::uninit();
 
-#[link_section = "EVT_POOL"]
+#[link_section = "MB_MEM2"]
 static mut EVT_POOL: MaybeUninit<[u8; POOL_SIZE]> = MaybeUninit::uninit();
 
-#[link_section = "SYS_SPARE_EVT_BUF"]
+#[link_section = "MB_MEM2"]
 static mut SYS_SPARE_EVT_BUF: MaybeUninit<[u8; TL_PACKET_HEADER_SIZE + TL_EVT_HEADER_SIZE + 255]> =
     MaybeUninit::uninit();
 
-#[link_section = "BLE_SPARE_EVT_BUF"]
+#[link_section = "MB_MEM2"]
 static mut BLE_SPARE_EVT_BUF: MaybeUninit<[u8; TL_PACKET_HEADER_SIZE + TL_EVT_HEADER_SIZE + 255]> =
     MaybeUninit::uninit();
 
-#[link_section = "BLE_CMD_BUFFER"]
+#[link_section = "MB_MEM2"]
 static mut BLE_CMD_BUFFER: MaybeUninit<CmdPacket> = MaybeUninit::uninit();
 
-#[link_section = "HCI_ACL_DATA_BUFFER"]
-//                                                "magic" numbers from ST ---v---v
+#[link_section = "MB_MEM2"]
+//                                            "magic" numbers from ST ---v---v
 static mut HCI_ACL_DATA_BUFFER: MaybeUninit<[u8; TL_PACKET_HEADER_SIZE + 5 + 251]> = MaybeUninit::uninit();
 
 pub struct TlMbox {
diff --git a/examples/stm32wb/Cargo.toml b/examples/stm32wb/Cargo.toml
index db1816da3..3c7e3e874 100644
--- a/examples/stm32wb/Cargo.toml
+++ b/examples/stm32wb/Cargo.toml
@@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0"
 embassy-sync = { version = "0.2.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.2.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
 embassy-time = { version = "0.1.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "stm32wb55cc", "time-driver-any", "exti"]  }
+embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "stm32wb55rg", "time-driver-any", "exti"]  }
 
 defmt = "0.3"
 defmt-rtt = "0.4"
diff --git a/examples/stm32wb/memory.x b/examples/stm32wb/memory.x
index 0e48c916d..c75d07352 100644
--- a/examples/stm32wb/memory.x
+++ b/examples/stm32wb/memory.x
@@ -19,23 +19,6 @@ _stack_start = ORIGIN(RAM) + LENGTH(RAM);
 SECTIONS {
     TL_REF_TABLE                     (NOLOAD) : { *(TL_REF_TABLE) } >RAM_SHARED
 
-    TL_DEVICE_INFO_TABLE    0x2003001c (NOLOAD) : { *(TL_DEVICE_INFO_TABLE) } >RAM_SHARED
-    TL_BLE_TABLE            0x2003003c (NOLOAD) : { *(TL_BLE_TABLE) } >RAM_SHARED
-    TL_THREAD_TABLE         0x2003004c (NOLOAD) : { *(TL_THREAD_TABLE) } >RAM_SHARED
-    TL_SYS_TABLE            0x20030058 (NOLOAD) : { *(TL_SYS_TABLE) } >RAM_SHARED
-    TL_MEM_MANAGER_TABLE    0x20030060 (NOLOAD) : { *(TL_MEM_MANAGER_TABLE) } >RAM_SHARED
-    TL_TRACES_TABLE         0x2003007c (NOLOAD) : { *(TL_TRACES_TABLE) } >RAM_SHARED
-    TL_MAC_802_15_4_TABLE   0x20030080 (NOLOAD) : { *(TL_MAC_802_15_4_TABLE) } >RAM_SHARED
-
-    HCI_ACL_DATA_BUFFER     0x20030a08 (NOLOAD) : { *(HCI_ACL_DATA_BUFFER) } >RAM_SHARED
-    BLE_CMD_BUFFER          0x200308fc (NOLOAD) : { *(BLE_CMD_BUFFER) } >RAM_SHARED
-    BLE_SPARE_EVT_BUF       0x200301a8 (NOLOAD) : { *(BLE_SPARE_EVT_BUF) } >RAM_SHARED
-    SYS_SPARE_EVT_BUF       0x200302b4 (NOLOAD) : { *(SYS_SPARE_EVT_BUF) } >RAM_SHARED
-    EVT_POOL                0x200303c0 (NOLOAD) : { *(EVT_POOL) } >RAM_SHARED
-    SYS_CMD_BUF             0x2003009c (NOLOAD) : { *(SYS_CMD_BUF) } >RAM_SHARED
-    SYSTEM_EVT_QUEUE        0x20030b28 (NOLOAD) : { *(SYSTEM_EVT_QUEUE) } >RAM_SHARED
-    EVT_QUEUE               0x20030b10 (NOLOAD) : { *(EVT_QUEUE) } >RAM_SHARED
-    CS_BUFFER               0x20030b18 (NOLOAD) : { *(CS_BUFFER) } >RAM_SHARED
-    TRACES_EVT_QUEUE        0x20030094 (NOLOAD) : { *(TRACES_EVT_QUEUE) } >RAM_SHARED
-    FREE_BUF_QUEUE          0x2003008c (NOLOAD) : { *(FREE_BUF_QUEUE) } >RAM_SHARED
+    MB_MEM1 (NOLOAD)                          : { *(MB_MEM1) } >RAM_SHARED
+    MB_MEM2 (NOLOAD)                          : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
 }
diff --git a/examples/stm32wb/src/bin/tl_mbox.rs b/examples/stm32wb/src/bin/tl_mbox.rs
index 6a9b9c936..fadeb0d22 100644
--- a/examples/stm32wb/src/bin/tl_mbox.rs
+++ b/examples/stm32wb/src/bin/tl_mbox.rs
@@ -6,6 +6,7 @@ use defmt::*;
 use embassy_executor::Spawner;
 use embassy_stm32::ipcc::{Config, Ipcc};
 use embassy_stm32::tl_mbox::TlMbox;
+use embassy_time::{Duration, Timer};
 use {defmt_rtt as _, panic_probe as _};
 
 #[embassy_executor::main]
@@ -38,5 +39,7 @@ async fn main(_spawner: Spawner) {
                 break;
             }
         }
+
+        Timer::after(Duration::from_millis(500)).await;
     }
 }