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0823d9dc93
2 changed files with 97 additions and 0 deletions
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@ -1,4 +1,5 @@
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pub mod complementary_pwm;
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pub mod qei;
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pub mod simple_pwm;
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use stm32_metapac::timer::vals;
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96
embassy-stm32/src/timer/qei.rs
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96
embassy-stm32/src/timer/qei.rs
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@ -0,0 +1,96 @@
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use core::marker::PhantomData;
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use super::*;
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use crate::gpio::sealed::AFType;
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use crate::gpio::AnyPin;
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use crate::Peripheral;
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pub enum Direction {
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Upcounting,
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Downcounting,
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}
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pub struct Ch1;
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pub struct Ch2;
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pub struct QeiPin<'d, Perip, Channel> {
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_pin: PeripheralRef<'d, AnyPin>,
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phantom: PhantomData<(Perip, Channel)>,
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}
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macro_rules! channel_impl {
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($new_chx:ident, $channel:ident, $pin_trait:ident) => {
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impl<'d, Perip: CaptureCompare16bitInstance> QeiPin<'d, Perip, $channel> {
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pub fn $new_chx(pin: impl Peripheral<P = impl $pin_trait<Perip>> + 'd) -> Self {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(pin.af_num(), AFType::Input);
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#[cfg(gpio_v2)]
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pin.set_speed(crate::gpio::Speed::VeryHigh);
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});
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QeiPin {
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_pin: pin.map_into(),
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phantom: PhantomData,
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}
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}
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}
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};
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}
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channel_impl!(new_ch1, Ch1, Channel1Pin);
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channel_impl!(new_ch2, Ch2, Channel2Pin);
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pub struct SimplePwm<'d, T> {
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_inner: PeripheralRef<'d, T>,
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}
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impl<'d, T: CaptureCompare16bitInstance> SimplePwm<'d, T> {
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pub fn new(tim: impl Peripheral<P = T> + 'd, _ch1: QeiPin<'d, T, Ch1>, _ch2: QeiPin<'d, T, Ch2>) -> Self {
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Self::new_inner(tim)
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}
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fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self {
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into_ref!(tim);
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T::enable();
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<T as crate::rcc::sealed::RccPeripheral>::reset();
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// Configure TxC1 and TxC2 as captures
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T::regs_gp16().ccmr_input(0).modify(|w| {
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w.set_ccs(0, vals::CcmrInputCcs::TI4);
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w.set_ccs(1, vals::CcmrInputCcs::TI4);
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});
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// enable and configure to capture on rising edge
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T::regs_gp16().ccer().modify(|w| {
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w.set_cce(0, true);
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w.set_cce(1, true);
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w.set_ccp(0, false);
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w.set_ccp(1, false);
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});
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T::regs_gp16().smcr().modify(|w| {
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w.set_sms(vals::Sms::ENCODER_MODE_3);
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});
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T::regs_gp16().arr().modify(|w| w.set_arr(u16::MAX));
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T::regs_gp16().cr1().modify(|w| w.set_cen(true));
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Self { _inner: tim }
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}
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pub fn read_direction(&self) -> Direction {
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match T::regs_gp16().cr1().read().dir() {
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vals::Dir::DOWN => Direction::Downcounting,
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vals::Dir::UP => Direction::Upcounting,
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}
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}
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pub fn count(&self) -> u16 {
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T::regs_gp16().cnt().read().cnt()
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}
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}
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