diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index 7d91357d1..759435d8b 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -117,6 +117,8 @@ jobs: target: thumbv7m-none-eabi - package: examples/stm32f7 target: thumbv7em-none-eabihf + - package: examples/stm32u5 + target: thumbv7em-none-eabihf steps: - uses: actions/checkout@v2 with: diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index dafb8ef77..d6b0586c9 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -1037,6 +1037,29 @@ stm32l4s7zi = [ "stm32-metapac/stm32l4s7zi" ] stm32l4s9ai = [ "stm32-metapac/stm32l4s9ai" ] stm32l4s9vi = [ "stm32-metapac/stm32l4s9vi" ] stm32l4s9zi = [ "stm32-metapac/stm32l4s9zi" ] +stm32u575ag = [ "stm32-metapac/stm32u575ag" ] +stm32u575ai = [ "stm32-metapac/stm32u575ai" ] +stm32u575cg = [ "stm32-metapac/stm32u575cg" ] +stm32u575ci = [ "stm32-metapac/stm32u575ci" ] +stm32u575og = [ "stm32-metapac/stm32u575og" ] +stm32u575oi = [ "stm32-metapac/stm32u575oi" ] +stm32u575qg = [ "stm32-metapac/stm32u575qg" ] +stm32u575qi = [ "stm32-metapac/stm32u575qi" ] +stm32u575rg = [ "stm32-metapac/stm32u575rg" ] +stm32u575ri = [ "stm32-metapac/stm32u575ri" ] +stm32u575vg = [ "stm32-metapac/stm32u575vg" ] +stm32u575vi = [ "stm32-metapac/stm32u575vi" ] +stm32u575zg = [ "stm32-metapac/stm32u575zg" ] +stm32u575zi = [ "stm32-metapac/stm32u575zi" ] +stm32u585ai = [ "stm32-metapac/stm32u585ai" ] +stm32u585ci = [ "stm32-metapac/stm32u585ci" ] +stm32u585oi = [ "stm32-metapac/stm32u585oi" ] +stm32u585qe = [ "stm32-metapac/stm32u585qe" ] +stm32u585qi = [ "stm32-metapac/stm32u585qi" ] +stm32u585ri = [ "stm32-metapac/stm32u585ri" ] +stm32u585vi = [ "stm32-metapac/stm32u585vi" ] +stm32u585ze = [ "stm32-metapac/stm32u585ze" ] +stm32u585zi = [ "stm32-metapac/stm32u585zi" ] stm32wb55cc = [ "stm32-metapac/stm32wb55cc" ] stm32wb55ce = [ "stm32-metapac/stm32wb55ce" ] stm32wb55cg = [ "stm32-metapac/stm32wb55cg" ] diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs index 565b92f32..d63af76be 100644 --- a/embassy-stm32/src/exti.rs +++ b/embassy-stm32/src/exti.rs @@ -30,11 +30,11 @@ fn cpu_regs() -> pac::exti::Exti { EXTI } -#[cfg(not(any(exti_g0, exti_l5, gpio_v1)))] +#[cfg(not(any(exti_g0, exti_l5, gpio_v1, exti_u5)))] fn exticr_regs() -> pac::syscfg::Syscfg { pac::SYSCFG } -#[cfg(any(exti_g0, exti_l5))] +#[cfg(any(exti_g0, exti_l5, exti_u5))] fn exticr_regs() -> pac::exti::Exti { EXTI } @@ -44,9 +44,9 @@ fn exticr_regs() -> pac::afio::Afio { } pub unsafe fn on_irq() { - #[cfg(not(any(exti_g0, exti_l5)))] + #[cfg(not(any(exti_g0, exti_l5, exti_u5)))] let bits = EXTI.pr(0).read().0; - #[cfg(any(exti_g0, exti_l5))] + #[cfg(any(exti_g0, exti_l5, exti_u5))] let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0; // Mask all the channels that fired. @@ -58,9 +58,9 @@ pub unsafe fn on_irq() { } // Clear pending - #[cfg(not(any(exti_g0, exti_l5)))] + #[cfg(not(any(exti_g0, exti_l5, exti_u5)))] EXTI.pr(0).write_value(Lines(bits)); - #[cfg(any(exti_g0, exti_l5))] + #[cfg(any(exti_g0, exti_l5, exti_u5))] { EXTI.rpr(0).write_value(Lines(bits)); EXTI.fpr(0).write_value(Lines(bits)); @@ -148,9 +148,9 @@ impl<'a> ExtiInputFuture<'a> { EXTI.ftsr(0).modify(|w| w.set_line(pin, falling)); // clear pending bit - #[cfg(not(any(exti_g0, exti_l5)))] + #[cfg(not(any(exti_g0, exti_l5, exti_u5)))] EXTI.pr(0).write(|w| w.set_line(pin, true)); - #[cfg(any(exti_g0, exti_l5))] + #[cfg(any(exti_g0, exti_l5, exti_u5))] { EXTI.rpr(0).write(|w| w.set_line(pin, true)); EXTI.fpr(0).write(|w| w.set_line(pin, true)); diff --git a/embassy-stm32/src/pwr/mod.rs b/embassy-stm32/src/pwr/mod.rs index 2577eab34..bd3d23cac 100644 --- a/embassy-stm32/src/pwr/mod.rs +++ b/embassy-stm32/src/pwr/mod.rs @@ -4,6 +4,7 @@ #[cfg_attr(pwr_wl5, path = "wl5.rs")] #[cfg_attr(pwr_g0, path = "g0.rs")] #[cfg_attr(pwr_l1, path = "l1.rs")] +#[cfg_attr(pwr_u5, path = "u5.rs")] mod _version; pub use _version::*; diff --git a/embassy-stm32/src/pwr/u5.rs b/embassy-stm32/src/pwr/u5.rs new file mode 100644 index 000000000..8b1378917 --- /dev/null +++ b/embassy-stm32/src/pwr/u5.rs @@ -0,0 +1 @@ + diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 28def28ab..8db2f10ea 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs @@ -24,19 +24,19 @@ pub struct Clocks { #[cfg(not(rcc_g0))] pub apb2_tim: Hertz, - #[cfg(rcc_wl5)] + #[cfg(any(rcc_wl5, rcc_u5))] pub apb3: Hertz, #[cfg(any(rcc_l0, rcc_l1, rcc_f0, rcc_f1, rcc_f0x0, rcc_g0))] pub ahb: Hertz, - #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_wb, rcc_wl5))] + #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))] pub ahb1: Hertz, - #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_wb, rcc_wl5))] + #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))] pub ahb2: Hertz, - #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_wb, rcc_wl5))] + #[cfg(any(rcc_l4, rcc_f4, rcc_f7, rcc_h7, rcc_u5, rcc_wb, rcc_wl5))] pub ahb3: Hertz, #[cfg(any(rcc_h7))] @@ -100,6 +100,9 @@ cfg_if::cfg_if! { } else if #[cfg(any(rcc_g0))] { mod g0; pub use g0::*; + } else if #[cfg(any(rcc_u5))] { + mod u5; + pub use u5::*; } } diff --git a/embassy-stm32/src/rcc/u5/mod.rs b/embassy-stm32/src/rcc/u5/mod.rs new file mode 100644 index 000000000..dbf5e8dfb --- /dev/null +++ b/embassy-stm32/src/rcc/u5/mod.rs @@ -0,0 +1,15 @@ +pub struct Config {} + +impl Config { + pub fn new() -> Self { + Config {} + } +} + +impl Default for Config { + fn default() -> Self { + Config::new() + } +} + +pub unsafe fn init(_config: Config) {} diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index a6955729d..7cab10d05 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs @@ -215,6 +215,7 @@ crate::pac::peripheral_pins!( }; ); +#[allow(unused)] macro_rules! impl_dma { ($inst:ident, {dmamux: $dmamux:ident}, $signal:ident, $request:expr) => { impl sealed::$signal for T diff --git a/examples/stm32l4/.cargo/config.toml b/examples/stm32l4/.cargo/config.toml index b157e3aeb..d32ca4ae9 100644 --- a/examples/stm32l4/.cargo/config.toml +++ b/examples/stm32l4/.cargo/config.toml @@ -1,7 +1,8 @@ [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-run --list-chips` #runner = "probe-run --chip STM32L475VGT6" -runner = "probe-run --chip STM32L475VG" +#runner = "probe-run --chip STM32L475VG" +runner = "probe-run --chip STM32L4S5VI" rustflags = [ # LLD (shipped with the Rust toolchain) is used as the default linker diff --git a/examples/stm32u5/.cargo/config.toml b/examples/stm32u5/.cargo/config.toml new file mode 100644 index 000000000..7f4887008 --- /dev/null +++ b/examples/stm32u5/.cargo/config.toml @@ -0,0 +1,18 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# replace STM32F429ZITx with your chip as listed in `probe-run --list-chips` +runner = "probe-run --chip STM32U585AIIx" + +rustflags = [ + # LLD (shipped with the Rust toolchain) is used as the default linker + "-C", "link-arg=--nmagic", + "-C", "link-arg=-Tlink.x", + "-C", "link-arg=-Tdefmt.x", + + # Code-size optimizations. + "-Z", "trap-unreachable=no", + "-C", "inline-threshold=5", + "-C", "no-vectorize-loops", +] + +[build] +target = "thumbv7em-none-eabi" diff --git a/examples/stm32u5/Cargo.toml b/examples/stm32u5/Cargo.toml new file mode 100644 index 000000000..b3c3c9700 --- /dev/null +++ b/examples/stm32u5/Cargo.toml @@ -0,0 +1,37 @@ +[package] +authors = ["Dario Nieuwenhuis "] +edition = "2018" +name = "embassy-stm32u5-examples" +version = "0.1.0" +resolver = "2" + +[features] +default = [ + "defmt-default", +] +defmt-default = [] +defmt-trace = [] +defmt-debug = [] +defmt-info = [] +defmt-warn = [] +defmt-error = [] + +[dependencies] +embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "defmt-trace"] } +embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "unstable-pac", "stm32u585ai", "memory-x" ] } +embassy-hal-common = {version = "0.1.0", path = "../../embassy-hal-common" } + +defmt = "0.2.3" +defmt-rtt = "0.2.0" + +cortex-m = "0.7.3" +cortex-m-rt = "0.7.0" +embedded-hal = "0.2.6" +panic-probe = { version = "0.2.0", features = ["print-defmt"] } +futures = { version = "0.3.17", default-features = false, features = ["async-await"] } +rtt-target = { version = "0.3.1", features = ["cortex-m"] } +heapless = { version = "0.7.5", default-features = false } + +micromath = "2.0.0" + diff --git a/examples/stm32u5/src/bin/boot.rs b/examples/stm32u5/src/bin/boot.rs new file mode 100644 index 000000000..91eff735d --- /dev/null +++ b/examples/stm32u5/src/bin/boot.rs @@ -0,0 +1,16 @@ +#![no_std] +#![no_main] +#![feature(type_alias_impl_trait)] + +#[path = "../example_common.rs"] +mod example_common; +use example_common::*; + +use embassy_stm32 as _; + +#[cortex_m_rt::entry] +fn main() -> ! { + info!("Hello World!"); + + loop {} +} diff --git a/examples/stm32u5/src/example_common.rs b/examples/stm32u5/src/example_common.rs new file mode 100644 index 000000000..54d633837 --- /dev/null +++ b/examples/stm32u5/src/example_common.rs @@ -0,0 +1,17 @@ +#![macro_use] + +use defmt_rtt as _; // global logger +use panic_probe as _; + +pub use defmt::*; + +use core::sync::atomic::{AtomicUsize, Ordering}; + +defmt::timestamp! {"{=u64}", { + static COUNT: AtomicUsize = AtomicUsize::new(0); + // NOTE(no-CAS) `timestamps` runs with interrupts disabled + let n = COUNT.load(Ordering::Relaxed); + COUNT.store(n + 1, Ordering::Relaxed); + n as u64 + } +} diff --git a/stm32-data b/stm32-data index 8d3ca7adc..ed9819e91 160000 --- a/stm32-data +++ b/stm32-data @@ -1 +1 @@ -Subproject commit 8d3ca7adc6eac3d648bf0c33509e678beaba105a +Subproject commit ed9819e91fed1da71bc5c4b994c7f03a4d66d84f diff --git a/stm32-gen-features/src/lib.rs b/stm32-gen-features/src/lib.rs index 381fd1c17..756f4da83 100644 --- a/stm32-gen-features/src/lib.rs +++ b/stm32-gen-features/src/lib.rs @@ -2,7 +2,7 @@ use std::{iter::FilterMap, path::Path, slice::Iter}; -const SUPPORTED_FAMILIES: [&str; 11] = [ +const SUPPORTED_FAMILIES: [&str; 12] = [ "stm32f0", "stm32f1", "stm32f4", @@ -12,6 +12,7 @@ const SUPPORTED_FAMILIES: [&str; 11] = [ "stm32l1", "stm32l4", "stm32h7", + "stm32u5", "stm32wb55", "stm32wl55", ]; diff --git a/stm32-metapac-gen/src/lib.rs b/stm32-metapac-gen/src/lib.rs index 79dd734ce..3480ac364 100644 --- a/stm32-metapac-gen/src/lib.rs +++ b/stm32-metapac-gen/src/lib.rs @@ -150,6 +150,9 @@ macro_rules! peripheral_count {{ } fn make_dma_channel_counts(out: &mut String, data: &BTreeMap) { + if data.len() == 0 { + return; + } write!( out, "#[macro_export] diff --git a/stm32-metapac/Cargo.toml b/stm32-metapac/Cargo.toml index 3b16949c6..1395e7f60 100644 --- a/stm32-metapac/Cargo.toml +++ b/stm32-metapac/Cargo.toml @@ -1215,6 +1215,29 @@ stm32l562qe = [] stm32l562re = [] stm32l562ve = [] stm32l562ze = [] +stm32u575ag = [] +stm32u575ai = [] +stm32u575cg = [] +stm32u575ci = [] +stm32u575og = [] +stm32u575oi = [] +stm32u575qg = [] +stm32u575qi = [] +stm32u575rg = [] +stm32u575ri = [] +stm32u575vg = [] +stm32u575vi = [] +stm32u575zg = [] +stm32u575zi = [] +stm32u585ai = [] +stm32u585ci = [] +stm32u585oi = [] +stm32u585qe = [] +stm32u585qi = [] +stm32u585ri = [] +stm32u585vi = [] +stm32u585ze = [] +stm32u585zi = [] stm32wb10cc = [] stm32wb15cc = [] stm32wb30ce = []