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remove peripheral reads

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This commit is contained in:
Harry Brooke 2024-03-18 00:05:02 +00:00
parent f761f721bc
commit 1f9ffbfb18
1 changed files with 8 additions and 12 deletions
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20
embassy-stm32/build.rs
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@ -595,20 +595,16 @@ fn main() {
#start_rst #start_rst
crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true)); crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
// dummy read to ensure write is completed
// we must wait two peripheral clock cycles before the clock is active
// this seems to work, but might be incorrect
// see http://efton.sk/STM32/gotcha/g183.html
// dummy read (like in the ST HALs)
let _ = crate::pac::RCC.#en_reg().read(); let _ = crate::pac::RCC.#en_reg().read();
// wait two peripheral clock cycles before the clock is active // DSB for good measure
// accomplish this with two dummy reads from the peripheral. this shouldn't cortex_m::asm::dsb();
// cause any side effects since the peripheral is in reset
unsafe {
//apparently volatile accesses to ZST like () can be optimized out. lol
let ptr = crate::pac::#pname.as_ptr() as *const usize;
let _ = ::core::ptr::read_volatile(ptr);
let _ = ::core::ptr::read_volatile(ptr);
// wait for memory accesses to finish
cortex_m::asm::dsb();
}
#end_rst #end_rst
} }