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stm32/flash: add support for f1.

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This commit is contained in:
Dario Nieuwenhuis 2024-01-05 23:49:10 +01:00
parent 0d5711b219
commit 208ad8fbfc
10 changed files with 40 additions and 26 deletions
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8
.vscode/settings.json vendored
View file

@ -15,10 +15,16 @@
//"rust-analyzer.cargo.target": "thumbv7m-none-eabi",
"rust-analyzer.cargo.target": "thumbv7em-none-eabi",
//"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf",
"rust-analyzer.cargo.features": [
"stm32f103c8",
"time-driver-any",
"unstable-pac",
"exti",
],
"rust-analyzer.linkedProjects": [
// Uncomment ONE line for the chip you want to work on.
// This makes rust-analyzer work on the example crate and all its dependencies.
"examples/stm32l4/Cargo.toml",
"embassy-stm32/Cargo.toml",
// "examples/nrf52840-rtic/Cargo.toml",
// "examples/nrf5340/Cargo.toml",
// "examples/nrf-rtos-trace/Cargo.toml",

4
embassy-stm32/Cargo.toml
View file

@ -57,7 +57,7 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa
rand_core = "0.6.3"
sdio-host = "0.5.0"
critical-section = "1.1"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f9f48b067be92fa9ea9dbdce0e85b5d0eb989790" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d5096244fa0b7992454a894a2aeaa369ae674222" }
vcell = "0.1.3"
bxcan = "0.7.0"
nb = "1.0.0"
@ -75,7 +75,7 @@ critical-section = { version = "1.1", features = ["std"] }
[build-dependencies]
proc-macro2 = "1.0.36"
quote = "1.0.15"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f9f48b067be92fa9ea9dbdce0e85b5d0eb989790", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d5096244fa0b7992454a894a2aeaa369ae674222", default-features = false, features = ["metadata"]}
[features]

4
embassy-stm32/src/flash/f0.rs
View file

@ -20,8 +20,8 @@ pub(crate) unsafe fn lock() {
pub(crate) unsafe fn unlock() {
if pac::FLASH.cr().read().lock() {
pac::FLASH.keyr().write(|w| w.set_fkeyr(0x4567_0123));
pac::FLASH.keyr().write(|w| w.set_fkeyr(0xCDEF_89AB));
pac::FLASH.keyr().write_value(0x4567_0123);
pac::FLASH.keyr().write_value(0xCDEF_89AB);
}
}

12
embassy-stm32/src/flash/f3.rs → embassy-stm32/src/flash/f1f3.rs
View file

@ -20,8 +20,8 @@ pub(crate) unsafe fn lock() {
pub(crate) unsafe fn unlock() {
if pac::FLASH.cr().read().lock() {
pac::FLASH.keyr().write(|w| w.set_fkeyr(0x4567_0123));
pac::FLASH.keyr().write(|w| w.set_fkeyr(0xCDEF_89AB));
pac::FLASH.keyr().write_value(0x4567_0123);
pac::FLASH.keyr().write_value(0xCDEF_89AB);
}
}
@ -59,6 +59,14 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E
w.set_strt(true);
});
// Wait for at least one clock cycle before reading the
// BSY bit, because there is a one-cycle delay between
// setting the STRT bit and the BSY bit being asserted
// by hardware. See STM32F105xx, STM32F107xx device errata,
// section 2.2.8
#[cfg(stm32f1)]
pac::FLASH.cr().read();
let mut ret: Result<(), Error> = wait_ready_blocking();
if !pac::FLASH.sr().read().eop() {

4
embassy-stm32/src/flash/f4.rs
View file

@ -227,8 +227,8 @@ pub(crate) unsafe fn lock() {
pub(crate) unsafe fn unlock() {
if pac::FLASH.cr().read().lock() {
pac::FLASH.keyr().write(|w| w.set_key(0x45670123));
pac::FLASH.keyr().write(|w| w.set_key(0xCDEF89AB));
pac::FLASH.keyr().write_value(0x4567_0123);
pac::FLASH.keyr().write_value(0xCDEF_89AB);
}
}

4
embassy-stm32/src/flash/f7.rs
View file

@ -20,8 +20,8 @@ pub(crate) unsafe fn lock() {
pub(crate) unsafe fn unlock() {
if pac::FLASH.cr().read().lock() {
pac::FLASH.keyr().write(|w| w.set_key(0x4567_0123));
pac::FLASH.keyr().write(|w| w.set_key(0xCDEF_89AB));
pac::FLASH.keyr().write_value(0x4567_0123);
pac::FLASH.keyr().write_value(0xCDEF_89AB);
}
}

4
embassy-stm32/src/flash/g.rs
View file

@ -25,8 +25,8 @@ pub(crate) unsafe fn unlock() {
// Unlock flash
if pac::FLASH.cr().read().lock() {
pac::FLASH.keyr().write(|w| w.set_keyr(0x4567_0123));
pac::FLASH.keyr().write(|w| w.set_keyr(0xCDEF_89AB));
pac::FLASH.keyr().write_value(0x4567_0123);
pac::FLASH.keyr().write_value(0xCDEF_89AB);
}
}

8
embassy-stm32/src/flash/h7.rs
View file

@ -27,13 +27,13 @@ pub(crate) unsafe fn lock() {
pub(crate) unsafe fn unlock() {
if pac::FLASH.bank(0).cr().read().lock() {
pac::FLASH.bank(0).keyr().write(|w| w.set_keyr(0x4567_0123));
pac::FLASH.bank(0).keyr().write(|w| w.set_keyr(0xCDEF_89AB));
pac::FLASH.bank(0).keyr().write_value(0x4567_0123);
pac::FLASH.bank(0).keyr().write_value(0xCDEF_89AB);
}
if is_dual_bank() {
if pac::FLASH.bank(1).cr().read().lock() {
pac::FLASH.bank(1).keyr().write(|w| w.set_keyr(0x4567_0123));
pac::FLASH.bank(1).keyr().write(|w| w.set_keyr(0xCDEF_89AB));
pac::FLASH.bank(1).keyr().write_value(0x4567_0123);
pac::FLASH.bank(1).keyr().write_value(0xCDEF_89AB);
}
}
}

12
embassy-stm32/src/flash/l.rs
View file

@ -29,21 +29,21 @@ pub(crate) unsafe fn unlock() {
#[cfg(any(flash_wl, flash_wb, flash_l4))]
{
if pac::FLASH.cr().read().lock() {
pac::FLASH.keyr().write(|w| w.set_keyr(0x4567_0123));
pac::FLASH.keyr().write(|w| w.set_keyr(0xCDEF_89AB));
pac::FLASH.keyr().write_value(0x4567_0123);
pac::FLASH.keyr().write_value(0xCDEF_89AB);
}
}
#[cfg(any(flash_l0, flash_l1))]
{
if pac::FLASH.pecr().read().pelock() {
pac::FLASH.pekeyr().write(|w| w.set_pekeyr(0x89ABCDEF));
pac::FLASH.pekeyr().write(|w| w.set_pekeyr(0x02030405));
pac::FLASH.pekeyr().write_value(0x89AB_CDEF);
pac::FLASH.pekeyr().write_value(0x0203_0405);
}
if pac::FLASH.pecr().read().prglock() {
pac::FLASH.prgkeyr().write(|w| w.set_prgkeyr(0x8C9DAEBF));
pac::FLASH.prgkeyr().write(|w| w.set_prgkeyr(0x13141516));
pac::FLASH.prgkeyr().write_value(0x8C9D_AEBF);
pac::FLASH.prgkeyr().write_value(0x1314_1516);
}
}
}

6
embassy-stm32/src/flash/mod.rs
View file

@ -95,7 +95,7 @@ pub enum FlashBank {
#[cfg_attr(any(flash_l0, flash_l1, flash_l4, flash_wl, flash_wb), path = "l.rs")]
#[cfg_attr(flash_f0, path = "f0.rs")]
#[cfg_attr(flash_f3, path = "f3.rs")]
#[cfg_attr(any(flash_f1, flash_f3), path = "f1f3.rs")]
#[cfg_attr(flash_f4, path = "f4.rs")]
#[cfg_attr(flash_f7, path = "f7.rs")]
#[cfg_attr(any(flash_g0, flash_g4), path = "g.rs")]
@ -103,8 +103,8 @@ pub enum FlashBank {
#[cfg_attr(flash_h7ab, path = "h7.rs")]
#[cfg_attr(
not(any(
flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f3, flash_f4, flash_f7, flash_g0, flash_g4,
flash_h7, flash_h7ab
flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f1, flash_f3, flash_f4, flash_f7, flash_g0,
flash_g4, flash_h7, flash_h7ab
)),
path = "other.rs"
)]