From 264b32d71baf471d0d36a34cc48aa10d429bed04 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Henrik=20Alse=CC=81r?= Date: Wed, 6 Jul 2022 02:35:46 +0200 Subject: [PATCH] Add blocking shared bus for i2c and SPI --- .../src/shared_bus/blocking/i2c.rs | 69 +++++++++++++++++++ .../src/shared_bus/blocking/mod.rs | 3 + .../src/shared_bus/blocking/spi.rs | 69 +++++++++++++++++++ embassy-embedded-hal/src/shared_bus/mod.rs | 6 +- 4 files changed, 145 insertions(+), 2 deletions(-) create mode 100644 embassy-embedded-hal/src/shared_bus/blocking/i2c.rs create mode 100644 embassy-embedded-hal/src/shared_bus/blocking/mod.rs create mode 100644 embassy-embedded-hal/src/shared_bus/blocking/spi.rs diff --git a/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs b/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs new file mode 100644 index 000000000..2a6ea6dc8 --- /dev/null +++ b/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs @@ -0,0 +1,69 @@ +//! Blocking shared I2C bus +use core::cell::RefCell; +use core::fmt::Debug; +use core::future::Future; + +use embedded_hal_1::i2c; + +#[derive(Copy, Clone, Eq, PartialEq, Debug)] +pub enum I2cBusDeviceError { + I2c(BUS), +} + +impl i2c::Error for I2cBusDeviceError +where + BUS: i2c::Error + Debug, +{ + fn kind(&self) -> i2c::ErrorKind { + match self { + Self::I2c(e) => e.kind(), + } + } +} + +pub struct I2cBusDevice<'a, BUS> { + bus: &'a RefCell, +} + +impl<'a, BUS> I2cBusDevice<'a, BUS> { + pub fn new(bus: &'a RefCell) -> Self { + Self { bus } + } +} + +impl<'a, BUS> i2c::ErrorType for I2cBusDevice<'a, BUS> +where + BUS: i2c::ErrorType, +{ + type Error = I2cBusDeviceError; +} + +impl i2c::I2c for I2cBusDevice<'_, BUS> +where + BUS: i2c::I2c, +{ + fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { + let mut bus = self.bus.borrow_mut(); + bus.read(address, buffer).map_err(I2cBusDeviceError::I2c)?; + Ok(()) + } + + fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> { + let mut bus = self.bus.borrow_mut(); + bus.write(address, bytes).map_err(I2cBusDeviceError::I2c)?; + Ok(()) + } + + fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> { + let mut bus = self.bus.borrow_mut(); + bus.write_read(address, wr_buffer, rd_buffer) + .map_err(I2cBusDeviceError::I2c)?; + Ok(()) + } + + fn transaction<'a>(&mut self, address: u8, operations: &mut [i2c::Operation<'a>]) -> Result<(), Self::Error> { + let _ = address; + let _ = operations; + todo!() + } +} diff --git a/embassy-embedded-hal/src/shared_bus/blocking/mod.rs b/embassy-embedded-hal/src/shared_bus/blocking/mod.rs new file mode 100644 index 000000000..c2063ed2e --- /dev/null +++ b/embassy-embedded-hal/src/shared_bus/blocking/mod.rs @@ -0,0 +1,3 @@ +//! Blocking shared bus implementations for embedded-hal +pub mod i2c; +pub mod spi; diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs new file mode 100644 index 000000000..0d01a590b --- /dev/null +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs @@ -0,0 +1,69 @@ +//! Blocking shared SPI bus +use core::cell::RefCell; +use core::fmt::Debug; + +use embedded_hal_1::digital::blocking::OutputPin; +use embedded_hal_1::spi; +use embedded_hal_1::spi::blocking::SpiDevice; + +#[derive(Copy, Clone, Eq, PartialEq, Debug)] +pub enum SpiBusDeviceError { + Spi(BUS), + Cs(CS), +} + +impl spi::Error for SpiBusDeviceError +where + BUS: spi::Error + Debug, + CS: Debug, +{ + fn kind(&self) -> spi::ErrorKind { + match self { + Self::Spi(e) => e.kind(), + Self::Cs(_) => spi::ErrorKind::Other, + } + } +} + +pub struct SpiBusDevice<'a, BUS, CS> { + bus: &'a RefCell, + cs: CS, +} + +impl<'a, BUS, CS> SpiBusDevice<'a, BUS, CS> { + pub fn new(bus: &'a RefCell, cs: CS) -> Self { + Self { bus, cs } + } +} + +impl<'a, BUS, CS> spi::ErrorType for SpiBusDevice<'a, BUS, CS> +where + BUS: spi::ErrorType, + CS: OutputPin, +{ + type Error = SpiBusDeviceError; +} + +impl spi::SpiDevice for SpiBusDevice<'_, BUS, CS> +where + BUS: spi::SpiBusFlush, + CS: OutputPin, +{ + type Bus = BUS; + fn transaction(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result) -> Result { + let mut bus = self.bus.borrow_mut(); + self.cs.set_low().map_err(SpiDeviceWithCsError::Cs)?; + + let f_res = f(&mut bus); + + // On failure, it's important to still flush and deassert CS. + let flush_res = bus.flush(); + let cs_res = self.cs.set_high(); + + let f_res = f_res.map_err(SpiDeviceWithCsError::Spi)?; + flush_res.map_err(SpiDeviceWithCsError::Spi)?; + cs_res.map_err(SpiDeviceWithCsError::Cs)?; + + Ok(f_res) + } +} diff --git a/embassy-embedded-hal/src/shared_bus/mod.rs b/embassy-embedded-hal/src/shared_bus/mod.rs index bd4fd2c31..cd748cac8 100644 --- a/embassy-embedded-hal/src/shared_bus/mod.rs +++ b/embassy-embedded-hal/src/shared_bus/mod.rs @@ -1,4 +1,6 @@ -//! Shared bus implementations for embedded-hal-async - +//! Shared bus implementations +pub mod blocking; +/// Shared i2c bus implementation for embedded-hal-async pub mod i2c; +/// Shared SPI bus implementation for embedded-hal-async pub mod spi;