From 27652798c72d16cbcf2245ae7d4bd4574001ef1f Mon Sep 17 00:00:00 2001
From: seth <seth@transastra.com>
Date: Mon, 1 Jul 2024 06:44:47 -0700
Subject: [PATCH] fix typo, add spaces after //

---
 embassy-stm32/src/adc/ringbuffered_v2.rs | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/embassy-stm32/src/adc/ringbuffered_v2.rs b/embassy-stm32/src/adc/ringbuffered_v2.rs
index 8c5eb9672..fb29d9a8c 100644
--- a/embassy-stm32/src/adc/ringbuffered_v2.rs
+++ b/embassy-stm32/src/adc/ringbuffered_v2.rs
@@ -170,7 +170,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> {
             Self::start_adc();
         }
 
-        //Check the sequence is long enough
+        // Check the sequence is long enough
         T::regs().sqr1().modify(|r| {
             let prev: Sequence = r.l().into();
             if prev < sequence {
@@ -182,10 +182,10 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> {
             }
         });
 
-        //Set this GPIO as an analog input.
+        // Set this GPIO as an analog input.
         channel.setup();
 
-        //Set the channel in the right sequence field.
+        // Set the channel in the right sequence field.
         match sequence {
             Sequence::One => T::regs().sqr3().modify(|w| w.set_sq(0, channel.channel())),
             Sequence::Two => T::regs().sqr3().modify(|w| w.set_sq(1, channel.channel())),
@@ -260,7 +260,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> {
 
         let r = T::regs();
 
-        //Enable ADC
+        // Enable ADC
         let was_on = Self::is_on();
         if !was_on {
             r.cr2().modify(|reg| {
@@ -298,7 +298,7 @@ impl<'d, T: Instance> RingBufferedAdc<'d, T> {
             w.set_eocs(vals::Eocs::EACHCONVERSION);
         });
 
-        //Being ADC conversions
+        // Begin ADC conversions
         T::regs().cr2().modify(|reg| {
             reg.set_adon(true);
             reg.set_swstart(true);