diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs
index 683b0f8b2..51862e185 100644
--- a/embassy-stm32/src/usart/buffered.rs
+++ b/embassy-stm32/src/usart/buffered.rs
@@ -52,7 +52,7 @@ impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for Interrupt
                 // FIXME: Should we disable any further RX interrupts when the buffer becomes full.
             }
 
-            if state.rx_buf.is_full() {
+            if !state.rx_buf.is_empty() {
                 state.rx_waker.wake();
             }
         }