From 2aa836b0686ec358d0cbf27ba41039b5ddf6f63b Mon Sep 17 00:00:00 2001
From: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Date: Tue, 1 Jun 2021 15:57:25 +0200
Subject: [PATCH] Fix L4+ family cfg

---
 stm32-metapac/build.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/stm32-metapac/build.rs b/stm32-metapac/build.rs
index ffea82d52..49ca76201 100644
--- a/stm32-metapac/build.rs
+++ b/stm32-metapac/build.rs
@@ -134,7 +134,7 @@ fn main() {
     let gpio_base = chip.peripherals.get(&"GPIOA".to_string()).unwrap().address;
     let gpio_stride = 0x400;
 
-    cfgs.insert(chip.family.to_ascii_lowercase());
+    cfgs.insert(chip.family.to_ascii_lowercase().replace("+", "plus"));
 
     for (name, p) in &chip.peripherals {
         let mut ir_peri = ir::Peripheral {