Merge pull request #2611 from CBJamo/rp2040_i2c_improvements
Rp2040 i2c improvements
This commit is contained in:
James Munns
GitHub
commit
2cceeab564
4 changed files with 178 additions and 118 deletions
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@ -43,6 +43,18 @@ pub enum Error {
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AddressReserved(u16),
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}
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/// I2C Config error
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum ConfigError {
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/// Max i2c speed is 1MHz
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FrequencyTooHigh,
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/// The sys clock is too slow to support given frequency
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ClockTooSlow,
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/// The sys clock is too fast to support given frequency
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ClockTooFast,
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}
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/// I2C config.
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#[non_exhaustive]
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#[derive(Copy, Clone)]
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@ -365,37 +377,32 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
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) -> Self {
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into_ref!(_peri);
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assert!(config.frequency <= 1_000_000);
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assert!(config.frequency > 0);
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let p = T::regs();
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let reset = T::reset();
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crate::reset::reset(reset);
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crate::reset::unreset_wait(reset);
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p.ic_enable().write(|w| w.set_enable(false));
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// Select controller mode & speed
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p.ic_con().modify(|w| {
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// Always use "fast" mode (<= 400 kHz, works fine for standard
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// mode too)
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w.set_speed(i2c::vals::Speed::FAST);
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w.set_master_mode(true);
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w.set_ic_slave_disable(true);
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w.set_ic_restart_en(true);
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w.set_tx_empty_ctrl(true);
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});
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// Set FIFO watermarks to 1 to make things simpler. This is encoded
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// by a register value of 0.
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p.ic_tx_tl().write(|w| w.set_tx_tl(0));
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p.ic_rx_tl().write(|w| w.set_rx_tl(0));
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// Configure SCL & SDA pins
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set_up_i2c_pin(&scl);
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set_up_i2c_pin(&sda);
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let mut me = Self { phantom: PhantomData };
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if let Err(e) = me.set_config_inner(&config) {
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panic!("Error configuring i2c: {:?}", e);
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}
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me
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}
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fn set_config_inner(&mut self, config: &Config) -> Result<(), ConfigError> {
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if config.frequency > 1_000_000 {
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return Err(ConfigError::FrequencyTooHigh);
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}
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let p = T::regs();
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p.ic_enable().write(|w| w.set_enable(false));
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// Configure baudrate
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// There are some subtleties to I2C timing which we are completely
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@ -408,10 +415,12 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
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let hcnt = period - lcnt; // and 2/5 (40%) of the period high
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// Check for out-of-range divisors:
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assert!(hcnt <= 0xffff);
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assert!(lcnt <= 0xffff);
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assert!(hcnt >= 8);
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assert!(lcnt >= 8);
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if hcnt > 0xffff || lcnt > 0xffff {
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return Err(ConfigError::ClockTooFast);
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}
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if hcnt < 8 || lcnt < 8 {
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return Err(ConfigError::ClockTooSlow);
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}
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// Per I2C-bus specification a device in standard or fast mode must
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// internally provide a hold time of at least 300ns for the SDA
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@ -424,14 +433,19 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
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((clk_base * 3) / 10_000_000) + 1
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} else {
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// fast mode plus requires a clk_base > 32MHz
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assert!(clk_base >= 32_000_000);
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if clk_base <= 32_000_000 {
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return Err(ConfigError::ClockTooSlow);
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}
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// sda_tx_hold_count = clk_base [cycles/s] * 120ns * (1s /
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// 1e9ns) Reduce 120/1e9 to 3/25e6 to avoid numbers that don't
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// fit in uint. Add 1 to avoid division truncation.
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((clk_base * 3) / 25_000_000) + 1
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};
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assert!(sda_tx_hold_count <= lcnt - 2);
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if sda_tx_hold_count > lcnt - 2 {
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return Err(ConfigError::ClockTooSlow);
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}
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p.ic_fs_scl_hcnt().write(|w| w.set_ic_fs_scl_hcnt(hcnt as u16));
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p.ic_fs_scl_lcnt().write(|w| w.set_ic_fs_scl_lcnt(lcnt as u16));
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@ -440,10 +454,9 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
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p.ic_sda_hold()
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.modify(|w| w.set_ic_sda_tx_hold(sda_tx_hold_count as u16));
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// Enable I2C block
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p.ic_enable().write(|w| w.set_enable(true));
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Self { phantom: PhantomData }
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Ok(())
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}
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fn setup(addr: u16) -> Result<(), Error> {
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@ -757,6 +770,15 @@ where
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}
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}
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impl<'d, T: Instance, M: Mode> embassy_embedded_hal::SetConfig for I2c<'d, T, M> {
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type Config = Config;
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type ConfigError = ConfigError;
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fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> {
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self.set_config_inner(config)
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}
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}
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/// Check if address is reserved.
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pub fn i2c_reserved_addr(addr: u16) -> bool {
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((addr & 0x78) == 0 || (addr & 0x78) == 0x78) && addr != 0
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@ -83,6 +83,7 @@ impl Default for Config {
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pub struct I2cSlave<'d, T: Instance> {
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phantom: PhantomData<&'d mut T>,
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pending_byte: Option<u8>,
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config: Config,
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}
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impl<'d, T: Instance> I2cSlave<'d, T> {
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@ -99,6 +100,25 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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assert!(!i2c_reserved_addr(config.addr));
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assert!(config.addr != 0);
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// Configure SCL & SDA pins
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set_up_i2c_pin(&scl);
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set_up_i2c_pin(&sda);
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let mut ret = Self {
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phantom: PhantomData,
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pending_byte: None,
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config,
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};
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ret.reset();
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ret
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}
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/// Reset the i2c peripheral. If you cancel a respond_to_read, you may stall the bus.
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/// You can recover the bus by calling this function, but doing so will almost certainly cause
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/// an i/o error in the master.
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pub fn reset(&mut self) {
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let p = T::regs();
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let reset = T::reset();
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@ -107,7 +127,7 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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p.ic_enable().write(|w| w.set_enable(false));
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p.ic_sar().write(|w| w.set_ic_sar(config.addr));
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p.ic_sar().write(|w| w.set_ic_sar(self.config.addr));
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p.ic_con().modify(|w| {
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w.set_master_mode(false);
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w.set_ic_slave_disable(false);
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@ -121,10 +141,10 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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// Generate stop interrupts for general calls
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// This also causes stop interrupts for other devices on the bus but those will not be
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// propagated up to the application.
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w.set_stop_det_ifaddressed(!config.general_call);
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w.set_stop_det_ifaddressed(!self.config.general_call);
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});
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p.ic_ack_general_call()
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.write(|w| w.set_ack_gen_call(config.general_call));
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.write(|w| w.set_ack_gen_call(self.config.general_call));
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// Set FIFO watermarks to 1 to make things simpler. This is encoded
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// by a register value of 0. Rx watermark should never change, but Tx watermark will be
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@ -132,10 +152,6 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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p.ic_tx_tl().write(|w| w.set_tx_tl(0));
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p.ic_rx_tl().write(|w| w.set_rx_tl(0));
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// Configure SCL & SDA pins
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set_up_i2c_pin(&scl);
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set_up_i2c_pin(&sda);
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// Clear interrupts
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p.ic_clr_intr().read();
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@ -146,11 +162,6 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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p.ic_intr_mask().write_value(i2c::regs::IcIntrMask(0));
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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Self {
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phantom: PhantomData,
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pending_byte: None,
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}
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}
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/// Calls `f` to check if we are ready or not.
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@ -178,15 +189,13 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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fn drain_fifo(&mut self, buffer: &mut [u8], offset: &mut usize) {
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let p = T::regs();
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for b in &mut buffer[*offset..] {
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if let Some(pending) = self.pending_byte.take() {
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*b = pending;
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*offset += 1;
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continue;
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}
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if let Some(pending) = self.pending_byte.take() {
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buffer[*offset] = pending;
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*offset += 1;
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}
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let status = p.ic_status().read();
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if !status.rfne() {
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for b in &mut buffer[*offset..] {
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if !p.ic_status().read().rfne() {
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break;
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}
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@ -207,14 +216,6 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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}
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}
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#[inline(always)]
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fn write_to_fifo(&mut self, buffer: &[u8]) {
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let p = T::regs();
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for byte in buffer {
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p.ic_data_cmd().write(|w| w.set_dat(*byte));
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}
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}
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/// Wait asynchronously for commands from an I2C master.
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/// `buffer` is provided in case master does a 'write', 'write read', or 'general call' and is unused for 'read'.
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pub async fn listen(&mut self, buffer: &mut [u8]) -> Result<Command, Error> {
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@ -227,8 +228,9 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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self.wait_on(
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|me| {
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let stat = p.ic_raw_intr_stat().read();
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trace!("ls:{:013b} len:{}", stat.0, len);
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if p.ic_rxflr().read().rxflr() > 0 {
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if p.ic_rxflr().read().rxflr() > 0 || me.pending_byte.is_some() {
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me.drain_fifo(buffer, &mut len);
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// we're recieving data, set rx fifo watermark to 12 bytes (3/4 full) to reduce interrupt noise
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p.ic_rx_tl().write(|w| w.set_rx_tl(11));
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@ -241,6 +243,10 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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return Poll::Ready(Err(Error::PartialWrite(buffer.len())));
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}
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}
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trace!("len:{}, pend:{:?}", len, me.pending_byte);
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if me.pending_byte.is_some() {
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warn!("pending")
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}
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if stat.restart_det() && stat.rd_req() {
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p.ic_clr_restart_det().read();
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@ -257,12 +263,17 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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p.ic_clr_restart_det().read();
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p.ic_clr_gen_call().read();
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Poll::Ready(Ok(Command::Read))
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} else if stat.stop_det() {
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// clear stuck stop bit
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// This can happen if the SDA/SCL pullups are enabled after calling this func
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p.ic_clr_stop_det().read();
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Poll::Pending
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} else {
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Poll::Pending
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}
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},
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|_me| {
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p.ic_intr_mask().modify(|w| {
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p.ic_intr_mask().write(|w| {
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w.set_m_stop_det(true);
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w.set_m_restart_det(true);
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w.set_m_gen_call(true);
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@ -286,27 +297,30 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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self.wait_on(
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|me| {
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if let Err(abort_reason) = me.read_and_clear_abort_reason() {
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if let Error::Abort(AbortReason::TxNotEmpty(bytes)) = abort_reason {
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p.ic_clr_intr().read();
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return Poll::Ready(Ok(ReadStatus::LeftoverBytes(bytes)));
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} else {
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return Poll::Ready(Err(abort_reason));
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let stat = p.ic_raw_intr_stat().read();
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trace!("rs:{:013b}", stat.0);
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if stat.tx_abrt() {
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if let Err(abort_reason) = me.read_and_clear_abort_reason() {
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if let Error::Abort(AbortReason::TxNotEmpty(bytes)) = abort_reason {
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p.ic_clr_intr().read();
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return Poll::Ready(Ok(ReadStatus::LeftoverBytes(bytes)));
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} else {
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return Poll::Ready(Err(abort_reason));
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}
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}
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}
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if let Some(chunk) = chunks.next() {
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me.write_to_fifo(chunk);
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p.ic_clr_rd_req().read();
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for byte in chunk {
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p.ic_clr_rd_req().read();
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p.ic_data_cmd().write(|w| w.set_dat(*byte));
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}
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Poll::Pending
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} else {
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let stat = p.ic_raw_intr_stat().read();
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if stat.rx_done() && stat.stop_det() {
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if stat.rx_done() {
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p.ic_clr_rx_done().read();
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p.ic_clr_stop_det().read();
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Poll::Ready(Ok(ReadStatus::Done))
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} else if stat.rd_req() && stat.tx_empty() {
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Poll::Ready(Ok(ReadStatus::NeedMoreBytes))
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@ -316,8 +330,7 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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}
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},
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|_me| {
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p.ic_intr_mask().modify(|w| {
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w.set_m_stop_det(true);
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p.ic_intr_mask().write(|w| {
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w.set_m_rx_done(true);
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w.set_m_tx_empty(true);
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w.set_m_tx_abrt(true);
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@ -329,9 +342,14 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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/// Respond to reads with the fill byte until the controller stops asking
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pub async fn respond_till_stop(&mut self, fill: u8) -> Result<(), Error> {
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// Send fill bytes a full fifo at a time, to reduce interrupt noise.
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// This does mean we'll almost certainly abort the write, but since these are fill bytes,
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// we don't care.
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let buff = [fill; FIFO_SIZE as usize];
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loop {
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match self.respond_to_read(&[fill]).await {
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match self.respond_to_read(&buff).await {
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Ok(ReadStatus::NeedMoreBytes) => (),
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Ok(ReadStatus::LeftoverBytes(_)) => break Ok(()),
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Ok(_) => break Ok(()),
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Err(e) => break Err(e),
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}
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@ -353,10 +371,7 @@ impl<'d, T: Instance> I2cSlave<'d, T> {
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#[inline(always)]
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fn read_and_clear_abort_reason(&mut self) -> Result<(), Error> {
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let p = T::regs();
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let mut abort_reason = p.ic_tx_abrt_source().read();
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// Mask off master_dis
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abort_reason.set_abrt_master_dis(false);
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let abort_reason = p.ic_tx_abrt_source().read();
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if abort_reason.0 != 0 {
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// Note clearing the abort flag also clears the reason, and this
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@ -14,6 +14,7 @@ embassy-rp = { version = "0.1.0", path = "../../embassy-rp", features = [ "defmt
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embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
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embassy-net = { version = "0.4.0", path = "../../embassy-net", features = ["defmt", "tcp", "udp", "dhcpv4", "medium-ethernet"] }
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embassy-net-wiznet = { version = "0.1.0", path = "../../embassy-net-wiznet", features = ["defmt"] }
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embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal/"}
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cyw43 = { path = "../../cyw43", features = ["defmt", "firmware-logs"] }
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cyw43-pio = { path = "../../cyw43-pio", features = ["defmt", "overclock"] }
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perf-client = { path = "../perf-client" }
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@ -3,7 +3,10 @@
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teleprobe_meta::target!(b"rpi-pico");
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use defmt::{assert_eq, info, panic, unwrap};
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use embassy_executor::Executor;
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use embassy_embedded_hal::SetConfig;
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use embassy_executor::{Executor, Spawner};
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use embassy_rp::clocks::{PllConfig, XoscConfig};
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use embassy_rp::config::Config as rpConfig;
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use embassy_rp::multicore::{spawn_core1, Stack};
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use embassy_rp::peripherals::{I2C0, I2C1};
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use embassy_rp::{bind_interrupts, i2c, i2c_slave};
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@ -13,7 +16,6 @@ use static_cell::StaticCell;
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use {defmt_rtt as _, panic_probe as _, panic_probe as _, panic_probe as _};
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|
||||
static mut CORE1_STACK: Stack<1024> = Stack::new();
|
||||
static EXECUTOR0: StaticCell<Executor> = StaticCell::new();
|
||||
static EXECUTOR1: StaticCell<Executor> = StaticCell::new();
|
||||
|
||||
use crate::i2c::AbortReason;
|
||||
|
|
@ -44,10 +46,7 @@ async fn device_task(mut dev: i2c_slave::I2cSlave<'static, I2C1>) -> ! {
|
|||
Ok(x) => match x {
|
||||
i2c_slave::ReadStatus::Done => break,
|
||||
i2c_slave::ReadStatus::NeedMoreBytes => count += 1,
|
||||
i2c_slave::ReadStatus::LeftoverBytes(x) => {
|
||||
info!("tried to write {} extra bytes", x);
|
||||
break;
|
||||
}
|
||||
i2c_slave::ReadStatus::LeftoverBytes(x) => panic!("tried to write {} extra bytes", x),
|
||||
},
|
||||
Err(e) => match e {
|
||||
embassy_rp::i2c_slave::Error::Abort(AbortReason::Other(n)) => panic!("Other {:b}", n),
|
||||
|
|
@ -92,6 +91,8 @@ async fn device_task(mut dev: i2c_slave::I2cSlave<'static, I2C1>) -> ! {
|
|||
resp_buff[i] = i as u8;
|
||||
}
|
||||
dev.respond_to_read(&resp_buff).await.unwrap();
|
||||
// reset count for next round of tests
|
||||
count = 0xD0;
|
||||
}
|
||||
x => panic!("Invalid Write Read {:x}", x),
|
||||
}
|
||||
|
|
@ -104,8 +105,7 @@ async fn device_task(mut dev: i2c_slave::I2cSlave<'static, I2C1>) -> ! {
|
|||
}
|
||||
}
|
||||
|
||||
#[embassy_executor::task]
|
||||
async fn controller_task(mut con: i2c::I2c<'static, I2C0, i2c::Async>) {
|
||||
async fn controller_task(con: &mut i2c::I2c<'static, I2C0, i2c::Async>) {
|
||||
info!("Device start");
|
||||
|
||||
{
|
||||
|
|
@ -179,33 +179,55 @@ async fn controller_task(mut con: i2c::I2c<'static, I2C0, i2c::Async>) {
|
|||
info!("large write_read - OK")
|
||||
}
|
||||
|
||||
info!("Test OK");
|
||||
cortex_m::asm::bkpt();
|
||||
}
|
||||
|
||||
#[cortex_m_rt::entry]
|
||||
fn main() -> ! {
|
||||
let p = embassy_rp::init(Default::default());
|
||||
info!("Hello World!");
|
||||
|
||||
let d_sda = p.PIN_19;
|
||||
let d_scl = p.PIN_18;
|
||||
let mut config = i2c_slave::Config::default();
|
||||
config.addr = DEV_ADDR as u16;
|
||||
let device = i2c_slave::I2cSlave::new(p.I2C1, d_sda, d_scl, Irqs, config);
|
||||
|
||||
spawn_core1(p.CORE1, unsafe { &mut CORE1_STACK }, move || {
|
||||
let executor1 = EXECUTOR1.init(Executor::new());
|
||||
executor1.run(|spawner| unwrap!(spawner.spawn(device_task(device))));
|
||||
});
|
||||
|
||||
let executor0 = EXECUTOR0.init(Executor::new());
|
||||
|
||||
let c_sda = p.PIN_21;
|
||||
let c_scl = p.PIN_20;
|
||||
let mut config = i2c::Config::default();
|
||||
config.frequency = 5_000;
|
||||
let controller = i2c::I2c::new_async(p.I2C0, c_sda, c_scl, Irqs, config);
|
||||
|
||||
executor0.run(|spawner| unwrap!(spawner.spawn(controller_task(controller))));
|
||||
#[embassy_executor::main]
|
||||
async fn main(_core0_spawner: Spawner) {
|
||||
let mut config = rpConfig::default();
|
||||
// Configure clk_sys to 48MHz to support 1kHz scl.
|
||||
// In theory it can go lower, but we won't bother to test below 1kHz.
|
||||
config.clocks.xosc = Some(XoscConfig {
|
||||
hz: 12_000_000,
|
||||
delay_multiplier: 128,
|
||||
sys_pll: Some(PllConfig {
|
||||
refdiv: 1,
|
||||
fbdiv: 120,
|
||||
post_div1: 6,
|
||||
post_div2: 5,
|
||||
}),
|
||||
usb_pll: Some(PllConfig {
|
||||
refdiv: 1,
|
||||
fbdiv: 120,
|
||||
post_div1: 6,
|
||||
post_div2: 5,
|
||||
}),
|
||||
});
|
||||
|
||||
let p = embassy_rp::init(config);
|
||||
info!("Hello World!");
|
||||
|
||||
let d_sda = p.PIN_19;
|
||||
let d_scl = p.PIN_18;
|
||||
let mut config = i2c_slave::Config::default();
|
||||
config.addr = DEV_ADDR as u16;
|
||||
let device = i2c_slave::I2cSlave::new(p.I2C1, d_sda, d_scl, Irqs, config);
|
||||
|
||||
spawn_core1(p.CORE1, unsafe { &mut CORE1_STACK }, move || {
|
||||
let executor1 = EXECUTOR1.init(Executor::new());
|
||||
executor1.run(|spawner| unwrap!(spawner.spawn(device_task(device))));
|
||||
});
|
||||
|
||||
let c_sda = p.PIN_21;
|
||||
let c_scl = p.PIN_20;
|
||||
let mut controller = i2c::I2c::new_async(p.I2C0, c_sda, c_scl, Irqs, Default::default());
|
||||
|
||||
for freq in [1000, 100_000, 400_000, 1_000_000] {
|
||||
info!("testing at {}hz", freq);
|
||||
let mut config = i2c::Config::default();
|
||||
config.frequency = freq;
|
||||
controller.set_config(&config).unwrap();
|
||||
controller_task(&mut controller).await;
|
||||
}
|
||||
|
||||
info!("Test OK");
|
||||
cortex_m::asm::bkpt();
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue