stm32-metapac: remove all macrotables, deduplicate metadata files.
This commit is contained in:
Dario Nieuwenhuis
parent
dd828a7a92
commit
451bb48464
9 changed files with 435 additions and 515 deletions
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@ -1,6 +0,0 @@
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// GEN PATHS HERE
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mod inner;
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pub mod common;
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pub use inner::*;
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@ -1,8 +1,9 @@
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use chiptool::generate::CommonModule;
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use chiptool::{generate, ir, transform};
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use proc_macro2::TokenStream;
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use regex::Regex;
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use std::collections::{BTreeMap, HashMap, HashSet};
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use std::fmt::Write as _;
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use std::fmt::{Debug, Write as _};
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use std::fs;
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use std::fs::File;
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use std::io::Write;
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@ -10,9 +11,6 @@ use std::path::Path;
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use std::path::PathBuf;
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use std::str::FromStr;
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use chiptool::util::ToSanitizedSnakeCase;
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use chiptool::{generate, ir, transform};
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mod data;
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use data::*;
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@ -27,78 +25,28 @@ struct Metadata<'a> {
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dma_channels: &'a [DmaChannel],
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}
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fn make_peripheral_counts(out: &mut String, data: &BTreeMap<String, u8>) {
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write!(
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out,
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"#[macro_export]
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macro_rules! peripheral_count {{
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"
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)
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.unwrap();
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for (name, count) in data {
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write!(out, "({}) => ({});\n", name, count,).unwrap();
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}
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write!(out, " }}\n").unwrap();
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}
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fn make_dma_channel_counts(out: &mut String, data: &BTreeMap<String, u8>) {
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if data.len() == 0 {
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return;
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}
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write!(
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out,
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"#[macro_export]
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macro_rules! dma_channels_count {{
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"
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)
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.unwrap();
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for (name, count) in data {
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write!(out, "({}) => ({});\n", name, count,).unwrap();
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}
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write!(out, " }}\n").unwrap();
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}
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fn make_table(out: &mut String, name: &str, data: &Vec<Vec<String>>) {
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write!(
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out,
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"#[macro_export]
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macro_rules! {} {{
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($($pat:tt => $code:tt;)*) => {{
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macro_rules! __{}_inner {{
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$(($pat) => $code;)*
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($_:tt) => {{}}
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}}
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",
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name, name
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)
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.unwrap();
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for row in data {
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write!(out, " __{}_inner!(({}));\n", name, row.join(",")).unwrap();
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}
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write!(
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out,
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" }};
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}}"
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)
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.unwrap();
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}
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pub struct Options {
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pub chips: Vec<String>,
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pub out_dir: PathBuf,
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pub data_dir: PathBuf,
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}
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pub fn gen_chip(
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options: &Options,
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chip_core_name: &str,
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chip: &Chip,
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core: &Core,
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core_index: usize,
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all_peripheral_versions: &mut HashSet<(String, String)>,
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) {
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pub struct Gen {
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opts: Options,
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all_peripheral_versions: HashSet<(String, String)>,
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metadata_dedup: HashMap<String, String>,
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}
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impl Gen {
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pub fn new(opts: Options) -> Self {
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Self {
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opts,
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all_peripheral_versions: HashSet::new(),
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metadata_dedup: HashMap::new(),
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}
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}
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fn gen_chip(&mut self, chip_core_name: &str, chip: &Chip, core: &Core, core_index: usize) {
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let mut ir = ir::IR::new();
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let mut dev = ir::Device {
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@ -106,29 +54,7 @@ pub fn gen_chip(
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peripherals: Vec::new(),
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};
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// Load DBGMCU register for chip
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let mut dbgmcu: Option<ir::IR> = core.peripherals.iter().find_map(|p| {
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if p.name == "DBGMCU" {
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p.registers.as_ref().map(|bi| {
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let dbgmcu_reg_path = options
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.data_dir
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.join("registers")
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.join(&format!("{}_{}.yaml", bi.kind, bi.version));
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serde_yaml::from_reader(File::open(dbgmcu_reg_path).unwrap()).unwrap()
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})
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} else {
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None
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}
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});
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let mut peripheral_versions: BTreeMap<String, String> = BTreeMap::new();
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let mut pin_table: Vec<Vec<String>> = Vec::new();
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let mut interrupt_table: Vec<Vec<String>> = Vec::new();
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let mut peripherals_table: Vec<Vec<String>> = Vec::new();
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let mut dma_channels_table: Vec<Vec<String>> = Vec::new();
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let mut peripheral_counts: BTreeMap<String, u8> = BTreeMap::new();
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let mut dma_channel_counts: BTreeMap<String, u8> = BTreeMap::new();
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let mut dbgmcu_table: Vec<Vec<String>> = Vec::new();
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let gpio_base = core
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.peripherals
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@ -138,26 +64,7 @@ pub fn gen_chip(
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.address as u32;
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let gpio_stride = 0x400;
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let number_suffix_re = Regex::new("^(.*?)[0-9]*$").unwrap();
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if let Some(ref mut reg) = dbgmcu {
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if let Some(ref cr) = reg.fieldsets.get("CR") {
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for field in cr.fields.iter().filter(|e| e.name.contains("DBG")) {
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let mut fn_name = String::new();
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fn_name.push_str("set_");
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fn_name.push_str(&field.name.to_sanitized_snake_case());
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dbgmcu_table.push(vec!["cr".into(), fn_name]);
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}
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}
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}
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for p in &core.peripherals {
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let captures = number_suffix_re.captures(&p.name).unwrap();
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let root_peri_name = captures.get(1).unwrap().as_str().to_string();
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peripheral_counts.insert(
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root_peri_name.clone(),
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peripheral_counts.get(&root_peri_name).map_or(1, |v| v + 1),
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);
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let mut ir_peri = ir::Peripheral {
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name: p.name.clone(),
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array: None,
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@ -168,26 +75,6 @@ pub fn gen_chip(
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};
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if let Some(bi) = &p.registers {
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peripheral_counts.insert(
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bi.kind.clone(),
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peripheral_counts.get(&bi.kind).map_or(1, |v| v + 1),
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);
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for irq in &p.interrupts {
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let mut row = Vec::new();
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row.push(p.name.clone());
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row.push(bi.kind.clone());
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row.push(bi.block.clone());
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row.push(irq.signal.clone());
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row.push(irq.interrupt.to_ascii_uppercase());
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interrupt_table.push(row)
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}
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let mut peripheral_row = Vec::new();
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peripheral_row.push(bi.kind.clone());
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peripheral_row.push(p.name.clone());
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peripherals_table.push(peripheral_row);
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if let Some(old_version) =
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peripheral_versions.insert(bi.kind.clone(), bi.version.clone())
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{
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@ -200,72 +87,20 @@ pub fn gen_chip(
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}
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ir_peri.block = Some(format!("{}::{}", bi.kind, bi.block));
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match bi.kind.as_str() {
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"gpio" => {
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let port_letter = p.name.chars().skip(4).next().unwrap();
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if bi.kind == "gpio" {
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assert_eq!(0, (p.address as u32 - gpio_base) % gpio_stride);
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let port_num = (p.address as u32 - gpio_base) / gpio_stride;
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for pin_num in 0u32..16 {
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let pin_name = format!("P{}{}", port_letter, pin_num);
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pin_table.push(vec![
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pin_name.clone(),
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p.name.clone(),
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port_num.to_string(),
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pin_num.to_string(),
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format!("EXTI{}", pin_num),
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]);
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}
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}
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_ => {}
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}
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}
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dev.peripherals.push(ir_peri);
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}
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for ch in &core.dma_channels {
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let mut row = Vec::new();
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let dma_peri = core.peripherals.iter().find(|p| p.name == ch.dma).unwrap();
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let bi = dma_peri.registers.as_ref().unwrap();
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row.push(ch.name.clone());
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row.push(ch.dma.clone());
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row.push(bi.kind.clone());
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row.push(ch.channel.to_string());
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if let Some(dmamux) = &ch.dmamux {
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let dmamux_channel = ch.dmamux_channel.unwrap();
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row.push(format!(
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"{{dmamux: {}, dmamux_channel: {}}}",
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dmamux, dmamux_channel
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));
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} else {
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row.push("{}".to_string());
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}
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dma_channels_table.push(row);
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let dma_peri_name = ch.dma.clone();
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dma_channel_counts.insert(
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dma_peri_name.clone(),
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dma_channel_counts.get(&dma_peri_name).map_or(1, |v| v + 1),
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);
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}
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for irq in &core.interrupts {
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dev.interrupts.push(ir::Interrupt {
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name: irq.name.clone(),
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description: None,
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value: irq.number,
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});
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let name = irq.name.to_ascii_uppercase();
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interrupt_table.push(vec![name.clone()]);
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if name.contains("EXTI") {
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interrupt_table.push(vec!["EXTI".to_string(), name.clone()]);
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}
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}
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ir.devices.insert("".to_string(), dev);
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@ -278,7 +113,8 @@ pub fn gen_chip(
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);
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for (module, version) in &peripheral_versions {
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all_peripheral_versions.insert((module.clone(), version.clone()));
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self.all_peripheral_versions
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.insert((module.clone(), version.clone()));
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write!(
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&mut extra,
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"#[path=\"../../peripherals/{}_{}.rs\"] pub mod {};\n",
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@ -300,7 +136,8 @@ pub fn gen_chip(
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// ==============================
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// Setup chip dir
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let chip_dir = options
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let chip_dir = self
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.opts
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.out_dir
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.join("src/chips")
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.join(chip_core_name.to_ascii_lowercase());
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@ -325,61 +162,53 @@ pub fn gen_chip(
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write!(&mut device_x, "PROVIDE({} = DefaultHandler);\n", irq.name).unwrap();
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}
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// ==============================
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// generate mod.rs
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let mut data = String::new();
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write!(&mut data, "#[cfg(feature=\"metadata\")] pub mod metadata;").unwrap();
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write!(&mut data, "#[cfg(feature=\"pac\")] mod pac;").unwrap();
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write!(&mut data, "#[cfg(feature=\"pac\")] pub use pac::*; ").unwrap();
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let peripheral_version_table = peripheral_versions
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.iter()
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.map(|(kind, version)| vec![kind.clone(), version.clone()])
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.collect();
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make_table(&mut data, "pins", &pin_table);
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make_table(&mut data, "interrupts", &interrupt_table);
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make_table(&mut data, "peripherals", &peripherals_table);
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make_table(&mut data, "peripheral_versions", &peripheral_version_table);
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make_table(&mut data, "dma_channels", &dma_channels_table);
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make_table(&mut data, "dbgmcu", &dbgmcu_table);
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make_peripheral_counts(&mut data, &peripheral_counts);
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make_dma_channel_counts(&mut data, &dma_channel_counts);
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let mut file = File::create(chip_dir.join("mod.rs")).unwrap();
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file.write_all(data.as_bytes()).unwrap();
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// ==============================
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// generate metadata.rs
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let metadata = Metadata {
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name: &chip.name,
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family: &chip.family,
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line: &chip.line,
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memory: &chip.memory,
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peripherals: &core.peripherals,
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interrupts: &core.interrupts,
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dma_channels: &core.dma_channels,
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};
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let metadata = format!("{:#?}", metadata);
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let metadata = metadata.replace("[\n", "&[\n");
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let metadata = metadata.replace("[],\n", "&[],\n");
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// (peripherals, interrupts, dma_channels) are often equal across multiple chips.
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// To reduce bloat, deduplicate them.
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let mut data = String::new();
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write!(
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&mut data,
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"
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include!(\"../../metadata.rs\");
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use MemoryRegionKind::*;
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pub const METADATA: Metadata = {};
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const PERIPHERALS: &'static [Peripheral] = {};
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const INTERRUPTS: &'static [Interrupt] = {};
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const DMA_CHANNELS: &'static [DmaChannel] = {};
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",
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metadata
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stringify(&core.peripherals),
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stringify(&core.interrupts),
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stringify(&core.dma_channels),
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)
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.unwrap();
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let out_dir = self.opts.out_dir.clone();
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let n = self.metadata_dedup.len();
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let deduped_file = self.metadata_dedup.entry(data.clone()).or_insert_with(|| {
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let file = format!("metadata_{:04}.rs", n);
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let path = out_dir.join("src/chips").join(&file);
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fs::write(path, data).unwrap();
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file
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});
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let data = format!(
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"include!(\"../{}\");
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pub const METADATA: Metadata = Metadata {{
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name: {:?},
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family: {:?},
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line: {:?},
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memory: {},
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peripherals: PERIPHERALS,
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interrupts: INTERRUPTS,
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dma_channels: DMA_CHANNELS,
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}};",
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deduped_file,
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&chip.name,
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&chip.family,
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&chip.line,
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stringify(&chip.memory),
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);
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let mut file = File::create(chip_dir.join("metadata.rs")).unwrap();
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file.write_all(data.as_bytes()).unwrap();
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@ -396,8 +225,9 @@ pub fn gen_chip(
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gen_memory_x(&chip_dir, &chip);
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}
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fn load_chip(options: &Options, name: &str) -> Chip {
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let chip_path = options
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fn load_chip(&mut self, name: &str) -> Chip {
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let chip_path = self
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.opts
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.data_dir
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.join("chips")
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.join(&format!("{}.json", name));
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@ -405,23 +235,16 @@ fn load_chip(options: &Options, name: &str) -> Chip {
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serde_yaml::from_slice(&chip).unwrap()
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}
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fn gen_opts() -> generate::Options {
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generate::Options {
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common_module: CommonModule::External(TokenStream::from_str("crate::common").unwrap()),
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}
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}
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pub fn gen(&mut self) {
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fs::create_dir_all(self.opts.out_dir.join("src/peripherals")).unwrap();
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fs::create_dir_all(self.opts.out_dir.join("src/chips")).unwrap();
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pub fn gen(options: Options) {
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fs::create_dir_all(options.out_dir.join("src/peripherals")).unwrap();
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fs::create_dir_all(options.out_dir.join("src/chips")).unwrap();
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let mut all_peripheral_versions: HashSet<(String, String)> = HashSet::new();
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let mut chip_core_names: Vec<String> = Vec::new();
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for chip_name in &options.chips {
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for chip_name in &self.opts.chips.clone() {
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println!("Generating {}...", chip_name);
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let mut chip = load_chip(&options, chip_name);
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let mut chip = self.load_chip(chip_name);
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// Cleanup
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for core in &mut chip.cores {
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@ -443,21 +266,14 @@ pub fn gen(options: Options) {
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};
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chip_core_names.push(chip_core_name.clone());
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gen_chip(
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&options,
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&chip_core_name,
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&chip,
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core,
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core_index,
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&mut all_peripheral_versions,
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)
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self.gen_chip(&chip_core_name, &chip, core, core_index)
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}
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}
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for (module, version) in all_peripheral_versions {
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for (module, version) in &self.all_peripheral_versions {
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println!("loading {} {}", module, version);
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let regs_path = Path::new(&options.data_dir)
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let regs_path = Path::new(&self.opts.data_dir)
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.join("registers")
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.join(&format!("{}_{}.yaml", module, version));
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@ -479,7 +295,7 @@ pub fn gen(options: Options) {
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let items = generate::render(&ir, &gen_opts()).unwrap();
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let mut file = File::create(
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options
|
||||
self.opts
|
||||
.out_dir
|
||||
.join("src/peripherals")
|
||||
.join(format!("{}_{}.rs", module, version)),
|
||||
|
|
@ -493,50 +309,6 @@ pub fn gen(options: Options) {
|
|||
file.write_all(data.as_bytes()).unwrap();
|
||||
}
|
||||
|
||||
// Generate src/lib_inner.rs
|
||||
const PATHS_MARKER: &[u8] = b"// GEN PATHS HERE";
|
||||
let librs = include_bytes!("assets/lib_inner.rs");
|
||||
let i = bytes_find(librs, PATHS_MARKER).unwrap();
|
||||
let mut paths = String::new();
|
||||
|
||||
for name in chip_core_names {
|
||||
let x = name.to_ascii_lowercase();
|
||||
write!(
|
||||
&mut paths,
|
||||
"#[cfg_attr(feature=\"{}\", path = \"chips/{}/mod.rs\")]",
|
||||
x, x
|
||||
)
|
||||
.unwrap();
|
||||
}
|
||||
let mut contents: Vec<u8> = Vec::new();
|
||||
contents.extend(&librs[..i]);
|
||||
contents.extend(paths.as_bytes());
|
||||
contents.extend(&librs[i + PATHS_MARKER.len()..]);
|
||||
fs::write(options.out_dir.join("src").join("lib_inner.rs"), &contents).unwrap();
|
||||
|
||||
// Generate src/lib.rs
|
||||
const CUT_MARKER: &[u8] = b"// GEN CUT HERE";
|
||||
let librs = include_bytes!("../../stm32-metapac/src/lib.rs");
|
||||
let i = bytes_find(librs, CUT_MARKER).unwrap();
|
||||
let mut contents: Vec<u8> = Vec::new();
|
||||
contents.extend(&librs[..i]);
|
||||
contents.extend(b"include!(\"lib_inner.rs\");\n");
|
||||
fs::write(options.out_dir.join("src").join("lib.rs"), contents).unwrap();
|
||||
|
||||
// Generate src/common.rs
|
||||
fs::write(
|
||||
options.out_dir.join("src").join("common.rs"),
|
||||
generate::COMMON_MODULE,
|
||||
)
|
||||
.unwrap();
|
||||
|
||||
// Generate src/metadata.rs
|
||||
fs::write(
|
||||
options.out_dir.join("src").join("metadata.rs"),
|
||||
include_bytes!("assets/metadata.rs"),
|
||||
)
|
||||
.unwrap();
|
||||
|
||||
// Generate Cargo.toml
|
||||
const BUILDDEP_BEGIN: &[u8] = b"# BEGIN BUILD DEPENDENCIES";
|
||||
const BUILDDEP_END: &[u8] = b"# END BUILD DEPENDENCIES";
|
||||
|
|
@ -545,14 +317,30 @@ pub fn gen(options: Options) {
|
|||
let begin = bytes_find(&contents, BUILDDEP_BEGIN).unwrap();
|
||||
let end = bytes_find(&contents, BUILDDEP_END).unwrap() + BUILDDEP_END.len();
|
||||
contents.drain(begin..end);
|
||||
fs::write(options.out_dir.join("Cargo.toml"), contents).unwrap();
|
||||
fs::write(self.opts.out_dir.join("Cargo.toml"), contents).unwrap();
|
||||
|
||||
// Generate build.rs
|
||||
// copy misc files
|
||||
fs::write(
|
||||
options.out_dir.join("build.rs"),
|
||||
include_bytes!("assets/build.rs"),
|
||||
self.opts.out_dir.join("build.rs"),
|
||||
include_bytes!("../../stm32-metapac/build_pregenerated.rs"),
|
||||
)
|
||||
.unwrap();
|
||||
fs::write(
|
||||
self.opts.out_dir.join("src/lib.rs"),
|
||||
include_bytes!("../../stm32-metapac/src/lib.rs"),
|
||||
)
|
||||
.unwrap();
|
||||
fs::write(
|
||||
self.opts.out_dir.join("src/common.rs"),
|
||||
include_bytes!("../../stm32-metapac/src/common.rs"),
|
||||
)
|
||||
.unwrap();
|
||||
fs::write(
|
||||
self.opts.out_dir.join("src/metadata.rs"),
|
||||
include_bytes!("../../stm32-metapac/src/metadata.rs"),
|
||||
)
|
||||
.unwrap();
|
||||
}
|
||||
}
|
||||
|
||||
fn bytes_find(haystack: &[u8], needle: &[u8]) -> Option<usize> {
|
||||
|
|
@ -561,6 +349,23 @@ fn bytes_find(haystack: &[u8], needle: &[u8]) -> Option<usize> {
|
|||
.position(|window| window == needle)
|
||||
}
|
||||
|
||||
fn stringify<T: Debug>(metadata: T) -> String {
|
||||
let mut metadata = format!("{:?}", metadata);
|
||||
if metadata.starts_with('[') {
|
||||
metadata = format!("&{}", metadata);
|
||||
}
|
||||
metadata = metadata.replace(": [", ": &[");
|
||||
metadata = metadata.replace("kind: Ram", "kind: MemoryRegionKind::Ram");
|
||||
metadata = metadata.replace("kind: Flash", "kind: MemoryRegionKind::Flash");
|
||||
metadata
|
||||
}
|
||||
|
||||
fn gen_opts() -> generate::Options {
|
||||
generate::Options {
|
||||
common_module: CommonModule::External(TokenStream::from_str("crate::common").unwrap()),
|
||||
}
|
||||
}
|
||||
|
||||
fn gen_memory_x(out_dir: &PathBuf, chip: &Chip) {
|
||||
let mut memory_x = String::new();
|
||||
|
||||
|
|
|
|||
|
|
@ -26,9 +26,10 @@ fn main() {
|
|||
|
||||
chips.sort();
|
||||
|
||||
gen(Options {
|
||||
let opts = Options {
|
||||
out_dir,
|
||||
data_dir,
|
||||
chips,
|
||||
})
|
||||
};
|
||||
Gen::new(opts).gen();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -3,6 +3,21 @@ name = "stm32-metapac"
|
|||
version = "0.1.0"
|
||||
edition = "2018"
|
||||
resolver = "2"
|
||||
license = "MIT OR Apache-2.0"
|
||||
repository = "https://github.com/embassy-rs/embassy"
|
||||
description = "Peripheral Access Crate (PAC) for all STM32 chips, including metadata."
|
||||
|
||||
# `cargo publish` is unable to figure out which .rs files are needed due to the include! magic.
|
||||
include = [
|
||||
"**/*.rs",
|
||||
"**/*.x",
|
||||
"Cargo.toml",
|
||||
]
|
||||
|
||||
[package.metadata.docs.rs]
|
||||
features = ["stm32h755zi-cm7", "pac", "metadata"]
|
||||
default-target = "thumbv7em-none-eabihf"
|
||||
targets = []
|
||||
|
||||
[dependencies]
|
||||
cortex-m = "0.7.3"
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ fn parse_chip_core(chip_and_core: &str) -> (String, Option<String>) {
|
|||
let mut s = chip_and_core.split('-');
|
||||
let chip_name: String = s.next().unwrap().to_string();
|
||||
if let Some(c) = s.next() {
|
||||
if c.starts_with("CM") {
|
||||
if c.starts_with("cm") {
|
||||
return (chip_name, Some(c.to_ascii_lowercase()));
|
||||
}
|
||||
}
|
||||
|
|
@ -18,36 +18,45 @@ fn main() {
|
|||
let out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap());
|
||||
let data_dir = PathBuf::from("../stm32-data/data");
|
||||
|
||||
println!("cwd: {:?}", env::current_dir());
|
||||
|
||||
let chip_core_name = env::vars_os()
|
||||
.map(|(a, _)| a.to_string_lossy().to_string())
|
||||
.find(|x| x.starts_with("CARGO_FEATURE_STM32"))
|
||||
.expect("No stm32xx Cargo feature enabled")
|
||||
.strip_prefix("CARGO_FEATURE_")
|
||||
.unwrap()
|
||||
.to_ascii_uppercase()
|
||||
.to_ascii_lowercase()
|
||||
.replace('_', "-");
|
||||
|
||||
let (chip_name, _) = parse_chip_core(&chip_core_name);
|
||||
|
||||
gen(Options {
|
||||
let opts = Options {
|
||||
out_dir: out_dir.clone(),
|
||||
data_dir: data_dir.clone(),
|
||||
chips: vec![chip_name],
|
||||
});
|
||||
chips: vec![chip_name.to_ascii_uppercase()],
|
||||
};
|
||||
Gen::new(opts).gen();
|
||||
|
||||
println!(
|
||||
"cargo:rustc-link-search={}/src/chips/{}",
|
||||
out_dir.display(),
|
||||
chip_core_name.to_ascii_lowercase()
|
||||
chip_core_name,
|
||||
);
|
||||
|
||||
#[cfg(feature = "memory-x")]
|
||||
println!(
|
||||
"cargo:rustc-link-search={}/src/chips/{}/memory_x/",
|
||||
out_dir.display(),
|
||||
chip_core_name.to_ascii_lowercase()
|
||||
chip_core_name
|
||||
);
|
||||
println!(
|
||||
"cargo:rustc-env=STM32_METAPAC_PAC_PATH={}/src/chips/{}/pac.rs",
|
||||
out_dir.display(),
|
||||
chip_core_name
|
||||
);
|
||||
println!(
|
||||
"cargo:rustc-env=STM32_METAPAC_METADATA_PATH={}/src/chips/{}/metadata.rs",
|
||||
out_dir.display(),
|
||||
chip_core_name
|
||||
);
|
||||
|
||||
println!("cargo:rerun-if-changed=build.rs");
|
||||
|
|
|
|||
|
|
@ -23,7 +23,15 @@ fn main() {
|
|||
println!(
|
||||
"cargo:rustc-link-search={}/src/chips/{}/memory_x/",
|
||||
crate_dir.display(),
|
||||
chip_core_name,
|
||||
chip_core_name
|
||||
);
|
||||
println!(
|
||||
"cargo:rustc-env=STM32_METAPAC_PAC_PATH=chips/{}/pac.rs",
|
||||
chip_core_name
|
||||
);
|
||||
println!(
|
||||
"cargo:rustc-env=STM32_METAPAC_METADATA_PATH=chips/{}/metadata.rs",
|
||||
chip_core_name
|
||||
);
|
||||
|
||||
println!("cargo:rerun-if-changed=build.rs");
|
||||
80
stm32-metapac/src/common.rs
Normal file
80
stm32-metapac/src/common.rs
Normal file
|
|
@ -0,0 +1,80 @@
|
|||
use core::marker::PhantomData;
|
||||
|
||||
#[derive(Copy, Clone, PartialEq, Eq)]
|
||||
pub struct RW;
|
||||
#[derive(Copy, Clone, PartialEq, Eq)]
|
||||
pub struct R;
|
||||
#[derive(Copy, Clone, PartialEq, Eq)]
|
||||
pub struct W;
|
||||
|
||||
mod sealed {
|
||||
use super::*;
|
||||
pub trait Access {}
|
||||
impl Access for R {}
|
||||
impl Access for W {}
|
||||
impl Access for RW {}
|
||||
}
|
||||
|
||||
pub trait Access: sealed::Access + Copy {}
|
||||
impl Access for R {}
|
||||
impl Access for W {}
|
||||
impl Access for RW {}
|
||||
|
||||
pub trait Read: Access {}
|
||||
impl Read for RW {}
|
||||
impl Read for R {}
|
||||
|
||||
pub trait Write: Access {}
|
||||
impl Write for RW {}
|
||||
impl Write for W {}
|
||||
|
||||
#[derive(Copy, Clone, PartialEq, Eq)]
|
||||
pub struct Reg<T: Copy, A: Access> {
|
||||
ptr: *mut u8,
|
||||
phantom: PhantomData<*mut (T, A)>,
|
||||
}
|
||||
unsafe impl<T: Copy, A: Access> Send for Reg<T, A> {}
|
||||
unsafe impl<T: Copy, A: Access> Sync for Reg<T, A> {}
|
||||
|
||||
impl<T: Copy, A: Access> Reg<T, A> {
|
||||
pub fn from_ptr(ptr: *mut u8) -> Self {
|
||||
Self {
|
||||
ptr,
|
||||
phantom: PhantomData,
|
||||
}
|
||||
}
|
||||
|
||||
pub fn ptr(&self) -> *mut T {
|
||||
self.ptr as _
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Copy, A: Read> Reg<T, A> {
|
||||
pub unsafe fn read(&self) -> T {
|
||||
(self.ptr as *mut T).read_volatile()
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Copy, A: Write> Reg<T, A> {
|
||||
pub unsafe fn write_value(&self, val: T) {
|
||||
(self.ptr as *mut T).write_volatile(val)
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Default + Copy, A: Write> Reg<T, A> {
|
||||
pub unsafe fn write<R>(&self, f: impl FnOnce(&mut T) -> R) -> R {
|
||||
let mut val = Default::default();
|
||||
let res = f(&mut val);
|
||||
self.write_value(val);
|
||||
res
|
||||
}
|
||||
}
|
||||
|
||||
impl<T: Copy, A: Read + Write> Reg<T, A> {
|
||||
pub unsafe fn modify<R>(&self, f: impl FnOnce(&mut T) -> R) -> R {
|
||||
let mut val = self.read();
|
||||
let res = f(&mut val);
|
||||
self.write_value(val);
|
||||
res
|
||||
}
|
||||
}
|
||||
|
|
@ -3,5 +3,13 @@
|
|||
#![allow(unused)]
|
||||
#![allow(non_camel_case_types)]
|
||||
|
||||
// GEN CUT HERE
|
||||
include!(concat!(env!("OUT_DIR"), "/src/lib_inner.rs"));
|
||||
pub mod common;
|
||||
|
||||
#[cfg(feature = "pac")]
|
||||
include!(env!("STM32_METAPAC_PAC_PATH"));
|
||||
|
||||
#[cfg(feature = "metadata")]
|
||||
pub mod metadata {
|
||||
include!("metadata.rs");
|
||||
include!(env!("STM32_METAPAC_METADATA_PATH"));
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue