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Merge pull request #1948 from embassy-rs/stm32-test-cleanup

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tests/stm32: centralize pin configuration.
This commit is contained in:
Dario Nieuwenhuis 2023-09-25 20:44:57 +00:00 committed by GitHub
commit 481d2998ef
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GPG key ID: 4AEE18F83AFDEB23
10 changed files with 123 additions and 244 deletions
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1
embassy-nrf/src/lib.rs
View file

@ -102,6 +102,7 @@ mod chip;
#[macro_export]
macro_rules! bind_interrupts {
($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
#[derive(Copy, Clone)]
$vis struct $name;
$(

3
embassy-rp/src/lib.rs
View file

@ -90,7 +90,8 @@ embassy_hal_internal::interrupt_mod!(
#[macro_export]
macro_rules! bind_interrupts {
($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
$vis struct $name;
#[derive(Copy, Clone)]
$vis struct $name;
$(
#[allow(non_snake_case)]

1
embassy-stm32/src/lib.rs
View file

@ -88,6 +88,7 @@ pub use crate::_generated::interrupt;
#[macro_export]
macro_rules! bind_interrupts {
($vis:vis struct $name:ident { $($irq:ident => $($handler:ty),*;)* }) => {
#[derive(Copy, Clone)]
$vis struct $name;
$(

20
tests/stm32/src/bin/gpio.rs
View file

@ -16,24 +16,8 @@ async fn main(_spawner: Spawner) {
// Arduino pins D0 and D1
// They're connected together with a 1K resistor.
#[cfg(feature = "stm32f103c8")]
let (mut a, mut b) = (p.PA9, p.PA10);
#[cfg(feature = "stm32g491re")]
let (mut a, mut b) = (p.PC4, p.PC5);
#[cfg(feature = "stm32g071rb")]
let (mut a, mut b) = (p.PC4, p.PC5);
#[cfg(feature = "stm32f429zi")]
let (mut a, mut b) = (p.PG14, p.PG9);
#[cfg(feature = "stm32wb55rg")]
let (mut a, mut b) = (p.PA3, p.PA2);
#[cfg(feature = "stm32h755zi")]
let (mut a, mut b) = (p.PB6, p.PB7);
#[cfg(feature = "stm32u585ai")]
let (mut a, mut b) = (p.PD9, p.PD8);
#[cfg(feature = "stm32h563zi")]
let (mut a, mut b) = (p.PB6, p.PB7);
#[cfg(feature = "stm32c031c6")]
let (mut a, mut b) = (p.PB6, p.PB7);
let mut a = peri!(p, UART_RX);
let mut b = peri!(p, UART_TX);
// Test initial output
{

22
tests/stm32/src/bin/spi.rs
View file

@ -16,24 +16,10 @@ async fn main(_spawner: Spawner) {
let p = embassy_stm32::init(config());
info!("Hello World!");
#[cfg(feature = "stm32f103c8")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
#[cfg(feature = "stm32f429zi")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
#[cfg(feature = "stm32h755zi")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PB5, p.PA6);
#[cfg(feature = "stm32g491re")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
#[cfg(feature = "stm32g071rb")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
#[cfg(feature = "stm32wb55rg")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
#[cfg(feature = "stm32u585ai")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14);
#[cfg(feature = "stm32h563zi")]
let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13);
#[cfg(feature = "stm32c031c6")]
let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
let spi = peri!(p, SPI);
let sck = peri!(p, SPI_SCK);
let mosi = peri!(p, SPI_MOSI);
let miso = peri!(p, SPI_MISO);
let mut spi_config = spi::Config::default();
spi_config.frequency = Hertz(1_000_000);

24
tests/stm32/src/bin/spi_dma.rs
View file

@ -15,24 +15,12 @@ async fn main(_spawner: Spawner) {
let p = embassy_stm32::init(config());
info!("Hello World!");
#[cfg(feature = "stm32f103c8")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2);
#[cfg(feature = "stm32f429zi")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2);
#[cfg(feature = "stm32h755zi")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1);
#[cfg(feature = "stm32g491re")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32g071rb")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32wb55rg")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32u585ai")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32h563zi")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32c031c6")]
let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
let spi = peri!(p, SPI);
let sck = peri!(p, SPI_SCK);
let mosi = peri!(p, SPI_MOSI);
let miso = peri!(p, SPI_MISO);
let tx_dma = peri!(p, SPI_TX_DMA);
let rx_dma = peri!(p, SPI_RX_DMA);
let mut spi_config = spi::Config::default();
spi_config.frequency = Hertz(1_000_000);

55
tests/stm32/src/bin/usart.rs
View file

@ -9,35 +9,8 @@ use defmt::assert_eq;
use embassy_executor::Spawner;
use embassy_stm32::dma::NoDma;
use embassy_stm32::usart::{Config, Error, Uart};
use embassy_stm32::{bind_interrupts, peripherals, usart};
use embassy_time::{Duration, Instant};
#[cfg(any(
feature = "stm32f103c8",
feature = "stm32g491re",
feature = "stm32g071rb",
feature = "stm32h755zi",
feature = "stm32c031c6",
))]
bind_interrupts!(struct Irqs {
USART1 => usart::InterruptHandler<peripherals::USART1>;
});
#[cfg(feature = "stm32u585ai")]
bind_interrupts!(struct Irqs {
USART3 => usart::InterruptHandler<peripherals::USART3>;
});
#[cfg(feature = "stm32f429zi")]
bind_interrupts!(struct Irqs {
USART6 => usart::InterruptHandler<peripherals::USART6>;
});
#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
bind_interrupts!(struct Irqs {
LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
});
#[embassy_executor::main]
async fn main(_spawner: Spawner) {
let p = embassy_stm32::init(config());
@ -45,28 +18,14 @@ async fn main(_spawner: Spawner) {
// Arduino pins D0 and D1
// They're connected together with a 1K resistor.
#[cfg(feature = "stm32f103c8")]
let (mut tx, mut rx, mut usart) = (p.PA9, p.PA10, p.USART1);
#[cfg(feature = "stm32g491re")]
let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
#[cfg(feature = "stm32g071rb")]
let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
#[cfg(feature = "stm32f429zi")]
let (mut tx, mut rx, mut usart) = (p.PG14, p.PG9, p.USART6);
#[cfg(feature = "stm32wb55rg")]
let (mut tx, mut rx, mut usart) = (p.PA2, p.PA3, p.LPUART1);
#[cfg(feature = "stm32h755zi")]
let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
#[cfg(feature = "stm32u585ai")]
let (mut tx, mut rx, mut usart) = (p.PD8, p.PD9, p.USART3);
#[cfg(feature = "stm32h563zi")]
let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.LPUART1);
#[cfg(feature = "stm32c031c6")]
let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
let mut usart = peri!(p, UART);
let mut rx = peri!(p, UART_RX);
let mut tx = peri!(p, UART_TX);
let irq = irqs!(UART);
{
let config = Config::default();
let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config);
// We can't send too many bytes, they have to fit in the FIFO.
// This is because we aren't sending+receiving at the same time.
@ -82,7 +41,7 @@ async fn main(_spawner: Spawner) {
// Test error handling with with an overflow error
{
let config = Config::default();
let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config);
// Send enough bytes to fill the RX FIFOs off all USART versions.
let data = [0xC0, 0xDE, 0x12, 0x23, 0x34];
@ -116,7 +75,7 @@ async fn main(_spawner: Spawner) {
let mut config = Config::default();
config.baudrate = baudrate;
let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config);
let n = (baudrate as usize / 100).max(64);

51
tests/stm32/src/bin/usart_dma.rs
View file

@ -9,33 +9,6 @@ use defmt::assert_eq;
use embassy_executor::Spawner;
use embassy_futures::join::join;
use embassy_stm32::usart::{Config, Uart};
use embassy_stm32::{bind_interrupts, peripherals, usart};
#[cfg(any(
feature = "stm32f103c8",
feature = "stm32g491re",
feature = "stm32g071rb",
feature = "stm32h755zi",
feature = "stm32c031c6",
))]
bind_interrupts!(struct Irqs {
USART1 => usart::InterruptHandler<peripherals::USART1>;
});
#[cfg(feature = "stm32u585ai")]
bind_interrupts!(struct Irqs {
USART3 => usart::InterruptHandler<peripherals::USART3>;
});
#[cfg(feature = "stm32f429zi")]
bind_interrupts!(struct Irqs {
USART6 => usart::InterruptHandler<peripherals::USART6>;
});
#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
bind_interrupts!(struct Irqs {
LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
});
#[embassy_executor::main]
async fn main(_spawner: Spawner) {
@ -44,24 +17,12 @@ async fn main(_spawner: Spawner) {
// Arduino pins D0 and D1
// They're connected together with a 1K resistor.
#[cfg(feature = "stm32f103c8")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, Irqs, p.DMA1_CH4, p.DMA1_CH5);
#[cfg(feature = "stm32g491re")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32g071rb")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32f429zi")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, Irqs, p.DMA2_CH6, p.DMA2_CH1);
#[cfg(feature = "stm32wb55rg")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32h755zi")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH0, p.DMA1_CH1);
#[cfg(feature = "stm32u585ai")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32h563zi")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.LPUART1, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32c031c6")]
let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
let usart = peri!(p, UART);
let rx = peri!(p, UART_RX);
let tx = peri!(p, UART_TX);
let rx_dma = peri!(p, UART_RX_DMA);
let tx_dma = peri!(p, UART_TX_DMA);
let irq = irqs!(UART);
let config = Config::default();
let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);

105
tests/stm32/src/bin/usart_rx_ringbuffered.rs
View file

@ -10,87 +10,10 @@ use common::*;
use defmt::{assert_eq, panic};
use embassy_executor::Spawner;
use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx};
use embassy_stm32::{bind_interrupts, peripherals, usart};
use embassy_time::{Duration, Timer};
use rand_chacha::ChaCha8Rng;
use rand_core::{RngCore, SeedableRng};
#[cfg(any(
feature = "stm32f103c8",
feature = "stm32g491re",
feature = "stm32g071rb",
feature = "stm32h755zi",
feature = "stm32c031c6",
))]
bind_interrupts!(struct Irqs {
USART1 => usart::InterruptHandler<peripherals::USART1>;
});
#[cfg(feature = "stm32u585ai")]
bind_interrupts!(struct Irqs {
USART3 => usart::InterruptHandler<peripherals::USART3>;
});
#[cfg(feature = "stm32f429zi")]
bind_interrupts!(struct Irqs {
USART1 => usart::InterruptHandler<peripherals::USART1>;
USART6 => usart::InterruptHandler<peripherals::USART6>;
});
#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
bind_interrupts!(struct Irqs {
LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
});
#[cfg(feature = "stm32f103c8")]
mod board {
pub type Uart = embassy_stm32::peripherals::USART1;
pub type TxDma = embassy_stm32::peripherals::DMA1_CH4;
pub type RxDma = embassy_stm32::peripherals::DMA1_CH5;
}
#[cfg(feature = "stm32g491re")]
mod board {
pub type Uart = embassy_stm32::peripherals::USART1;
pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
}
#[cfg(feature = "stm32g071rb")]
mod board {
pub type Uart = embassy_stm32::peripherals::USART1;
pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
}
#[cfg(feature = "stm32f429zi")]
mod board {
pub type Uart = embassy_stm32::peripherals::USART6;
pub type TxDma = embassy_stm32::peripherals::DMA2_CH6;
pub type RxDma = embassy_stm32::peripherals::DMA2_CH1;
}
#[cfg(feature = "stm32wb55rg")]
mod board {
pub type Uart = embassy_stm32::peripherals::LPUART1;
pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
}
#[cfg(feature = "stm32h755zi")]
mod board {
pub type Uart = embassy_stm32::peripherals::USART1;
pub type TxDma = embassy_stm32::peripherals::DMA1_CH0;
pub type RxDma = embassy_stm32::peripherals::DMA1_CH1;
}
#[cfg(feature = "stm32u585ai")]
mod board {
pub type Uart = embassy_stm32::peripherals::USART3;
pub type TxDma = embassy_stm32::peripherals::GPDMA1_CH0;
pub type RxDma = embassy_stm32::peripherals::GPDMA1_CH1;
}
#[cfg(feature = "stm32c031c6")]
mod board {
pub type Uart = embassy_stm32::peripherals::USART1;
pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
}
const DMA_BUF_SIZE: usize = 256;
#[embassy_executor::main]
@ -100,22 +23,12 @@ async fn main(spawner: Spawner) {
// Arduino pins D0 and D1
// They're connected together with a 1K resistor.
#[cfg(feature = "stm32f103c8")]
let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5);
#[cfg(feature = "stm32g491re")]
let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32g071rb")]
let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32f429zi")]
let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
#[cfg(feature = "stm32wb55rg")]
let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
#[cfg(feature = "stm32h755zi")]
let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
#[cfg(feature = "stm32u585ai")]
let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
#[cfg(feature = "stm32c031c6")]
let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
let usart = peri!(p, UART);
let rx = peri!(p, UART_RX);
let tx = peri!(p, UART_TX);
let rx_dma = peri!(p, UART_RX_DMA);
let tx_dma = peri!(p, UART_TX_DMA);
let irq = irqs!(UART);
// To run this test, use the saturating_serial test utility to saturate the serial port
@ -127,7 +40,7 @@ async fn main(spawner: Spawner) {
config.stop_bits = StopBits::STOP1;
config.parity = Parity::ParityNone;
let usart = Uart::new(usart, rx, tx, Irqs, tx_dma, rx_dma, config);
let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
let (tx, rx) = usart.split();
static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE];
let dma_buf = unsafe { DMA_BUF.as_mut() };
@ -139,7 +52,7 @@ async fn main(spawner: Spawner) {
}
#[embassy_executor::task]
async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) {
async fn transmit_task(mut tx: UartTx<'static, peris::UART, peris::UART_TX_DMA>) {
// workaround https://github.com/embassy-rs/embassy/issues/1426
Timer::after(Duration::from_millis(100) as _).await;
@ -162,7 +75,7 @@ async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) {
}
#[embassy_executor::task]
async fn receive_task(mut rx: RingBufferedUartRx<'static, board::Uart, board::RxDma>) {
async fn receive_task(mut rx: RingBufferedUartRx<'static, peris::UART, peris::UART_RX_DMA>) {
info!("Ready to receive...");
let mut rng = ChaCha8Rng::seed_from_u64(1337);

85
tests/stm32/src/common.rs
View file

@ -25,6 +25,91 @@ teleprobe_meta::target!(b"nucleo-stm32h563zi");
#[cfg(feature = "stm32c031c6")]
teleprobe_meta::target!(b"nucleo-stm32c031c6");
macro_rules! define_peris {
($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => {
#[allow(unused_macros)]
macro_rules! peri {
$(
($p:expr, $name) => {
$p.$peri
};
)*
}
#[allow(unused_macros)]
macro_rules! irqs {
$(
($irq_name) => {{
embassy_stm32::bind_interrupts!(struct Irqs $irq_code);
Irqs
}};
)*
}
#[allow(unused)]
#[allow(non_camel_case_types)]
pub mod peris {
$(
pub type $name = embassy_stm32::peripherals::$peri;
)*
}
};
}
#[cfg(feature = "stm32f103c8")]
define_peris!(
UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA1_CH4, UART_RX_DMA = DMA1_CH5,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
);
#[cfg(feature = "stm32g491re")]
define_peris!(
UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
);
#[cfg(feature = "stm32g071rb")]
define_peris!(
UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
);
#[cfg(feature = "stm32f429zi")]
define_peris!(
UART = USART6, UART_TX = PG14, UART_RX = PG9, UART_TX_DMA = DMA2_CH6, UART_RX_DMA = DMA2_CH1,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2,
@irq UART = {USART6 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART6>;},
);
#[cfg(feature = "stm32wb55rg")]
define_peris!(
UART = LPUART1, UART_TX = PA2, UART_RX = PA3, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
@irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
);
#[cfg(feature = "stm32h755zi")]
define_peris!(
UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1,
@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
);
#[cfg(feature = "stm32u585ai")]
define_peris!(
UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
SPI = SPI1, SPI_SCK = PE13, SPI_MOSI = PE15, SPI_MISO = PE14, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
@irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
);
#[cfg(feature = "stm32h563zi")]
define_peris!(
UART = LPUART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
SPI = SPI4, SPI_SCK = PE12, SPI_MOSI = PE14, SPI_MISO = PE13, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
@irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
);
#[cfg(feature = "stm32c031c6")]
define_peris!(
UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
@irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
);
pub fn config() -> Config {
#[allow(unused_mut)]
let mut config = Config::default();