diff --git a/embassy-stm32/src/rcc/f4/mod.rs b/embassy-stm32/src/rcc/f4/mod.rs
index e8709b5fc..4b17bdf40 100644
--- a/embassy-stm32/src/rcc/f4/mod.rs
+++ b/embassy-stm32/src/rcc/f4/mod.rs
@@ -167,23 +167,23 @@ impl RccExt for RCC {
             }
         };
 
-        let apb1_freq = match cfgr.apb1_pre {
-            APBPrescaler::NotDivided => ahb_freq,
+        let (apb1_freq, apb1_tim_freq) = match cfgr.apb1_pre {
+            APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
             pre => {
                 let pre: Ppre = pre.into();
                 let pre: u8 = 1 << (pre.0 - 3);
                 let freq = ahb_freq / pre as u32;
-                freq
+                (freq, freq * 2)
             }
         };
 
-        let apb2_freq = match cfgr.apb2_pre {
-            APBPrescaler::NotDivided => ahb_freq,
+        let (apb2_freq, apb2_tim_freq) = match cfgr.apb2_pre {
+            APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
             pre => {
                 let pre: Ppre = pre.into();
                 let pre: u8 = 1 << (pre.0 - 3);
                 let freq = ahb_freq / (1 << (pre as u8 - 3));
-                freq
+                (freq, freq * 2)
             }
         };
 
@@ -194,6 +194,8 @@ impl RccExt for RCC {
             ahb3: ahb_freq.hz(),
             apb1: apb1_freq.hz(),
             apb2: apb2_freq.hz(),
+            apb1_tim: apb1_tim_freq.hz(),
+            apb2_tim: apb2_tim_freq.hz(),
         }
     }
 }
diff --git a/embassy-stm32/src/rcc/h7/mod.rs b/embassy-stm32/src/rcc/h7/mod.rs
index 4bb50be3e..309902335 100644
--- a/embassy-stm32/src/rcc/h7/mod.rs
+++ b/embassy-stm32/src/rcc/h7/mod.rs
@@ -535,5 +535,7 @@ pub unsafe fn init(config: Config) {
         apb1: core_clocks.pclk1,
         apb2: core_clocks.pclk2,
         apb4: core_clocks.pclk4,
+        apb1_tim: core_clocks.timx_ker_ck.unwrap_or(core_clocks.pclk1),
+        apb2_tim: core_clocks.timy_ker_ck.unwrap_or(core_clocks.pclk2),
     });
 }
diff --git a/embassy-stm32/src/rcc/l0/mod.rs b/embassy-stm32/src/rcc/l0/mod.rs
index 2d51c690f..9a8bee418 100644
--- a/embassy-stm32/src/rcc/l0/mod.rs
+++ b/embassy-stm32/src/rcc/l0/mod.rs
@@ -353,23 +353,23 @@ impl RccExt for RCC {
             }
         };
 
-        let apb1_freq = match cfgr.apb1_pre {
-            APBPrescaler::NotDivided => ahb_freq,
+        let (apb1_freq, apb1_tim_freq) = match cfgr.apb1_pre {
+            APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
             pre => {
                 let pre: Ppre = pre.into();
                 let pre: u8 = 1 << (pre.0 - 3);
                 let freq = ahb_freq / pre as u32;
-                freq
+                (freq, freq * 2)
             }
         };
 
-        let apb2_freq = match cfgr.apb2_pre {
-            APBPrescaler::NotDivided => ahb_freq,
+        let (apb2_freq, apb2_tim_freq) = match cfgr.apb2_pre {
+            APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
             pre => {
                 let pre: Ppre = pre.into();
                 let pre: u8 = 1 << (pre.0 - 3);
                 let freq = ahb_freq / (1 << (pre as u8 - 3));
-                freq
+                (freq, freq * 2)
             }
         };
 
@@ -378,6 +378,8 @@ impl RccExt for RCC {
             ahb: ahb_freq.hz(),
             apb1: apb1_freq.hz(),
             apb2: apb2_freq.hz(),
+            apb1_tim: apb1_tim_freq.hz(),
+            apb2_tim: apb2_tim_freq.hz(),
         }
     }
 }
diff --git a/embassy-stm32/src/rcc/l4/mod.rs b/embassy-stm32/src/rcc/l4/mod.rs
index 9ae6d62b9..e6662f59f 100644
--- a/embassy-stm32/src/rcc/l4/mod.rs
+++ b/embassy-stm32/src/rcc/l4/mod.rs
@@ -166,23 +166,23 @@ impl RccExt for RCC {
             }
         };
 
-        let apb1_freq = match cfgr.apb1_pre {
-            APBPrescaler::NotDivided => ahb_freq,
+        let (apb1_freq, apb1_tim_freq) = match cfgr.apb1_pre {
+            APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
             pre => {
                 let pre: u8 = pre.into();
                 let pre: u8 = 1 << (pre - 3);
                 let freq = ahb_freq / pre as u32;
-                freq
+                (freq, freq * 2)
             }
         };
 
-        let apb2_freq = match cfgr.apb2_pre {
-            APBPrescaler::NotDivided => ahb_freq,
+        let (apb2_freq, apb2_tim_freq) = match cfgr.apb2_pre {
+            APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
             pre => {
                 let pre: u8 = pre.into();
                 let pre: u8 = 1 << (pre - 3);
                 let freq = ahb_freq / (1 << (pre as u8 - 3));
-                freq
+                (freq, freq * 2)
             }
         };
 
@@ -193,6 +193,8 @@ impl RccExt for RCC {
             ahb3: ahb_freq.hz(),
             apb1: apb1_freq.hz(),
             apb2: apb2_freq.hz(),
+            apb1_tim: apb1_tim_freq.hz(),
+            apb2_tim: apb2_tim_freq.hz(),
         }
     }
 }
diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs
index 096ba6b95..7721c2857 100644
--- a/embassy-stm32/src/rcc/mod.rs
+++ b/embassy-stm32/src/rcc/mod.rs
@@ -10,6 +10,8 @@ pub struct Clocks {
     pub sys: Hertz,
     pub apb1: Hertz,
     pub apb2: Hertz,
+    pub apb1_tim: Hertz,
+    pub apb2_tim: Hertz,
 
     #[cfg(any(rcc_l0))]
     pub ahb: Hertz,
diff --git a/embassy-stm32/src/rcc/wb55/mod.rs b/embassy-stm32/src/rcc/wb55/mod.rs
index 9ae6d62b9..3d508f343 100644
--- a/embassy-stm32/src/rcc/wb55/mod.rs
+++ b/embassy-stm32/src/rcc/wb55/mod.rs
@@ -166,23 +166,23 @@ impl RccExt for RCC {
             }
         };
 
-        let apb1_freq = match cfgr.apb1_pre {
-            APBPrescaler::NotDivided => ahb_freq,
+        let (apb1_freq, apb1_tim_freq) = match cfgr.apb1_pre {
+            APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
             pre => {
-                let pre: u8 = pre.into();
-                let pre: u8 = 1 << (pre - 3);
+                let pre: Ppre = pre.into();
+                let pre: u8 = 1 << (pre.0 - 3);
                 let freq = ahb_freq / pre as u32;
-                freq
+                (freq, freq * 2)
             }
         };
 
-        let apb2_freq = match cfgr.apb2_pre {
-            APBPrescaler::NotDivided => ahb_freq,
+        let (apb2_freq, apb2_tim_freq) = match cfgr.apb2_pre {
+            APBPrescaler::NotDivided => (ahb_freq, ahb_freq),
             pre => {
-                let pre: u8 = pre.into();
-                let pre: u8 = 1 << (pre - 3);
+                let pre: Ppre = pre.into();
+                let pre: u8 = 1 << (pre.0 - 3);
                 let freq = ahb_freq / (1 << (pre as u8 - 3));
-                freq
+                (freq, freq * 2)
             }
         };
 
@@ -193,6 +193,8 @@ impl RccExt for RCC {
             ahb3: ahb_freq.hz(),
             apb1: apb1_freq.hz(),
             apb2: apb2_freq.hz(),
+            apb1_tim: apb1_tim_freq.hz(),
+            apb2_tim: apb2_tim_freq.hz(),
         }
     }
 }
diff --git a/stm32-metapac/gen/src/lib.rs b/stm32-metapac/gen/src/lib.rs
index 5133aef9a..5a021569c 100644
--- a/stm32-metapac/gen/src/lib.rs
+++ b/stm32-metapac/gen/src/lib.rs
@@ -291,7 +291,7 @@ pub fn gen(options: Options) {
 
                         match (en, rst) {
                             (Some((enable_reg, enable_field)), Some((reset_reg, reset_field))) => {
-                                let clock = if clock_prefix == "" {
+                                let clock = if clock_prefix.is_empty() {
                                     let re = Regex::new("([A-Z]+\\d*).*").unwrap();
                                     if !re.is_match(enable_reg) {
                                         panic!(
@@ -305,9 +305,16 @@ pub fn gen(options: Options) {
                                 } else {
                                     clock_prefix
                                 };
+
+                                let clock = if name.starts_with("TIM") {
+                                    format!("{}_tim", clock.to_ascii_lowercase())
+                                } else {
+                                    clock.to_ascii_lowercase()
+                                };
+
                                 peripheral_rcc_table.push(vec![
                                     name.clone(),
-                                    clock.to_ascii_lowercase(),
+                                    clock,
                                     enable_reg.to_ascii_lowercase(),
                                     reset_reg.to_ascii_lowercase(),
                                     format!("set_{}", enable_field.to_ascii_lowercase()),