Implement i2cv1 timeout
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ce1cba761c
commit
4ce4131f8b
4 changed files with 243 additions and 23 deletions
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@ -7,6 +7,9 @@ use crate::interrupt::Interrupt;
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mod _version;
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pub use _version::*;
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mod timeout;
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pub use timeout::*;
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use crate::peripherals;
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#[derive(Debug)]
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132
embassy-stm32/src/i2c/timeout.rs
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132
embassy-stm32/src/i2c/timeout.rs
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@ -0,0 +1,132 @@
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use embassy_time::{Duration, Instant};
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use super::{Error, I2c, Instance};
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pub struct TimeoutI2c<'d, T: Instance> {
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i2c: &'d mut I2c<'d, T>,
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timeout: Duration,
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}
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fn timeout_fn(timeout: Duration) -> impl Fn() -> Result<(), Error> {
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let deadline = Instant::now() + timeout;
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move || {
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if Instant::now() > deadline {
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Err(Error::Timeout)
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} else {
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Ok(())
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}
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}
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}
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impl<'d, T: Instance> TimeoutI2c<'d, T> {
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pub fn new(i2c: &'d mut I2c<'d, T>, timeout: Duration) -> Self {
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Self { i2c, timeout }
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}
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pub fn blocking_read_timeout(&mut self, addr: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error> {
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self.i2c.blocking_read_timeout(addr, buffer, timeout_fn(timeout))
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}
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pub fn blocking_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> {
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self.blocking_read_timeout(addr, buffer, self.timeout)
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}
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pub fn blocking_write_timeout(&mut self, addr: u8, bytes: &[u8], timeout: Duration) -> Result<(), Error> {
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self.i2c.blocking_write_timeout(addr, bytes, timeout_fn(timeout))
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}
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pub fn blocking_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
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self.blocking_write_timeout(addr, bytes, self.timeout)
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}
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pub fn blocking_write_read_timeout(
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&mut self,
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addr: u8,
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bytes: &[u8],
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buffer: &mut [u8],
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timeout: Duration,
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) -> Result<(), Error> {
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self.i2c
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.blocking_write_read_timeout(addr, bytes, buffer, timeout_fn(timeout))
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}
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pub fn blocking_write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
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self.blocking_write_read_timeout(addr, bytes, buffer, self.timeout)
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}
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}
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impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for TimeoutI2c<'d, T> {
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type Error = Error;
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fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_read(addr, buffer)
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}
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}
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impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for TimeoutI2c<'d, T> {
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type Error = Error;
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fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> {
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self.blocking_write(addr, bytes)
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}
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}
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impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for TimeoutI2c<'d, T> {
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type Error = Error;
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fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_write_read(addr, bytes, buffer)
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}
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}
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#[cfg(feature = "unstable-traits")]
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mod eh1 {
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use super::*;
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impl<'d, T: Instance> embedded_hal_1::i2c::ErrorType for TimeoutI2c<'d, T> {
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type Error = Error;
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}
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impl<'d, T: Instance> embedded_hal_1::i2c::I2c for TimeoutI2c<'d, T> {
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fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_read(address, buffer)
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}
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fn write(&mut self, address: u8, buffer: &[u8]) -> Result<(), Self::Error> {
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self.blocking_write(address, buffer)
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}
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fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error>
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where
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B: IntoIterator<Item = u8>,
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{
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todo!();
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}
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fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error>
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where
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B: IntoIterator<Item = u8>,
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{
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todo!();
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}
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fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
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self.blocking_write_read(address, wr_buffer, rd_buffer)
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}
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fn transaction<'a>(
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&mut self,
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_address: u8,
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_operations: &mut [embedded_hal_1::i2c::Operation<'a>],
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) -> Result<(), Self::Error> {
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todo!();
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}
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fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error>
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where
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O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
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{
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todo!();
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}
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}
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}
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@ -141,7 +141,12 @@ impl<'d, T: Instance> I2c<'d, T> {
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Ok(sr1)
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}
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unsafe fn write_bytes(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
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unsafe fn write_bytes(
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&mut self,
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addr: u8,
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bytes: &[u8],
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check_timeout: impl Fn() -> Result<(), Error>,
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) -> Result<(), Error> {
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// Send a START condition
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T::regs().cr1().modify(|reg| {
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@ -149,7 +154,9 @@ impl<'d, T: Instance> I2c<'d, T> {
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});
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// Wait until START condition was generated
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while !self.check_and_clear_error_flags()?.start() {}
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while !self.check_and_clear_error_flags()?.start() {
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check_timeout()?;
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}
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// Also wait until signalled we're master and everything is waiting for us
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while {
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@ -157,7 +164,9 @@ impl<'d, T: Instance> I2c<'d, T> {
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let sr2 = T::regs().sr2().read();
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!sr2.msl() && !sr2.busy()
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} {}
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} {
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check_timeout()?;
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}
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// Set up current address, we're trying to talk to
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T::regs().dr().write(|reg| reg.set_dr(addr << 1));
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@ -165,26 +174,30 @@ impl<'d, T: Instance> I2c<'d, T> {
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// Wait until address was sent
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// Wait for the address to be acknowledged
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// Check for any I2C errors. If a NACK occurs, the ADDR bit will never be set.
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while !self.check_and_clear_error_flags()?.addr() {}
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while !self.check_and_clear_error_flags()?.addr() {
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check_timeout()?;
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}
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// Clear condition by reading SR2
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let _ = T::regs().sr2().read();
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// Send bytes
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for c in bytes {
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self.send_byte(*c)?;
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self.send_byte(*c, &check_timeout)?;
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}
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// Fallthrough is success
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Ok(())
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}
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unsafe fn send_byte(&self, byte: u8) -> Result<(), Error> {
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unsafe fn send_byte(&self, byte: u8, check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> {
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// Wait until we're ready for sending
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while {
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// Check for any I2C errors. If a NACK occurs, the ADDR bit will never be set.
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!self.check_and_clear_error_flags()?.txe()
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} {}
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} {
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check_timeout()?;
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}
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// Push out a byte of data
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T::regs().dr().write(|reg| reg.set_dr(byte));
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@ -193,24 +206,33 @@ impl<'d, T: Instance> I2c<'d, T> {
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while {
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// Check for any potential error conditions.
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!self.check_and_clear_error_flags()?.btf()
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} {}
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} {
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check_timeout()?;
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}
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Ok(())
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}
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unsafe fn recv_byte(&self) -> Result<u8, Error> {
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unsafe fn recv_byte(&self, check_timeout: impl Fn() -> Result<(), Error>) -> Result<u8, Error> {
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while {
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// Check for any potential error conditions.
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self.check_and_clear_error_flags()?;
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!T::regs().sr1().read().rxne()
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} {}
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} {
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check_timeout()?;
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}
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let value = T::regs().dr().read().dr();
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Ok(value)
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}
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pub fn blocking_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> {
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pub fn blocking_read_timeout(
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&mut self,
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addr: u8,
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buffer: &mut [u8],
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check_timeout: impl Fn() -> Result<(), Error>,
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) -> Result<(), Error> {
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if let Some((last, buffer)) = buffer.split_last_mut() {
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// Send a START condition and set ACK bit
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unsafe {
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@ -221,27 +243,33 @@ impl<'d, T: Instance> I2c<'d, T> {
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}
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// Wait until START condition was generated
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while unsafe { !T::regs().sr1().read().start() } {}
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while unsafe { !self.check_and_clear_error_flags()?.start() } {
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check_timeout()?;
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}
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// Also wait until signalled we're master and everything is waiting for us
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while {
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let sr2 = unsafe { T::regs().sr2().read() };
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!sr2.msl() && !sr2.busy()
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} {}
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} {
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check_timeout()?;
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}
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// Set up current address, we're trying to talk to
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unsafe { T::regs().dr().write(|reg| reg.set_dr((addr << 1) + 1)) }
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// Wait until address was sent
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// Wait for the address to be acknowledged
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while unsafe { !self.check_and_clear_error_flags()?.addr() } {}
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while unsafe { !self.check_and_clear_error_flags()?.addr() } {
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check_timeout()?;
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}
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// Clear condition by reading SR2
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let _ = unsafe { T::regs().sr2().read() };
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// Receive bytes into buffer
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for c in buffer {
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*c = unsafe { self.recv_byte()? };
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*c = unsafe { self.recv_byte(&check_timeout)? };
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}
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// Prepare to send NACK then STOP after next byte
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@ -253,10 +281,12 @@ impl<'d, T: Instance> I2c<'d, T> {
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}
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// Receive last byte
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*last = unsafe { self.recv_byte()? };
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*last = unsafe { self.recv_byte(&check_timeout)? };
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// Wait for the STOP to be sent.
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while unsafe { T::regs().cr1().read().stop() } {}
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while unsafe { T::regs().cr1().read().stop() } {
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check_timeout()?;
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}
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// Fallthrough is success
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Ok(())
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@ -265,25 +295,50 @@ impl<'d, T: Instance> I2c<'d, T> {
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}
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}
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pub fn blocking_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
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pub fn blocking_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> {
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self.blocking_read_timeout(addr, buffer, || Ok(()))
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}
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pub fn blocking_write_timeout(
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&mut self,
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addr: u8,
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bytes: &[u8],
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check_timeout: impl Fn() -> Result<(), Error>,
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) -> Result<(), Error> {
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unsafe {
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self.write_bytes(addr, bytes)?;
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self.write_bytes(addr, bytes, &check_timeout)?;
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// Send a STOP condition
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T::regs().cr1().modify(|reg| reg.set_stop(true));
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// Wait for STOP condition to transmit.
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while T::regs().cr1().read().stop() {}
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while T::regs().cr1().read().stop() {
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check_timeout()?;
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}
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};
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// Fallthrough is success
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Ok(())
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}
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pub fn blocking_write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
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unsafe { self.write_bytes(addr, bytes)? };
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self.blocking_read(addr, buffer)?;
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pub fn blocking_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
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self.blocking_write_timeout(addr, bytes, || Ok(()))
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}
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pub fn blocking_write_read_timeout(
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&mut self,
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addr: u8,
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bytes: &[u8],
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buffer: &mut [u8],
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check_timeout: impl Fn() -> Result<(), Error>,
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) -> Result<(), Error> {
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unsafe { self.write_bytes(addr, bytes, &check_timeout)? };
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self.blocking_read_timeout(addr, buffer, &check_timeout)?;
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Ok(())
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}
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pub fn blocking_write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
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self.blocking_write_read_timeout(addr, bytes, buffer, || Ok(()))
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}
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}
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impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> {
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30
examples/stm32f4/src/bin/i2c.rs
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30
examples/stm32f4/src/bin/i2c.rs
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@ -0,0 +1,30 @@
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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use defmt::*;
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use embassy_executor::Spawner;
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use embassy_stm32::i2c::{Error, I2c, TimeoutI2c};
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use embassy_stm32::time::Hertz;
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use embassy_time::Duration;
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use {defmt_rtt as _, panic_probe as _};
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const ADDRESS: u8 = 0x5F;
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const WHOAMI: u8 = 0x0F;
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) -> ! {
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info!("Hello world!");
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let p = embassy_stm32::init(Default::default());
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let mut i2c = I2c::new(p.I2C2, p.PB10, p.PB11, Hertz(100_000), Default::default());
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let mut timeout_i2c = TimeoutI2c::new(&mut i2c, Duration::from_millis(1000));
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let mut data = [0u8; 1];
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match timeout_i2c.blocking_write_read(ADDRESS, &[WHOAMI], &mut data) {
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Ok(()) => info!("Whoami: {}", data[0]),
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Err(Error::Timeout) => error!("Operation timed out"),
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Err(e) => error!("I2c Error: {:?}", e),
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}
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}
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