diff --git a/embassy-stm32/src/rcc/l0/mod.rs b/embassy-stm32/src/rcc/l0/mod.rs
index 9a8bee418..0b11e708f 100644
--- a/embassy-stm32/src/rcc/l0/mod.rs
+++ b/embassy-stm32/src/rcc/l0/mod.rs
@@ -7,7 +7,6 @@ use crate::time::U32Ext;
 use core::marker::PhantomData;
 use embassy::util::Unborrow;
 use embassy_extras::unborrow;
-use pac::dbg::vals::{DbgSleep, DbgStandby, DbgStop};
 use pac::rcc::vals::{Hpre, Msirange, Plldiv, Pllmul, Pllsrc, Ppre, Sw};
 
 /// Most of clock setup is copied from stm32l0xx-hal, and adopted to the generated PAC,
@@ -174,9 +173,9 @@ impl<'d> Rcc<'d> {
             pac::RCC.ahbenr().modify(|w| w.set_dmaen(enable_dma));
 
             pac::DBGMCU.cr().modify(|w| {
-                w.set_dbg_sleep(DbgSleep::ENABLED);
-                w.set_dbg_standby(DbgStandby::ENABLED);
-                w.set_dbg_stop(DbgStop::ENABLED);
+                w.set_dbg_sleep(true);
+                w.set_dbg_standby(true);
+                w.set_dbg_stop(true);
             });
         }
     }
diff --git a/stm32-data b/stm32-data
index 94a0969af..18f86c831 160000
--- a/stm32-data
+++ b/stm32-data
@@ -1 +1 @@
-Subproject commit 94a0969afddbde239afeb0d678b8fac50de5d3df
+Subproject commit 18f86c83123771048f971350c99c4f810385d7d1
diff --git a/stm32-metapac/gen/Cargo.toml b/stm32-metapac/gen/Cargo.toml
index 9151c821f..33c43e5b4 100644
--- a/stm32-metapac/gen/Cargo.toml
+++ b/stm32-metapac/gen/Cargo.toml
@@ -6,7 +6,7 @@ edition = "2018"
 
 [dependencies]
 regex = "1.4.6"
-chiptool = { git = "https://github.com/embassy-rs/chiptool", rev = "b905099423280cdc39a96bc51f0b669ddb443797" }
+chiptool = { git = "https://github.com/embassy-rs/chiptool", rev = "e0c5ff926ecd86e390bd9bc68b414bfc0e811b0e" }
 serde = { version = "1.0.123", features = [ "derive" ]}
 serde_yaml = "0.8.15"
 syn = { version = "1.0", features = ["full","extra-traits"] }