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rp/pio: only clear diag bits if they're set

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otherwise we may lose a bit being raised after it was read, but before
it was cleared.
This commit is contained in:
pennae 2023-05-04 11:55:11 +02:00
parent ed843b519b
commit 5f7ef8bed0
1 changed files with 12 additions and 4 deletions
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16
embassy-rp/src/pio.rs
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@ -307,7 +307,9 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineRx<'d, PIO, SM> {
unsafe {
let fdebug = PIO::PIO.fdebug();
let ret = fdebug.read().rxstall() & (1 << SM) != 0;
fdebug.write(|w| w.set_rxstall(1 << SM));
if ret {
fdebug.write(|w| w.set_rxstall(1 << SM));
}
ret
}
}
@ -316,7 +318,9 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineRx<'d, PIO, SM> {
unsafe {
let fdebug = PIO::PIO.fdebug();
let ret = fdebug.read().rxunder() & (1 << SM) != 0;
fdebug.write(|w| w.set_rxunder(1 << SM));
if ret {
fdebug.write(|w| w.set_rxunder(1 << SM));
}
ret
}
}
@ -383,7 +387,9 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineTx<'d, PIO, SM> {
unsafe {
let fdebug = PIO::PIO.fdebug();
let ret = fdebug.read().txstall() & (1 << SM) != 0;
fdebug.write(|w| w.set_txstall(1 << SM));
if ret {
fdebug.write(|w| w.set_txstall(1 << SM));
}
ret
}
}
@ -392,7 +398,9 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineTx<'d, PIO, SM> {
unsafe {
let fdebug = PIO::PIO.fdebug();
let ret = fdebug.read().txover() & (1 << SM) != 0;
fdebug.write(|w| w.set_txover(1 << SM));
if ret {
fdebug.write(|w| w.set_txover(1 << SM));
}
ret
}
}