stm32/dma: fix h7 impls
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2ee20f5dcb
commit
63a0e188ea
3 changed files with 65 additions and 23 deletions
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@ -138,7 +138,6 @@ unsafe fn on_irq() {
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}
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}
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/// safety: must be called only once
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pub(crate) unsafe fn init() {
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pac::interrupts! {
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@ -212,6 +211,9 @@ pac::bdma_channels! {
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};
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}
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// HACK: on stm32h7 "DMA" interrupts are for DMA, not BDMA, so this
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// would cause duplicate interrupt definitions. Do it manually insted
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#[cfg(not(rcc_h7))]
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pac::interrupts! {
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(DMA, $irq:ident) => {
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#[crate::interrupt]
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@ -220,3 +222,41 @@ pac::interrupts! {
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}
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};
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}
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#[cfg(rcc_h7)]
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mod _if_h7 {
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use super::*;
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#[crate::interrupt]
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unsafe fn BDMA_CHANNEL0() {
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on_irq()
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}
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#[crate::interrupt]
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unsafe fn BDMA_CHANNEL1() {
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on_irq()
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}
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#[crate::interrupt]
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unsafe fn BDMA_CHANNEL2() {
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on_irq()
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}
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#[crate::interrupt]
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unsafe fn BDMA_CHANNEL3() {
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on_irq()
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}
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#[crate::interrupt]
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unsafe fn BDMA_CHANNEL4() {
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on_irq()
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}
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#[crate::interrupt]
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unsafe fn BDMA_CHANNEL5() {
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on_irq()
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}
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#[crate::interrupt]
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unsafe fn BDMA_CHANNEL6() {
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on_irq()
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}
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#[crate::interrupt]
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unsafe fn BDMA_CHANNEL7() {
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on_irq()
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}
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}
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@ -31,28 +31,33 @@ macro_rules! dma_num {
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(DMA2) => {
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1
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};
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(BDMA) => {
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0
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};
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}
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macro_rules! dmamux_peri {
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(DMA1) => {
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crate::pac::DMAMUX1
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};
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(DMA2) => {
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crate::pac::DMAMUX1
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};
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(BDMA) => {
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crate::pac::DMAMUX1
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};
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}
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#[cfg(not(rcc_h7))]
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pac::bdma_channels! {
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($channel_peri:ident, $dma_peri:ident, $channel_num:expr) => {
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impl MuxChannel for peripherals::$channel_peri {
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const DMAMUX_CH_NUM: u8 = (dma_num!($dma_peri) * 8) + $channel_num;
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const DMAMUX_REGS: pac::dmamux::Dmamux = dmamux_peri!($dma_peri);
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const DMAMUX_REGS: pac::dmamux::Dmamux = pac::DMAMUX1;
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}
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};
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}
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#[cfg(rcc_h7)]
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pac::dma_channels! {
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($channel_peri:ident, $dma_peri:ident, $channel_num:expr) => {
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impl MuxChannel for peripherals::$channel_peri {
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const DMAMUX_CH_NUM: u8 = (dma_num!($dma_peri) * 8) + $channel_num;
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const DMAMUX_REGS: pac::dmamux::Dmamux = pac::DMAMUX1;
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}
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};
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}
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#[cfg(rcc_h7)]
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pac::bdma_channels! {
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($channel_peri:ident, $dma_peri:ident, $channel_num:expr) => {
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impl MuxChannel for peripherals::$channel_peri {
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const DMAMUX_CH_NUM: u8 = $channel_num;
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const DMAMUX_REGS: pac::dmamux::Dmamux = pac::DMAMUX2;
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}
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};
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}
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@ -1,4 +1,3 @@
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#![no_std]
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#![no_main]
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#![feature(trait_alias)]
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@ -13,12 +12,12 @@ use cortex_m::prelude::_embedded_hal_blocking_serial_Write;
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use embassy::executor::Executor;
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use embassy::time::Clock;
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use embassy::util::Forever;
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use embassy_stm32::dma::NoDma;
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use embassy_stm32::usart::{Config, Uart};
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use embassy_stm32::dma_traits::NoDma;
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use example_common::*;
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use stm32h7xx_hal as hal;
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use hal::prelude::*;
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use stm32h7xx_hal as hal;
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use cortex_m_rt::entry;
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use stm32h7::stm32h743 as pac;
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@ -60,8 +59,7 @@ fn main() -> ! {
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let rcc = pp.RCC.constrain();
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rcc
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.sys_ck(96.mhz())
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rcc.sys_ck(96.mhz())
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.pclk1(48.mhz())
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.pclk2(48.mhz())
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.pclk3(48.mhz())
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@ -89,7 +87,6 @@ fn main() -> ! {
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w
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});
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unsafe { embassy::time::set_clock(&ZeroClock) };
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let executor = EXECUTOR.put(Executor::new());
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