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Add finish_dma function

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This commit is contained in:
Grant Miller 2021-12-14 16:59:31 -06:00
parent a13a7a6616
commit 6597e67036
4 changed files with 33 additions and 81 deletions
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21
embassy-stm32/src/spi/mod.rs
View file

@ -451,6 +451,27 @@ fn spin_until_idle(regs: Regs) {
}
}
fn finish_dma(regs: Regs) {
spin_until_idle(regs);
unsafe {
regs.cr1().modify(|w| {
w.set_spe(false);
});
#[cfg(not(spi_v3))]
regs.cr2().modify(|reg| {
reg.set_txdmaen(false);
reg.set_rxdmaen(false);
});
#[cfg(spi_v3)]
regs.cfg1().modify(|reg| {
reg.set_txdmaen(false);
reg.set_rxdmaen(false);
});
}
}
trait Word {
const WORDSIZE: WordSize;
}

27
embassy-stm32/src/spi/v1.rs
View file

@ -32,6 +32,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
}
f.await;
finish_dma(T::regs());
Ok(())
}
@ -78,17 +81,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
join(tx_f, rx_f).await;
spin_until_idle(T::regs());
unsafe {
T::regs().cr2().modify(|reg| {
reg.set_txdmaen(false);
reg.set_rxdmaen(false);
});
T::regs().cr1().modify(|w| {
w.set_spe(false);
});
}
finish_dma(T::regs());
Ok(())
}
@ -138,17 +131,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
join(tx_f, rx_f).await;
spin_until_idle(T::regs());
unsafe {
T::regs().cr2().modify(|reg| {
reg.set_txdmaen(false);
reg.set_rxdmaen(false);
});
T::regs().cr1().modify(|w| {
w.set_spe(false);
});
}
finish_dma(T::regs());
Ok(())
}

34
embassy-stm32/src/spi/v2.rs
View file

@ -37,16 +37,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
f.await;
spin_until_idle(T::regs());
finish_dma(T::regs());
unsafe {
T::regs().cr2().modify(|reg| {
reg.set_txdmaen(false);
});
T::regs().cr1().modify(|w| {
w.set_spe(false);
});
}
Ok(())
}
@ -93,17 +85,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
join(tx_f, rx_f).await;
spin_until_idle(T::regs());
unsafe {
T::regs().cr2().modify(|reg| {
reg.set_txdmaen(false);
reg.set_rxdmaen(false);
});
T::regs().cr1().modify(|w| {
w.set_spe(false);
});
}
finish_dma(T::regs());
Ok(())
}
@ -158,17 +140,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
join(tx_f, rx_f).await;
spin_until_idle(T::regs());
unsafe {
T::regs().cr2().modify(|reg| {
reg.set_txdmaen(false);
reg.set_rxdmaen(false);
});
T::regs().cr1().modify(|w| {
w.set_spe(false);
});
}
finish_dma(T::regs());
Ok(())
}

32
embassy-stm32/src/spi/v3.rs
View file

@ -39,14 +39,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
}
f.await;
unsafe {
T::regs().cfg1().modify(|reg| {
reg.set_txdmaen(false);
});
T::regs().cr1().modify(|w| {
w.set_spe(false);
});
}
finish_dma(T::regs());
Ok(())
}
@ -97,17 +91,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
join(tx_f, rx_f).await;
spin_until_idle(T::regs());
finish_dma(T::regs());
unsafe {
T::regs().cfg1().modify(|reg| {
reg.set_rxdmaen(false);
reg.set_txdmaen(false);
});
T::regs().cr1().modify(|w| {
w.set_spe(false);
});
}
Ok(())
}
@ -164,17 +149,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
join(tx_f, rx_f).await;
spin_until_idle(T::regs());
finish_dma(T::regs());
unsafe {
T::regs().cfg1().modify(|reg| {
reg.set_rxdmaen(false);
reg.set_txdmaen(false);
});
T::regs().cr1().modify(|w| {
w.set_spe(false);
});
}
Ok(())
}
}