From 8f543062aa8bd44526e864e16deb9765618f191c Mon Sep 17 00:00:00 2001
From: eZio Pan <eziopan@qq.com>
Date: Mon, 6 Nov 2023 18:30:59 +0800
Subject: [PATCH] check PLL settings before set VOS
---
embassy-stm32/src/rcc/f4f7.rs | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/embassy-stm32/src/rcc/f4f7.rs b/embassy-stm32/src/rcc/f4f7.rs
index d507a6fd4..9e8c639d0 100644
--- a/embassy-stm32/src/rcc/f4f7.rs
+++ b/embassy-stm32/src/rcc/f4f7.rs
@@ -1,8 +1,9 @@
+use crate::pac::pwr::vals::Vos;
pub use crate::pac::rcc::vals::{
Hpre as AHBPrescaler, Pllm as PllPreDiv, Plln as PllMul, Pllp, Pllq, Pllr, Pllsrc as PllSource,
Ppre as APBPrescaler, Sw as Sysclk,
};
-use crate::pac::{FLASH, RCC};
+use crate::pac::{FLASH, PWR, RCC};
use crate::rcc::{set_freqs, Clocks};
use crate::time::Hertz;
@@ -100,12 +101,17 @@ impl Default for Config {
}
pub(crate) unsafe fn init(config: Config) {
+ // set VOS to SCALE1, if use PLL
+ // TODO: check real clock speed before set VOS
+ if config.pll.is_some() {
+ PWR.cr1().modify(|w| w.set_vos(Vos::SCALE1));
+ }
+
// always enable overdrive for now. Make it configurable in the future.
#[cfg(not(any(
stm32f401, stm32f410, stm32f411, stm32f412, stm32f413, stm32f423, stm32f405, stm32f407, stm32f415, stm32f417
)))]
{
- use crate::pac::PWR;
PWR.cr1().modify(|w| w.set_oden(true));
while !PWR.csr1().read().odrdy() {}
@@ -113,14 +119,6 @@ pub(crate) unsafe fn init(config: Config) {
while !PWR.csr1().read().odswrdy() {}
}
- #[cfg(any(stm32f401, stm32f410, stm32f411, stm32f412, stm32f413, stm32f423))]
- {
- use crate::pac::pwr::vals::Vos;
- use crate::pac::PWR;
-
- PWR.cr1().modify(|w| w.set_vos(Vos::SCALE1));
- }
-
// Configure HSI
let hsi = match config.hsi {
false => {