From 7954cbc4e7f44ff5292052da00b1ced857d3183a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Henrik=20Alse=CC=81r?= <henrik.alser@me.com>
Date: Tue, 30 Aug 2022 23:04:58 +0200
Subject: [PATCH] Add HIL tests

---
 tests/rp/src/bin/spi.rs       | 28 ++++++++++++++++++++++++++++
 tests/rp/src/bin/spi_async.rs | 28 ++++++++++++++++++++++++++++
 2 files changed, 56 insertions(+)
 create mode 100644 tests/rp/src/bin/spi.rs
 create mode 100644 tests/rp/src/bin/spi_async.rs

diff --git a/tests/rp/src/bin/spi.rs b/tests/rp/src/bin/spi.rs
new file mode 100644
index 000000000..3ce85a95c
--- /dev/null
+++ b/tests/rp/src/bin/spi.rs
@@ -0,0 +1,28 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_rp::spi::{Blocking, Config, Spi};
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    let clk = p.PIN_2;
+    let mosi = p.PIN_3;
+    let miso = p.PIN_4;
+
+    let mut spi: Spi<'_, _, Blocking> = Spi::new_blocking(p.SPI0, clk, mosi, miso, Config::default());
+
+    let tx_buf = [1_u8, 2, 3, 4, 5, 6];
+    let mut rx_buf = [0_u8; 6];
+    spi.blocking_transfer(&mut rx_buf, &tx_buf).unwrap();
+    assert_eq!(rx_buf, tx_buf);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
diff --git a/tests/rp/src/bin/spi_async.rs b/tests/rp/src/bin/spi_async.rs
new file mode 100644
index 000000000..41c711f70
--- /dev/null
+++ b/tests/rp/src/bin/spi_async.rs
@@ -0,0 +1,28 @@
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+
+use defmt::{assert_eq, *};
+use embassy_executor::Spawner;
+use embassy_rp::spi::{Async, Config, Spi};
+use {defmt_rtt as _, panic_probe as _};
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let p = embassy_rp::init(Default::default());
+    info!("Hello World!");
+
+    let clk = p.PIN_2;
+    let mosi = p.PIN_3;
+    let miso = p.PIN_4;
+
+    let mut spi: Spi<'_, _, Async> = Spi::new(p.SPI0, clk, mosi, miso, p.DMA_CH0, p.DMA_CH1, Config::default());
+
+    let tx_buf = [1_u8, 2, 3, 4, 5, 6];
+    let mut rx_buf = [0_u8; 6];
+    spi.transfer(&mut rx_buf, &tx_buf).await.unwrap();
+    assert_eq!(rx_buf, tx_buf);
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}