diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs
index 24efb09d2..3499c8d24 100644
--- a/embassy-stm32/src/spi/mod.rs
+++ b/embassy-stm32/src/spi/mod.rs
@@ -627,6 +627,32 @@ fn flush_rx_fifo(regs: Regs) {
     }
 }
 
+fn set_txdmaen(regs: Regs, val: bool) {
+    unsafe {
+        #[cfg(not(spi_v3))]
+        regs.cr2().modify(|reg| {
+            reg.set_txdmaen(val);
+        });
+        #[cfg(spi_v3)]
+        regs.cfg1().modify(|reg| {
+            reg.set_txdmaen(val);
+        });
+    }
+}
+
+fn set_rxdmaen(regs: Regs, val: bool) {
+    unsafe {
+        #[cfg(not(spi_v3))]
+        regs.cr2().modify(|reg| {
+            reg.set_rxdmaen(val);
+        });
+        #[cfg(spi_v3)]
+        regs.cfg1().modify(|reg| {
+            reg.set_rxdmaen(val);
+        });
+    }
+}
+
 fn finish_dma(regs: Regs) {
     spin_until_idle(regs);
 
diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs
index 19562b8a0..853f639ad 100644
--- a/embassy-stm32/src/spi/v1.rs
+++ b/embassy-stm32/src/spi/v1.rs
@@ -27,9 +27,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         let tx_f = Transfer::new(&mut self.txdma);
 
         unsafe {
-            T::regs().cr2().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });
@@ -52,9 +50,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             T::regs().cr1().modify(|w| {
                 w.set_spe(false);
             });
-            T::regs().cr2().modify(|reg| {
-                reg.set_rxdmaen(true);
-            });
+            set_rxdmaen(T::regs(), true);
         }
 
         let (_, clock_byte_count) = slice_ptr_parts_mut(read);
@@ -76,9 +72,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         );
 
         unsafe {
-            T::regs().cr2().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });
@@ -109,9 +103,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             T::regs().cr1().modify(|w| {
                 w.set_spe(false);
             });
-            T::regs().cr2().modify(|reg| {
-                reg.set_rxdmaen(true);
-            });
+            set_rxdmaen(T::regs(), true);
         }
 
         // TODO: This is unnecessary in some versions because
@@ -129,9 +121,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         let tx_f = Transfer::new(&mut self.txdma);
 
         unsafe {
-            T::regs().cr2().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });
diff --git a/embassy-stm32/src/spi/v2.rs b/embassy-stm32/src/spi/v2.rs
index 19562b8a0..853f639ad 100644
--- a/embassy-stm32/src/spi/v2.rs
+++ b/embassy-stm32/src/spi/v2.rs
@@ -27,9 +27,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         let tx_f = Transfer::new(&mut self.txdma);
 
         unsafe {
-            T::regs().cr2().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });
@@ -52,9 +50,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             T::regs().cr1().modify(|w| {
                 w.set_spe(false);
             });
-            T::regs().cr2().modify(|reg| {
-                reg.set_rxdmaen(true);
-            });
+            set_rxdmaen(T::regs(), true);
         }
 
         let (_, clock_byte_count) = slice_ptr_parts_mut(read);
@@ -76,9 +72,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         );
 
         unsafe {
-            T::regs().cr2().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });
@@ -109,9 +103,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             T::regs().cr1().modify(|w| {
                 w.set_spe(false);
             });
-            T::regs().cr2().modify(|reg| {
-                reg.set_rxdmaen(true);
-            });
+            set_rxdmaen(T::regs(), true);
         }
 
         // TODO: This is unnecessary in some versions because
@@ -129,9 +121,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         let tx_f = Transfer::new(&mut self.txdma);
 
         unsafe {
-            T::regs().cr2().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });
diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs
index 5c7472cc0..5a19355f9 100644
--- a/embassy-stm32/src/spi/v3.rs
+++ b/embassy-stm32/src/spi/v3.rs
@@ -27,9 +27,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         let tx_f = Transfer::new(&mut self.txdma);
 
         unsafe {
-            T::regs().cfg1().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });
@@ -55,9 +53,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             T::regs().cr1().modify(|w| {
                 w.set_spe(false);
             });
-            T::regs().cfg1().modify(|reg| {
-                reg.set_rxdmaen(true);
-            });
+            set_rxdmaen(T::regs(), true);
         }
 
         let (_, clock_byte_count) = slice_ptr_parts_mut(read);
@@ -79,9 +75,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         );
 
         unsafe {
-            T::regs().cfg1().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });
@@ -115,9 +109,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             T::regs().cr1().modify(|w| {
                 w.set_spe(false);
             });
-            T::regs().cfg1().modify(|reg| {
-                reg.set_rxdmaen(true);
-            });
+            set_rxdmaen(T::regs(), true);
         }
 
         // TODO: This is unnecessary in some versions because
@@ -135,9 +127,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         let tx_f = Transfer::new(&mut self.txdma);
 
         unsafe {
-            T::regs().cfg1().modify(|reg| {
-                reg.set_txdmaen(true);
-            });
+            set_txdmaen(T::regs(), true);
             T::regs().cr1().modify(|w| {
                 w.set_spe(true);
             });