Merge pull request #2725 from DeepSOIC/regout0
nRF52840/config: add dcdc voltage parameter
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7cf5cf4580
1 changed files with 39 additions and 0 deletions
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@ -225,10 +225,31 @@ pub mod config {
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/// Config for the first stage DCDC (VDDH -> VDD), if disabled LDO will be used.
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#[cfg(feature = "nrf52840")]
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pub reg0: bool,
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/// Configure the voltage of the first stage DCDC. It is stored in non-volatile memory (UICR.REGOUT0 register); pass None to not touch it.
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#[cfg(feature = "nrf52840")]
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pub reg0_voltage: Option<Reg0Voltage>,
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/// Config for the second stage DCDC (VDD -> DEC4), if disabled LDO will be used.
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pub reg1: bool,
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}
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/// Output voltage setting for REG0 regulator stage.
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#[cfg(feature = "nrf52840")]
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pub enum Reg0Voltage {
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/// 1.8 V
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_1V8 = 0,
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/// 2.1 V
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_2V1 = 1,
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/// 2.4 V
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_2V4 = 2,
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/// 2.7 V
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_2V7 = 3,
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/// 3.0 V
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_3V0 = 4,
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/// 3.3 V
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_3v3 = 5,
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//ERASED = 7, means 1.8V
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}
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/// Settings for enabling the built in DCDC converters.
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#[cfg(feature = "_nrf5340-app")]
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pub struct DcdcConfig {
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@ -279,6 +300,8 @@ pub mod config {
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dcdc: DcdcConfig {
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#[cfg(feature = "nrf52840")]
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reg0: false,
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#[cfg(feature = "nrf52840")]
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reg0_voltage: None,
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reg1: false,
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},
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#[cfg(feature = "_nrf5340-app")]
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@ -337,6 +360,7 @@ mod consts {
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pub const UICR_PSELRESET2: *mut u32 = 0x10001204 as *mut u32;
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pub const UICR_NFCPINS: *mut u32 = 0x1000120C as *mut u32;
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pub const UICR_APPROTECT: *mut u32 = 0x10001208 as *mut u32;
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pub const UICR_REGOUT0: *mut u32 = 0x10001304 as *mut u32;
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pub const APPROTECT_ENABLED: u32 = 0x0000_0000;
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pub const APPROTECT_DISABLED: u32 = 0x0000_005a;
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}
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@ -493,6 +517,21 @@ pub fn init(config: config::Config) -> Peripherals {
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}
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}
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#[cfg(feature = "nrf52840")]
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unsafe {
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if let Some(value) = config.dcdc.reg0_voltage {
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let value = value as u32;
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let res = uicr_write_masked(consts::UICR_REGOUT0, value, 0b00000000_00000000_00000000_00000111);
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needs_reset |= res == WriteResult::Written;
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if res == WriteResult::Failed {
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warn!(
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"Failed to set regulator voltage, as UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
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To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
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);
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}
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}
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}
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if needs_reset {
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cortex_m::peripheral::SCB::sys_reset();
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}
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