From 873ee0615147b4a4e0aacd069ce8ac8df611bbbf Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Sat, 30 Dec 2023 12:01:08 +0800 Subject: [PATCH] some trivial fix use less #[cfg] macro; reuse same variable --- embassy-stm32/src/timer/simple_pwm.rs | 17 ++++++++--------- examples/stm32f4/src/bin/ws2812_pwm.rs | 2 +- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs index acf0d12f9..7a5475c31 100644 --- a/embassy-stm32/src/timer/simple_pwm.rs +++ b/embassy-stm32/src/timer/simple_pwm.rs @@ -177,15 +177,14 @@ where let req = self.dma.request(); #[cfg(not(any(bdma, gpdma)))] - let dma_regs = self.dma.regs(); - #[cfg(not(any(bdma, gpdma)))] - let isr_num = self.dma.num() / 4; - #[cfg(not(any(bdma, gpdma)))] - let isr_bit = self.dma.num() % 4; - #[cfg(not(any(bdma, gpdma)))] - let isr_reg = dma_regs.isr(isr_num); - #[cfg(not(any(bdma, gpdma)))] - let ifcr_reg = dma_regs.ifcr(isr_num); + let (isr_bit, isr_reg, ifcr_reg) = { + let dma_regs = self.dma.regs(); + let isr_num = self.dma.num() / 4; + let isr_bit = self.dma.num() % 4; + let isr_reg = dma_regs.isr(isr_num); + let ifcr_reg = dma_regs.ifcr(isr_num); + (isr_bit, isr_reg, ifcr_reg) + }; #[cfg(not(any(bdma, gpdma)))] // clean DMA FIFO error before a transfer diff --git a/examples/stm32f4/src/bin/ws2812_pwm.rs b/examples/stm32f4/src/bin/ws2812_pwm.rs index 973743e49..93a89f16a 100644 --- a/examples/stm32f4/src/bin/ws2812_pwm.rs +++ b/examples/stm32f4/src/bin/ws2812_pwm.rs @@ -91,7 +91,7 @@ async fn main(_spawner: Spawner) { loop { for &color in color_list { - ws2812_pwm.gen_waveform(Channel::Ch1, color).await; + ws2812_pwm.gen_waveform(pwm_channel, color).await; // ws2812 need at least 50 us low level input to confirm the input data and change it's state Timer::after_micros(50).await; // wait until ticker tick