diff --git a/ci.sh b/ci.sh
index d169246bd..05b1d0ad7 100755
--- a/ci.sh
+++ b/ci.sh
@@ -30,7 +30,7 @@ cargo fmt --all -- --check
 
 # embassy-stm32f4
 
-(cd embassy-stm32f4-examples; cargo build --target thumbv7em-none-eabi --bins)
+(cd embassy-stm32f4-examples; cargo build --target thumbv7em-none-eabi --bins --features stm32f405)
 (cd embassy-stm32f4; cargo build --target thumbv7em-none-eabi --features stm32f405)
 (cd embassy-stm32f4; cargo build --target thumbv7em-none-eabi --features stm32f405,defmt)
 
diff --git a/embassy-stm32f4-examples/Cargo.toml b/embassy-stm32f4-examples/Cargo.toml
index 60ba44554..5bbaecc58 100644
--- a/embassy-stm32f4-examples/Cargo.toml
+++ b/embassy-stm32f4-examples/Cargo.toml
@@ -15,11 +15,29 @@ defmt-info = []
 defmt-warn = []
 defmt-error = []
 
+stm32f401 = ["stm32f4xx-hal/stm32f401", "embassy-stm32f4/stm32f401"]
+stm32f405 = ["stm32f4xx-hal/stm32f405", "embassy-stm32f4/stm32f405"]
+stm32f407 = ["stm32f4xx-hal/stm32f407", "embassy-stm32f4/stm32f407"]
+stm32f410 = ["stm32f4xx-hal/stm32f410", "embassy-stm32f4/stm32f410"]
+stm32f411 = ["stm32f4xx-hal/stm32f411", "embassy-stm32f4/stm32f411"]
+stm32f412 = ["stm32f4xx-hal/stm32f412", "embassy-stm32f4/stm32f412"]
+stm32f413 = ["stm32f4xx-hal/stm32f413", "embassy-stm32f4/stm32f413"]
+stm32f415 = ["stm32f4xx-hal/stm32f405", "embassy-stm32f4/stm32f405"]
+stm32f417 = ["stm32f4xx-hal/stm32f407", "embassy-stm32f4/stm32f407"]
+stm32f423 = ["stm32f4xx-hal/stm32f413", "embassy-stm32f4/stm32f413"]
+stm32f427 = ["stm32f4xx-hal/stm32f427", "embassy-stm32f4/stm32f427"]
+stm32f429 = ["stm32f4xx-hal/stm32f429", "embassy-stm32f4/stm32f429"]
+stm32f437 = ["stm32f4xx-hal/stm32f427", "embassy-stm32f4/stm32f427"]
+stm32f439 = ["stm32f4xx-hal/stm32f429", "embassy-stm32f4/stm32f429"]
+stm32f446 = ["stm32f4xx-hal/stm32f446", "embassy-stm32f4/stm32f446"]
+stm32f469 = ["stm32f4xx-hal/stm32f469", "embassy-stm32f4/stm32f469"]
+stm32f479 = ["stm32f4xx-hal/stm32f469", "embassy-stm32f4/stm32f469"]
+
 
 [dependencies]
 embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] }
 embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] }
-embassy-stm32f4 = { version = "*", path = "../embassy-stm32f4", features = ["stm32f405"] }
+embassy-stm32f4 = { version = "*", path = "../embassy-stm32f4" }
 
 defmt = "0.2.0"
 defmt-rtt = "0.2.0"
@@ -28,7 +46,7 @@ cortex-m = "0.7.1"
 cortex-m-rt = "0.6.13"
 embedded-hal    = { version = "0.2.4" }
 panic-probe = "0.1.0"
-stm32f4xx-hal  = { version = "0.8.3", features = ["rt", "stm32f405"], git = "https://github.com/stm32-rs/stm32f4xx-hal.git"}
+stm32f4xx-hal  = { version = "0.8.3", features = ["rt"], git = "https://github.com/stm32-rs/stm32f4xx-hal.git"}
 futures = { version = "0.3.8", default-features = false, features = ["async-await"] }
 rtt-target = { version = "0.3", features = ["cortex-m"] }
 bxcan = "0.5.0"
\ No newline at end of file
diff --git a/embassy-stm32f4-examples/src/bin/can.rs b/embassy-stm32f4-examples/src/bin/can.rs
index 701a277ec..5ffde2471 100644
--- a/embassy-stm32f4-examples/src/bin/can.rs
+++ b/embassy-stm32f4-examples/src/bin/can.rs
@@ -12,10 +12,8 @@ use example_common::{panic, *};
 use bxcan::filter::Mask32;
 use cortex_m_rt::entry;
 use embassy::executor::{task, Executor};
-use embassy::traits::gpio::*;
 use embassy::util::Forever;
 use embassy_stm32f4::{can, interrupt};
-use futures::pin_mut;
 use stm32f4xx_hal::prelude::*;
 use stm32f4xx_hal::{can::Can, stm32};
 
@@ -35,7 +33,7 @@ async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) {
 
     let mut can = can::Can::new(can, interrupt::take!(CAN1_TX), interrupt::take!(CAN1_RX0));
 
-    let frame = can.receive().await;
+    let _frame = can.receive().await;
 }
 
 static EXECUTOR: Forever<Executor> = Forever::new();
diff --git a/embassy-stm32f4-examples/src/bin/serial.rs b/embassy-stm32f4-examples/src/bin/serial.rs
index b138bfdd8..49a588c25 100644
--- a/embassy-stm32f4-examples/src/bin/serial.rs
+++ b/embassy-stm32f4-examples/src/bin/serial.rs
@@ -43,7 +43,7 @@ async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) {
 
     let streams = StreamsTuple::new(dp.DMA2);
 
-    let mut serial = unsafe {
+    let _serial = unsafe {
         serial::Serial::new(
             dp.USART1,
             (streams.7, streams.2),
diff --git a/embassy-stm32f4/src/can.rs b/embassy-stm32f4/src/can.rs
index 7c5311a9d..526d002c0 100644
--- a/embassy-stm32f4/src/can.rs
+++ b/embassy-stm32f4/src/can.rs
@@ -42,7 +42,8 @@ impl<T: Instance> Can<T> {
     pub fn transmit<'a>(&'a mut self, frame: &'a bxcan::Frame) -> impl Future<Output = ()> + 'a {
         async move {
             let fut = InterruptFuture::new(&mut self.tx_int);
-            self.can.transmit(frame);
+            // Infallible
+            self.can.transmit(frame).unwrap();
 
             fut.await;
         }
@@ -94,7 +95,6 @@ macro_rules! can {
     }
 }
 
-#[cfg(any(feature = "stm32f405",))]
 can! {
     CAN1 => (CAN1_TX, CAN1_RX0),
     CAN2 => (CAN2_TX, CAN2_RX0),
diff --git a/embassy-stm32f4/src/exti.rs b/embassy-stm32f4/src/exti.rs
index 9df021634..154ca45c1 100644
--- a/embassy-stm32f4/src/exti.rs
+++ b/embassy-stm32f4/src/exti.rs
@@ -1,4 +1,3 @@
-use core::cell::UnsafeCell;
 use core::future::Future;
 use core::mem;
 use core::pin::Pin;
diff --git a/embassy-stm32f4/src/lib.rs b/embassy-stm32f4/src/lib.rs
index 19375d962..82d26d952 100644
--- a/embassy-stm32f4/src/lib.rs
+++ b/embassy-stm32f4/src/lib.rs
@@ -313,9 +313,11 @@ pub use stm32f4xx_hal::stm32 as pac;
 // This mod MUST go first, so that the others see its macros.
 pub(crate) mod fmt;
 
+#[cfg(not(any(feature = "stm32f401", feature = "stm32f410", feature = "stm32f411",)))]
 pub mod can;
 pub mod exti;
 pub mod interrupt;
+#[cfg(not(feature = "stm32f410"))]
 pub mod qei;
 pub mod rtc;
 pub mod serial;
diff --git a/embassy-stm32f4/src/qei.rs b/embassy-stm32f4/src/qei.rs
index 391c8f7c2..5973e62d9 100644
--- a/embassy-stm32f4/src/qei.rs
+++ b/embassy-stm32f4/src/qei.rs
@@ -7,7 +7,7 @@ use stm32f4xx_hal::pac::TIM2;
 use stm32f4xx_hal::{qei, qei::Pins};
 
 pub struct Qei<T: Instance, PINS> {
-    qei: qei::Qei<T, PINS>,
+    _qei: qei::Qei<T, PINS>,
     int: T::Interrupt,
 }
 
@@ -25,7 +25,7 @@ impl<PINS: Pins<TIM2>> Qei<TIM2, PINS> {
         tim.dier.write(|w| w.uie().set_bit());
 
         Qei {
-            qei: qei,
+            _qei: qei,
             int: interrupt,
         }
     }
@@ -85,9 +85,7 @@ pub trait Instance: sealed::Sealed {
     type Interrupt: interrupt::Interrupt;
 }
 
-#[cfg(feature = "stm32f405")]
 impl sealed::Sealed for TIM2 {}
-#[cfg(feature = "stm32f405")]
 impl Instance for TIM2 {
     type Interrupt = interrupt::TIM2;
 }
diff --git a/embassy-stm32f4/src/serial.rs b/embassy-stm32f4/src/serial.rs
index 97b365a11..87d0caaaf 100644
--- a/embassy-stm32f4/src/serial.rs
+++ b/embassy-stm32f4/src/serial.rs
@@ -6,7 +6,6 @@
 
 use core::future::Future;
 use core::marker::PhantomData;
-use core::sync::atomic::{self, Ordering};
 
 use embassy::interrupt::Interrupt;
 use embassy::traits::uart::{Error, Uart};
@@ -37,7 +36,7 @@ pub struct Serial<
     usart: Option<USART>,
     tx_int: TSTREAM::Interrupt,
     rx_int: RSTREAM::Interrupt,
-    usart_int: USART::Interrupt,
+    _usart_int: USART::Interrupt,
     channel: PhantomData<CHANNEL>,
 }
 
@@ -84,7 +83,7 @@ where
             usart: Some(usart),
             tx_int: tx_int,
             rx_int: rx_int,
-            usart_int: usart_int,
+            _usart_int: usart_int,
             channel: core::marker::PhantomData,
         }
     }
@@ -207,7 +206,6 @@ macro_rules! usart {
     }
 }
 
-#[cfg(any(feature = "stm32f405",))]
 dma! {
     DMA2_STREAM0 => (DMA2, Stream0),
     DMA2_STREAM1 => (DMA2, Stream1),
@@ -226,12 +224,60 @@ dma! {
     DMA1_STREAM6 => (DMA1, Stream6),
 }
 
-#[cfg(any(feature = "stm32f405",))]
+#[cfg(any(feature = "stm32f401", feature = "stm32f410", feature = "stm32f411",))]
+usart! {
+    USART1 => (USART1),
+    USART2 => (USART2),
+    USART6 => (USART6),
+}
+
+#[cfg(any(feature = "stm32f405", feature = "stm32f407"))]
 usart! {
     USART1 => (USART1),
     USART2 => (USART2),
     USART3 => (USART3),
+    USART6 => (USART6),
+
     UART4 => (UART4),
     UART5 => (UART5),
+}
+
+#[cfg(feature = "stm32f412")]
+usart! {
+    USART1 => (USART1),
+    USART2 => (USART2),
+    USART3 => (USART3),
     USART6 => (USART6),
 }
+
+#[cfg(feature = "stm32f413")]
+usart! {
+    USART1 => (USART1),
+    USART2 => (USART2),
+    USART3 => (USART3),
+    USART6 => (USART6),
+    USART7 => (USART7),
+    USART8 => (USART8),
+
+    UART5 => (UART5),
+    UART9 => (UART9),
+    UART10 => (UART10),
+}
+
+#[cfg(any(
+    feature = "stm32f427",
+    feature = "stm32f429",
+    feature = "stm32f446",
+    feature = "stm32f469"
+))]
+usart! {
+    USART1 => (USART1),
+    USART2 => (USART2),
+    USART3 => (USART3),
+    USART6 => (USART6),
+
+    UART4 => (UART4),
+    UART5 => (UART5),
+    UART7 => (UART7),
+    UART8 => (UART8),
+}