F4: Fix compilation for other MCUs
This commit is contained in:
parent
456e04c79f
commit
88a25b042a
9 changed files with 80 additions and 19 deletions
2
ci.sh
2
ci.sh
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@ -30,7 +30,7 @@ cargo fmt --all -- --check
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# embassy-stm32f4
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# embassy-stm32f4
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(cd embassy-stm32f4-examples; cargo build --target thumbv7em-none-eabi --bins)
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(cd embassy-stm32f4-examples; cargo build --target thumbv7em-none-eabi --bins --features stm32f405)
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(cd embassy-stm32f4; cargo build --target thumbv7em-none-eabi --features stm32f405)
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(cd embassy-stm32f4; cargo build --target thumbv7em-none-eabi --features stm32f405)
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(cd embassy-stm32f4; cargo build --target thumbv7em-none-eabi --features stm32f405,defmt)
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(cd embassy-stm32f4; cargo build --target thumbv7em-none-eabi --features stm32f405,defmt)
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@ -15,11 +15,29 @@ defmt-info = []
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defmt-warn = []
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defmt-warn = []
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defmt-error = []
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defmt-error = []
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stm32f401 = ["stm32f4xx-hal/stm32f401", "embassy-stm32f4/stm32f401"]
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stm32f405 = ["stm32f4xx-hal/stm32f405", "embassy-stm32f4/stm32f405"]
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stm32f407 = ["stm32f4xx-hal/stm32f407", "embassy-stm32f4/stm32f407"]
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stm32f410 = ["stm32f4xx-hal/stm32f410", "embassy-stm32f4/stm32f410"]
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stm32f411 = ["stm32f4xx-hal/stm32f411", "embassy-stm32f4/stm32f411"]
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stm32f412 = ["stm32f4xx-hal/stm32f412", "embassy-stm32f4/stm32f412"]
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stm32f413 = ["stm32f4xx-hal/stm32f413", "embassy-stm32f4/stm32f413"]
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stm32f415 = ["stm32f4xx-hal/stm32f405", "embassy-stm32f4/stm32f405"]
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stm32f417 = ["stm32f4xx-hal/stm32f407", "embassy-stm32f4/stm32f407"]
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stm32f423 = ["stm32f4xx-hal/stm32f413", "embassy-stm32f4/stm32f413"]
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stm32f427 = ["stm32f4xx-hal/stm32f427", "embassy-stm32f4/stm32f427"]
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stm32f429 = ["stm32f4xx-hal/stm32f429", "embassy-stm32f4/stm32f429"]
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stm32f437 = ["stm32f4xx-hal/stm32f427", "embassy-stm32f4/stm32f427"]
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stm32f439 = ["stm32f4xx-hal/stm32f429", "embassy-stm32f4/stm32f429"]
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stm32f446 = ["stm32f4xx-hal/stm32f446", "embassy-stm32f4/stm32f446"]
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stm32f469 = ["stm32f4xx-hal/stm32f469", "embassy-stm32f4/stm32f469"]
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stm32f479 = ["stm32f4xx-hal/stm32f469", "embassy-stm32f4/stm32f469"]
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[dependencies]
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[dependencies]
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embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] }
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embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] }
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embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] }
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embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] }
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embassy-stm32f4 = { version = "*", path = "../embassy-stm32f4", features = ["stm32f405"] }
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embassy-stm32f4 = { version = "*", path = "../embassy-stm32f4" }
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defmt = "0.2.0"
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defmt = "0.2.0"
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defmt-rtt = "0.2.0"
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defmt-rtt = "0.2.0"
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@ -28,7 +46,7 @@ cortex-m = "0.7.1"
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cortex-m-rt = "0.6.13"
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cortex-m-rt = "0.6.13"
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embedded-hal = { version = "0.2.4" }
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embedded-hal = { version = "0.2.4" }
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panic-probe = "0.1.0"
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panic-probe = "0.1.0"
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stm32f4xx-hal = { version = "0.8.3", features = ["rt", "stm32f405"], git = "https://github.com/stm32-rs/stm32f4xx-hal.git"}
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stm32f4xx-hal = { version = "0.8.3", features = ["rt"], git = "https://github.com/stm32-rs/stm32f4xx-hal.git"}
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futures = { version = "0.3.8", default-features = false, features = ["async-await"] }
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futures = { version = "0.3.8", default-features = false, features = ["async-await"] }
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rtt-target = { version = "0.3", features = ["cortex-m"] }
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rtt-target = { version = "0.3", features = ["cortex-m"] }
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bxcan = "0.5.0"
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bxcan = "0.5.0"
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@ -12,10 +12,8 @@ use example_common::{panic, *};
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use bxcan::filter::Mask32;
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use bxcan::filter::Mask32;
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use cortex_m_rt::entry;
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use cortex_m_rt::entry;
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use embassy::executor::{task, Executor};
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use embassy::executor::{task, Executor};
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use embassy::traits::gpio::*;
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use embassy::util::Forever;
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use embassy::util::Forever;
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use embassy_stm32f4::{can, interrupt};
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use embassy_stm32f4::{can, interrupt};
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use futures::pin_mut;
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use stm32f4xx_hal::prelude::*;
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use stm32f4xx_hal::prelude::*;
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use stm32f4xx_hal::{can::Can, stm32};
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use stm32f4xx_hal::{can::Can, stm32};
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@ -35,7 +33,7 @@ async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) {
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let mut can = can::Can::new(can, interrupt::take!(CAN1_TX), interrupt::take!(CAN1_RX0));
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let mut can = can::Can::new(can, interrupt::take!(CAN1_TX), interrupt::take!(CAN1_RX0));
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let frame = can.receive().await;
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let _frame = can.receive().await;
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}
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}
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static EXECUTOR: Forever<Executor> = Forever::new();
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static EXECUTOR: Forever<Executor> = Forever::new();
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@ -43,7 +43,7 @@ async fn run(dp: stm32::Peripherals, _cp: cortex_m::Peripherals) {
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let streams = StreamsTuple::new(dp.DMA2);
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let streams = StreamsTuple::new(dp.DMA2);
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let mut serial = unsafe {
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let _serial = unsafe {
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serial::Serial::new(
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serial::Serial::new(
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dp.USART1,
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dp.USART1,
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(streams.7, streams.2),
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(streams.7, streams.2),
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@ -42,7 +42,8 @@ impl<T: Instance> Can<T> {
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pub fn transmit<'a>(&'a mut self, frame: &'a bxcan::Frame) -> impl Future<Output = ()> + 'a {
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pub fn transmit<'a>(&'a mut self, frame: &'a bxcan::Frame) -> impl Future<Output = ()> + 'a {
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async move {
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async move {
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let fut = InterruptFuture::new(&mut self.tx_int);
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let fut = InterruptFuture::new(&mut self.tx_int);
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self.can.transmit(frame);
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// Infallible
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self.can.transmit(frame).unwrap();
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fut.await;
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fut.await;
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}
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}
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@ -94,7 +95,6 @@ macro_rules! can {
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}
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}
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}
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}
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#[cfg(any(feature = "stm32f405",))]
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can! {
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can! {
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CAN1 => (CAN1_TX, CAN1_RX0),
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CAN1 => (CAN1_TX, CAN1_RX0),
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CAN2 => (CAN2_TX, CAN2_RX0),
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CAN2 => (CAN2_TX, CAN2_RX0),
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@ -1,4 +1,3 @@
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use core::cell::UnsafeCell;
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use core::future::Future;
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use core::future::Future;
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use core::mem;
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use core::mem;
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use core::pin::Pin;
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use core::pin::Pin;
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@ -313,9 +313,11 @@ pub use stm32f4xx_hal::stm32 as pac;
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// This mod MUST go first, so that the others see its macros.
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// This mod MUST go first, so that the others see its macros.
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pub(crate) mod fmt;
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pub(crate) mod fmt;
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#[cfg(not(any(feature = "stm32f401", feature = "stm32f410", feature = "stm32f411",)))]
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pub mod can;
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pub mod can;
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pub mod exti;
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pub mod exti;
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pub mod interrupt;
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pub mod interrupt;
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#[cfg(not(feature = "stm32f410"))]
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pub mod qei;
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pub mod qei;
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pub mod rtc;
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pub mod rtc;
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pub mod serial;
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pub mod serial;
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@ -7,7 +7,7 @@ use stm32f4xx_hal::pac::TIM2;
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use stm32f4xx_hal::{qei, qei::Pins};
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use stm32f4xx_hal::{qei, qei::Pins};
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pub struct Qei<T: Instance, PINS> {
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pub struct Qei<T: Instance, PINS> {
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qei: qei::Qei<T, PINS>,
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_qei: qei::Qei<T, PINS>,
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int: T::Interrupt,
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int: T::Interrupt,
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}
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}
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@ -25,7 +25,7 @@ impl<PINS: Pins<TIM2>> Qei<TIM2, PINS> {
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tim.dier.write(|w| w.uie().set_bit());
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tim.dier.write(|w| w.uie().set_bit());
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Qei {
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Qei {
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qei: qei,
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_qei: qei,
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int: interrupt,
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int: interrupt,
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}
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}
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}
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}
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@ -85,9 +85,7 @@ pub trait Instance: sealed::Sealed {
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type Interrupt: interrupt::Interrupt;
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type Interrupt: interrupt::Interrupt;
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}
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}
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#[cfg(feature = "stm32f405")]
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impl sealed::Sealed for TIM2 {}
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impl sealed::Sealed for TIM2 {}
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#[cfg(feature = "stm32f405")]
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impl Instance for TIM2 {
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impl Instance for TIM2 {
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type Interrupt = interrupt::TIM2;
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type Interrupt = interrupt::TIM2;
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}
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}
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@ -6,7 +6,6 @@
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use core::future::Future;
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use core::future::Future;
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use core::marker::PhantomData;
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use core::marker::PhantomData;
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use core::sync::atomic::{self, Ordering};
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use embassy::interrupt::Interrupt;
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use embassy::interrupt::Interrupt;
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use embassy::traits::uart::{Error, Uart};
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use embassy::traits::uart::{Error, Uart};
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@ -37,7 +36,7 @@ pub struct Serial<
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usart: Option<USART>,
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usart: Option<USART>,
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tx_int: TSTREAM::Interrupt,
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tx_int: TSTREAM::Interrupt,
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rx_int: RSTREAM::Interrupt,
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rx_int: RSTREAM::Interrupt,
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usart_int: USART::Interrupt,
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_usart_int: USART::Interrupt,
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channel: PhantomData<CHANNEL>,
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channel: PhantomData<CHANNEL>,
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}
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}
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@ -84,7 +83,7 @@ where
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usart: Some(usart),
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usart: Some(usart),
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tx_int: tx_int,
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tx_int: tx_int,
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rx_int: rx_int,
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rx_int: rx_int,
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usart_int: usart_int,
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_usart_int: usart_int,
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channel: core::marker::PhantomData,
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channel: core::marker::PhantomData,
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}
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}
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}
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}
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@ -207,7 +206,6 @@ macro_rules! usart {
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}
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}
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}
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}
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#[cfg(any(feature = "stm32f405",))]
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dma! {
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dma! {
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DMA2_STREAM0 => (DMA2, Stream0),
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DMA2_STREAM0 => (DMA2, Stream0),
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DMA2_STREAM1 => (DMA2, Stream1),
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DMA2_STREAM1 => (DMA2, Stream1),
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@ -226,12 +224,60 @@ dma! {
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DMA1_STREAM6 => (DMA1, Stream6),
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DMA1_STREAM6 => (DMA1, Stream6),
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}
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}
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#[cfg(any(feature = "stm32f405",))]
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#[cfg(any(feature = "stm32f401", feature = "stm32f410", feature = "stm32f411",))]
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usart! {
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USART1 => (USART1),
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USART2 => (USART2),
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USART6 => (USART6),
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}
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#[cfg(any(feature = "stm32f405", feature = "stm32f407"))]
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usart! {
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usart! {
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USART1 => (USART1),
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USART1 => (USART1),
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USART2 => (USART2),
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USART2 => (USART2),
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USART3 => (USART3),
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USART3 => (USART3),
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USART6 => (USART6),
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UART4 => (UART4),
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UART4 => (UART4),
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UART5 => (UART5),
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UART5 => (UART5),
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}
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#[cfg(feature = "stm32f412")]
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usart! {
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USART1 => (USART1),
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USART2 => (USART2),
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USART3 => (USART3),
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USART6 => (USART6),
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USART6 => (USART6),
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}
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}
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#[cfg(feature = "stm32f413")]
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usart! {
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USART1 => (USART1),
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USART2 => (USART2),
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USART3 => (USART3),
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USART6 => (USART6),
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USART7 => (USART7),
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USART8 => (USART8),
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UART5 => (UART5),
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UART9 => (UART9),
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UART10 => (UART10),
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}
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#[cfg(any(
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feature = "stm32f427",
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feature = "stm32f429",
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feature = "stm32f446",
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feature = "stm32f469"
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))]
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usart! {
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USART1 => (USART1),
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USART2 => (USART2),
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USART3 => (USART3),
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USART6 => (USART6),
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UART4 => (UART4),
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UART5 => (UART5),
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UART7 => (UART7),
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UART8 => (UART8),
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}
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