diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs index 3ba9e7eb0..2b52416b2 100644 --- a/embassy-stm32/src/rcc/g4.rs +++ b/embassy-stm32/src/rcc/g4.rs @@ -17,7 +17,7 @@ pub const LSI_FREQ: Hertz = Hertz(32_000); pub enum ClockSrc { HSE(Hertz), HSI16, - PLL(PllSrc, PllM, PllN, PllClkDiv), + PLLCLK(PllSrc, PllM, PllN, PllR), } /// AHB prescaler @@ -61,27 +61,27 @@ impl Into for PllSrc { } #[derive(Clone, Copy)] -pub enum PllClkDiv { +pub enum PllR { Div2, Div4, Div6, Div8, } -impl PllClkDiv { +impl PllR { pub fn to_div(self) -> u32 { let val: u8 = self.into(); (val as u32 + 1) * 2 } } -impl From for u8 { - fn from(val: PllClkDiv) -> u8 { +impl From for u8 { + fn from(val: PllR) -> u8 { match val { - PllClkDiv::Div2 => 0b00, - PllClkDiv::Div4 => 0b01, - PllClkDiv::Div6 => 0b10, - PllClkDiv::Div8 => 0b11, + PllR::Div2 => 0b00, + PllR::Div4 => 0b01, + PllR::Div6 => 0b10, + PllR::Div8 => 0b11, } } } @@ -260,7 +260,7 @@ pub(crate) unsafe fn init(config: Config) { (freq.0, Sw::HSE) } - ClockSrc::PLL(src, prediv, mul, div) => { + ClockSrc::PLLCLK(src, prediv, mul, div) => { let src_freq = match src { PllSrc::HSI16 => { // Enable HSI16 as clock source for PLL diff --git a/examples/stm32g4/src/bin/pll.rs b/examples/stm32g4/src/bin/pll.rs index bde30c284..8cee41e9b 100644 --- a/examples/stm32g4/src/bin/pll.rs +++ b/examples/stm32g4/src/bin/pll.rs @@ -4,7 +4,7 @@ use defmt::*; use embassy_executor::Spawner; -use embassy_stm32::rcc::{ClockSrc, PllClkDiv, PllM, PllN, PllSrc}; +use embassy_stm32::rcc::{ClockSrc, PllM, PllN, PllR, PllSrc}; use embassy_stm32::Config; use embassy_time::{Duration, Timer}; use {defmt_rtt as _, panic_probe as _}; @@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) { let mut config = Config::default(); // Configure PLL to max frequency of 170 MHz - config.rcc.mux = ClockSrc::PLL(PllSrc::HSI16, PllM::Div4, PllN::Mul85, PllClkDiv::Div2); + config.rcc.mux = ClockSrc::PLLCLK(PllSrc::HSI16, PllM::Div4, PllN::Mul85, PllR::Div2); let _p = embassy_stm32::init(config); info!("Hello World!");