From 8fb1fc045f0c8081a731f105c9cd3f4c192bce53 Mon Sep 17 00:00:00 2001
From: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Date: Fri, 23 Apr 2021 19:32:47 +0200
Subject: [PATCH] Add stm32f401 peripherals
---
embassy-stm32/src/lib.rs | 55 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index 07b6ede47..27f865ecb 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -135,6 +135,61 @@ use core::option::Option;
use hal::prelude::*;
use hal::rcc::Clocks;
+#[cfg(feature = "stm32f401")]
+embassy_extras::std_peripherals! {
+ ADC_COMMON,
+ ADC1,
+ CRC,
+ DBGMCU,
+ EXTI,
+ FLASH,
+ IWDG,
+ OTG_FS_DEVICE,
+ OTG_FS_GLOBAL,
+ OTG_FS_HOST,
+ OTG_FS_PWRCLK,
+ PWR,
+ //RCC,
+ RTC,
+ SDIO,
+ SYSCFG,
+ TIM1,
+ TIM8,
+ TIM10,
+ TIM11,
+ TIM2,
+ //TIM3,
+ TIM4,
+ TIM5,
+ TIM9,
+ USART1,
+ USART2,
+ USART6,
+ WWDG,
+ DMA2,
+ DMA1,
+ GPIOH,
+ GPIOE,
+ GPIOD,
+ GPIOC,
+ GPIOB,
+ GPIOA,
+ I2C3,
+ I2C2,
+ I2C1,
+ I2S2EXT,
+ I2S3EXT,
+ SPI1,
+ SPI2,
+ SPI3,
+ SPI4,
+ FPU,
+ STK,
+ NVIC_STIR,
+ FPU_CPACR,
+ SCB_ACTRL,
+}
+
#[cfg(feature = "stm32f446")]
embassy_extras::std_peripherals! {
DCMI,