diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index 8807114b..0585b6d3 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -86,6 +86,8 @@ jobs: target: thumbv7em-none-eabi - package: examples/stm32l0 target: thumbv6m-none-eabi + - package: examples/stm32wb55 + target: thumbv7em-none-eabihf steps: - uses: actions/checkout@v2 diff --git a/Cargo.example.toml b/Cargo.example.toml index 5defac9e..d94f7e9b 100644 --- a/Cargo.example.toml +++ b/Cargo.example.toml @@ -36,6 +36,7 @@ members = [ #"examples/stm32f4", #"examples/stm32h7", #"examples/stm32l0", + #"examples/stm32wb55", # rp2040 #"embassy-rp", diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index a93fce41..8b9a0039 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -544,4 +544,14 @@ stm32l4s7zi = [ "stm32-metapac/stm32l4s7zi",] stm32l4s9ai = [ "stm32-metapac/stm32l4s9ai",] stm32l4s9vi = [ "stm32-metapac/stm32l4s9vi",] stm32l4s9zi = [ "stm32-metapac/stm32l4s9zi",] +stm32wb55cc = [ "stm32-metapac/stm32wb55cc",] +stm32wb55ce = [ "stm32-metapac/stm32wb55ce",] +stm32wb55cg = [ "stm32-metapac/stm32wb55cg",] +stm32wb55rc = [ "stm32-metapac/stm32wb55rc",] +stm32wb55re = [ "stm32-metapac/stm32wb55re",] +stm32wb55rg = [ "stm32-metapac/stm32wb55rg",] +stm32wb55vc = [ "stm32-metapac/stm32wb55vc",] +stm32wb55ve = [ "stm32-metapac/stm32wb55ve",] +stm32wb55vg = [ "stm32-metapac/stm32wb55vg",] +stm32wb55vy = [ "stm32-metapac/stm32wb55vy",] # END GENERATED FEATURES diff --git a/embassy-stm32/gen_features.py b/embassy-stm32/gen_features.py index e25a2856..4c46d602 100644 --- a/embassy-stm32/gen_features.py +++ b/embassy-stm32/gen_features.py @@ -11,6 +11,7 @@ supported_families = [ 'STM32L0', 'STM32L4', 'STM32H7', + 'STM32WB55', ] # ======= load chip list diff --git a/examples/stm32wb55/.cargo/config.toml b/examples/stm32wb55/.cargo/config.toml new file mode 100644 index 00000000..9df74089 --- /dev/null +++ b/examples/stm32wb55/.cargo/config.toml @@ -0,0 +1,21 @@ +[unstable] +build-std = ["core"] + +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# replace STM32WB55CCUx with your chip as listed in `probe-run --list-chips` +runner = "probe-run --chip STM32WB55CCUx --speed 1000 --connect-under-reset" + +rustflags = [ + # LLD (shipped with the Rust toolchain) is used as the default linker + "-C", "link-arg=--nmagic", + "-C", "link-arg=-Tlink.x", + "-C", "link-arg=-Tdefmt.x", + + # Code-size optimizations. + "-Z", "trap-unreachable=no", + "-C", "inline-threshold=5", + "-C", "no-vectorize-loops", +] + +[build] +target = "thumbv7em-none-eabihf" diff --git a/examples/stm32wb55/Cargo.toml b/examples/stm32wb55/Cargo.toml new file mode 100644 index 00000000..d3d128e8 --- /dev/null +++ b/examples/stm32wb55/Cargo.toml @@ -0,0 +1,35 @@ +[package] +authors = ["Dario Nieuwenhuis "] +edition = "2018" +name = "embassy-stm32wb55-examples" +version = "0.1.0" +resolver = "2" + +[features] +default = [ + "defmt-default", +] +defmt-default = [] +defmt-trace = [] +defmt-debug = [] +defmt-info = [] +defmt-warn = [] +defmt-error = [] + +[dependencies] +embassy = { version = "0.1.0", path = "../../embassy", features = ["defmt", "defmt-trace"] } +embassy-traits = { version = "0.1.0", path = "../../embassy-traits", features = ["defmt"] } +embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["defmt", "defmt-trace", "stm32wb55cc"] } +embassy-extras = {version = "0.1.0", path = "../../embassy-extras" } +stm32wb-pac = "0.2" + +defmt = "0.2.0" +defmt-rtt = "0.2.0" + +cortex-m = "0.7.1" +cortex-m-rt = "0.6.14" +embedded-hal = { version = "0.2.4" } +panic-probe = { version = "0.2.0", features= ["print-defmt"] } +futures = { version = "0.3.8", default-features = false, features = ["async-await"] } +rtt-target = { version = "0.3", features = ["cortex-m"] } +heapless = { version = "0.7.1", default-features = false } diff --git a/examples/stm32wb55/build.rs b/examples/stm32wb55/build.rs new file mode 100644 index 00000000..d534cc3d --- /dev/null +++ b/examples/stm32wb55/build.rs @@ -0,0 +1,31 @@ +//! This build script copies the `memory.x` file from the crate root into +//! a directory where the linker can always find it at build time. +//! For many projects this is optional, as the linker always searches the +//! project root directory -- wherever `Cargo.toml` is. However, if you +//! are using a workspace or have a more complicated build setup, this +//! build script becomes required. Additionally, by requesting that +//! Cargo re-run the build script whenever `memory.x` is changed, +//! updating `memory.x` ensures a rebuild of the application with the +//! new memory settings. + +use std::env; +use std::fs::File; +use std::io::Write; +use std::path::PathBuf; + +fn main() { + // Put `memory.x` in our output directory and ensure it's + // on the linker search path. + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + + // By default, Cargo will re-run a build script whenever + // any file in the project changes. By specifying `memory.x` + // here, we ensure the build script is only re-run when + // `memory.x` is changed. + println!("cargo:rerun-if-changed=memory.x"); +} diff --git a/examples/stm32wb55/memory.x b/examples/stm32wb55/memory.x new file mode 100644 index 00000000..2b4dcce3 --- /dev/null +++ b/examples/stm32wb55/memory.x @@ -0,0 +1,41 @@ +/* + The size of this file must be exactly the same as in other memory_xx.x files. + Memory size for STM32WB55xC with 256K FLASH +*/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (xrw) : ORIGIN = 0x20000004, LENGTH = 191K + RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K +} + +/* Place stack at the end of SRAM1 */ +_stack_start = ORIGIN(RAM) + LENGTH(RAM); + +/* + * Scatter the mailbox interface memory sections in shared memory + */ +SECTIONS { + TL_REF_TABLE (NOLOAD) : { *(TL_REF_TABLE) } >RAM_SHARED + + TL_DEVICE_INFO_TABLE 0x2003001c (NOLOAD) : { *(TL_DEVICE_INFO_TABLE) } >RAM_SHARED + TL_BLE_TABLE 0x2003003c (NOLOAD) : { *(TL_BLE_TABLE) } >RAM_SHARED + TL_THREAD_TABLE 0x2003004c (NOLOAD) : { *(TL_THREAD_TABLE) } >RAM_SHARED + TL_SYS_TABLE 0x20030058 (NOLOAD) : { *(TL_SYS_TABLE) } >RAM_SHARED + TL_MEM_MANAGER_TABLE 0x20030060 (NOLOAD) : { *(TL_MEM_MANAGER_TABLE) } >RAM_SHARED + TL_TRACES_TABLE 0x2003007c (NOLOAD) : { *(TL_TRACES_TABLE) } >RAM_SHARED + TL_MAC_802_15_4_TABLE 0x20030080 (NOLOAD) : { *(TL_MAC_802_15_4_TABLE) } >RAM_SHARED + + HCI_ACL_DATA_BUFFER 0x20030a08 (NOLOAD) : { *(HCI_ACL_DATA_BUFFER) } >RAM_SHARED + BLE_CMD_BUFFER 0x200308fc (NOLOAD) : { *(BLE_CMD_BUFFER) } >RAM_SHARED + BLE_SPARE_EVT_BUF 0x200301a8 (NOLOAD) : { *(BLE_SPARE_EVT_BUF) } >RAM_SHARED + SYS_SPARE_EVT_BUF 0x200302b4 (NOLOAD) : { *(SYS_SPARE_EVT_BUF) } >RAM_SHARED + EVT_POOL 0x200303c0 (NOLOAD) : { *(EVT_POOL) } >RAM_SHARED + SYS_CMD_BUF 0x2003009c (NOLOAD) : { *(SYS_CMD_BUF) } >RAM_SHARED + SYSTEM_EVT_QUEUE 0x20030b28 (NOLOAD) : { *(SYSTEM_EVT_QUEUE) } >RAM_SHARED + EVT_QUEUE 0x20030b10 (NOLOAD) : { *(EVT_QUEUE) } >RAM_SHARED + CS_BUFFER 0x20030b18 (NOLOAD) : { *(CS_BUFFER) } >RAM_SHARED + TRACES_EVT_QUEUE 0x20030094 (NOLOAD) : { *(TRACES_EVT_QUEUE) } >RAM_SHARED + FREE_BUF_QUEUE 0x2003008c (NOLOAD) : { *(FREE_BUF_QUEUE) } >RAM_SHARED +} diff --git a/examples/stm32wb55/src/bin/blinky.rs b/examples/stm32wb55/src/bin/blinky.rs new file mode 100644 index 00000000..8ce78a3c --- /dev/null +++ b/examples/stm32wb55/src/bin/blinky.rs @@ -0,0 +1,42 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; +use embassy_stm32::gpio::{Level, Output}; +use embedded_hal::digital::v2::OutputPin; +use example_common::*; + +use cortex_m_rt::entry; +use stm32wb_pac as pac; + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let pp = pac::Peripherals::take().unwrap(); + + pp.RCC.ahb2enr.modify(|_, w| { + w.gpioben().set_bit(); + w + }); + + let p = embassy_stm32::init(Default::default()); + + let mut led = Output::new(p.PB0, Level::High); + + loop { + info!("high"); + led.set_high().unwrap(); + cortex_m::asm::delay(10_000_000); + + info!("low"); + led.set_low().unwrap(); + cortex_m::asm::delay(10_000_000); + } +} diff --git a/examples/stm32wb55/src/example_common.rs b/examples/stm32wb55/src/example_common.rs new file mode 100644 index 00000000..54d63383 --- /dev/null +++ b/examples/stm32wb55/src/example_common.rs @@ -0,0 +1,17 @@ +#![macro_use] + +use defmt_rtt as _; // global logger +use panic_probe as _; + +pub use defmt::*; + +use core::sync::atomic::{AtomicUsize, Ordering}; + +defmt::timestamp! {"{=u64}", { + static COUNT: AtomicUsize = AtomicUsize::new(0); + // NOTE(no-CAS) `timestamps` runs with interrupts disabled + let n = COUNT.load(Ordering::Relaxed); + COUNT.store(n + 1, Ordering::Relaxed); + n as u64 + } +} diff --git a/rust-toolchain.toml b/rust-toolchain.toml index 2cb17797..3e084ac4 100644 --- a/rust-toolchain.toml +++ b/rust-toolchain.toml @@ -3,4 +3,4 @@ [toolchain] channel = "nightly-2021-05-07" components = [ "rust-src", "rustfmt" ] -targets = [ "thumbv7em-none-eabi", "thumbv6m-none-eabi" ] +targets = [ "thumbv7em-none-eabi", "thumbv6m-none-eabi", "thumbv7em-none-eabihf" ] diff --git a/stm32-data b/stm32-data index a33b0b94..8f32d8e4 160000 --- a/stm32-data +++ b/stm32-data @@ -1 +1 @@ -Subproject commit a33b0b94b06cda756ed8cff0c404131f0349ae5d +Subproject commit 8f32d8e4f25276f6f2155e8dd5bbed1acefd657b