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remove rx-only support for new spi versions with missing I2SCFGR register

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Alexandros Liarokapis 2024-05-27 20:51:50 +03:00
parent 1d05015a1c
commit 9a6ed79ad1
1 changed files with 5 additions and 5 deletions
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10
embassy-stm32/src/spi/mod.rs
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@ -508,7 +508,7 @@ impl<'d> Spi<'d, Async> {
peri: impl Peripheral<P = T> + 'd,
sck: impl Peripheral<P = impl SckPin<T>> + 'd,
miso: impl Peripheral<P = impl MisoPin<T>> + 'd,
#[cfg(any(spi_v1, spi_f1))] tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
#[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))] tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
config: Config,
) -> Self {
@ -517,9 +517,9 @@ impl<'d> Spi<'d, Async> {
new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()),
None,
new_pin!(miso, AFType::Input, Speed::VeryHigh),
#[cfg(any(spi_v1, spi_f1))]
#[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))]
new_dma!(tx_dma),
#[cfg(any(spi_v2, spi_v3, spi_v4, spi_v5))]
#[cfg(any(spi_v2, spi_v3))]
None,
new_dma!(rx_dma),
config,
@ -626,7 +626,7 @@ impl<'d> Spi<'d, Async> {
}
/// SPI read, using DMA.
#[cfg(any(spi_v2, spi_v3, spi_v4, spi_v5))]
#[cfg(any(spi_v2, spi_v3))]
pub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error> {
if data.is_empty() {
return Ok(());
@ -723,7 +723,7 @@ impl<'d> Spi<'d, Async> {
}
/// SPI read, using DMA.
#[cfg(any(spi_v1, spi_f1))]
#[cfg(any(spi_v1, spi_f1, spi_v4, spi_v5))]
pub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error> {
if data.is_empty() {
return Ok(());