From 22901938ce4199c6545906226abecbe174a2e553 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 09:43:25 -0400 Subject: [PATCH 01/28] Split up the SPI trait into several with shared Error associated type. --- embassy-traits/src/spi.rs | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-) diff --git a/embassy-traits/src/spi.rs b/embassy-traits/src/spi.rs index 227b8bfea..d19a1e58a 100644 --- a/embassy-traits/src/spi.rs +++ b/embassy-traits/src/spi.rs @@ -18,25 +18,39 @@ use core::future::Future; /// /// - Some SPIs can work with 8-bit *and* 16-bit words. You can overload this trait with different /// `Word` types to allow operation in both modes. -pub trait FullDuplex { + +pub trait Spi { /// An enumeration of SPI errors type Error; +} + +pub trait FullDuplex : Spi + Write + Read { - type WriteFuture<'a>: Future> + 'a - where - Self: 'a; - type ReadFuture<'a>: Future> + 'a - where - Self: 'a; type WriteReadFuture<'a>: Future> + 'a where Self: 'a; - fn read<'a>(&'a mut self, data: &'a mut [Word]) -> Self::ReadFuture<'a>; - fn write<'a>(&'a mut self, data: &'a [Word]) -> Self::WriteFuture<'a>; fn read_write<'a>( &'a mut self, read: &'a mut [Word], write: &'a [Word], ) -> Self::WriteReadFuture<'a>; } + +pub trait Write : Spi{ + + type WriteFuture<'a>: Future> + 'a + where + Self: 'a; + + fn write<'a>(&'a mut self, data: &'a [Word]) -> Self::WriteFuture<'a>; +} + +pub trait Read : Spi{ + + type ReadFuture<'a>: Future> + 'a + where + Self: 'a; + + fn read<'a>(&'a mut self, data: &'a mut [Word]) -> Self::ReadFuture<'a>; +} \ No newline at end of file From d5ed5c3ef3d3bc2ad6f22a1f67dfd8021c259621 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 09:52:03 -0400 Subject: [PATCH 02/28] Split up the nRF impls for SPI traits. --- embassy-nrf/src/spim.rs | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs index 47d7c5f90..c3d4c5b30 100644 --- a/embassy-nrf/src/spim.rs +++ b/embassy-nrf/src/spim.rs @@ -9,7 +9,7 @@ use embassy::traits; use embassy::util::{AtomicWaker, Unborrow}; use embassy_extras::unborrow; use futures::future::poll_fn; -use traits::spi::FullDuplex; +use traits::spi::{ Spi, Read, Write, FullDuplex}; use crate::gpio; use crate::gpio::sealed::Pin as _; @@ -177,22 +177,31 @@ impl<'d, T: Instance> Drop for Spim<'d, T> { } } -impl<'d, T: Instance> FullDuplex for Spim<'d, T> { +impl<'d, T: Instance> Spi for Spim<'d, T> { type Error = Error; +} +impl<'d, T: Instance> Read for Spim<'d, T> { #[rustfmt::skip] - type WriteFuture<'a> where Self: 'a = impl Future> + 'a; - #[rustfmt::skip] - type ReadFuture<'a> where Self: 'a = impl Future> + 'a; - #[rustfmt::skip] - type WriteReadFuture<'a> where Self: 'a = impl Future> + 'a; + type ReadFuture<'a> where Self: 'a = impl Future> + 'a; fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> { self.read_write(data, &[]) } +} + +impl<'d, T: Instance> Write for Spim<'d, T> { + #[rustfmt::skip] + type WriteFuture<'a> where Self: 'a = impl Future> + 'a; + fn write<'a>(&'a mut self, data: &'a [u8]) -> Self::WriteFuture<'a> { self.read_write(&mut [], data) } +} + +impl<'d, T: Instance> FullDuplex for Spim<'d, T> { + #[rustfmt::skip] + type WriteReadFuture<'a> where Self: 'a = impl Future> + 'a; fn read_write<'a>(&'a mut self, rx: &'a mut [u8], tx: &'a [u8]) -> Self::WriteReadFuture<'a> { async move { From 58edefff6ea8246c6b607d72546ee07878d2c98a Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 09:54:19 -0400 Subject: [PATCH 03/28] Formatting. --- embassy-nrf/src/spim.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs index c3d4c5b30..221c52051 100644 --- a/embassy-nrf/src/spim.rs +++ b/embassy-nrf/src/spim.rs @@ -9,7 +9,7 @@ use embassy::traits; use embassy::util::{AtomicWaker, Unborrow}; use embassy_extras::unborrow; use futures::future::poll_fn; -use traits::spi::{ Spi, Read, Write, FullDuplex}; +use traits::spi::{FullDuplex, Read, Spi, Write}; use crate::gpio; use crate::gpio::sealed::Pin as _; From a345dd9e2baa7f3b3b249012cf69d39876658571 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 10:02:33 -0400 Subject: [PATCH 04/28] More formatting! --- embassy-traits/src/spi.rs | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/embassy-traits/src/spi.rs b/embassy-traits/src/spi.rs index d19a1e58a..961da38c4 100644 --- a/embassy-traits/src/spi.rs +++ b/embassy-traits/src/spi.rs @@ -24,8 +24,7 @@ pub trait Spi { type Error; } -pub trait FullDuplex : Spi + Write + Read { - +pub trait FullDuplex: Spi + Write + Read { type WriteReadFuture<'a>: Future> + 'a where Self: 'a; @@ -37,20 +36,18 @@ pub trait FullDuplex : Spi + Write + Read { ) -> Self::WriteReadFuture<'a>; } -pub trait Write : Spi{ - +pub trait Write: Spi { type WriteFuture<'a>: Future> + 'a where - Self: 'a; + Self: 'a; fn write<'a>(&'a mut self, data: &'a [Word]) -> Self::WriteFuture<'a>; } -pub trait Read : Spi{ - +pub trait Read: Spi { type ReadFuture<'a>: Future> + 'a where - Self: 'a; + Self: 'a; fn read<'a>(&'a mut self, data: &'a mut [Word]) -> Self::ReadFuture<'a>; -} \ No newline at end of file +} From fe66f0f8f83e03d3ab9bf766ffe41ecd6a0c7a38 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 09:19:23 -0400 Subject: [PATCH 05/28] Checkpoint. --- embassy-stm32/src/spi/mod.rs | 29 ++++++++++++++++++--- embassy-stm32/src/spi/v3.rs | 50 ++++++++++++++++++++++++++++++------ 2 files changed, 68 insertions(+), 11 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 9b04c03aa..91b3d4ab3 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,13 +1,14 @@ #![macro_use] -#[cfg_attr(spi_v1, path = "v1.rs")] -#[cfg_attr(spi_v2, path = "v2.rs")] +//#[cfg_attr(spi_v1, path = "v1.rs")] +//#[cfg_attr(spi_v2, path = "v2.rs")] #[cfg_attr(spi_v3, path = "v3.rs")] mod _version; -use crate::{peripherals, rcc::RccPeripheral}; +use crate::{dma, peripherals, rcc::RccPeripheral}; pub use _version::*; use crate::gpio::Pin; +use core::marker::PhantomData; #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { @@ -62,6 +63,14 @@ pub(crate) mod sealed { pub trait MisoPin: Pin { fn af_num(&self) -> u8; } + + pub trait TxDmaChannel { + fn request(&self) -> dma::Request; + } + + pub trait RxDmaChannel { + fn request(&self) -> dma::Request; + } } pub trait Instance: sealed::Instance + RccPeripheral + 'static {} @@ -72,6 +81,20 @@ pub trait MosiPin: sealed::MosiPin + 'static {} pub trait MisoPin: sealed::MisoPin + 'static {} +pub trait TxDmaChannel: sealed::TxDmaChannel + 'static {} + +pub trait RxDmaChannel: sealed::RxDmaChannel + 'static {} + +pub trait SpiDma {} + +pub struct DmaPair, Rx: RxDmaChannel> { + tx: Tx, + rx: Rx, + _phantom: PhantomData, +} + +impl, Rx: RxDmaChannel> SpiDma for DmaPair {} + crate::pac::peripherals!( (spi, $inst:ident) => { impl sealed::Instance for peripherals::$inst { diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index 0b4a71457..2c6d4415f 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -4,7 +4,10 @@ use crate::gpio::{AnyPin, Pin}; use crate::pac::gpio::vals::{Afr, Moder}; use crate::pac::gpio::Gpio; use crate::pac::spi; -use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize}; +use crate::spi::{ + ByteOrder, Config, DmaPair, Error, Instance, MisoPin, MosiPin, RxDmaChannel, SckPin, SpiDma, + TxDmaChannel, WordSize, +}; use crate::time::Hertz; use core::marker::PhantomData; use core::ptr; @@ -28,26 +31,28 @@ impl WordSize { } } -pub struct Spi<'d, T: Instance> { +pub struct Spi<'d, T: Instance, D = NoDma> { sck: AnyPin, mosi: AnyPin, miso: AnyPin, + dma: D, phantom: PhantomData<&'d mut T>, } -impl<'d, T: Instance> Spi<'d, T> { +impl<'d, T: Instance, D> Spi<'d, T, D> { pub fn new( _peri: impl Unborrow + 'd, sck: impl Unborrow>, mosi: impl Unborrow>, miso: impl Unborrow>, + dma: impl Unborrow, freq: F, config: Config, ) -> Self where F: Into, { - unborrow!(sck, mosi, miso); + unborrow!(sck, mosi, miso, dma); unsafe { Self::configure_pin(sck.block(), sck.pin() as _, sck.af_num()); @@ -113,6 +118,7 @@ impl<'d, T: Instance> Spi<'d, T> { sck, mosi, miso, + dma, phantom: PhantomData, } } @@ -173,7 +179,7 @@ impl<'d, T: Instance> Drop for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T, NoDma> { type Error = Error; fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { @@ -210,7 +216,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T, NoDma> { type Error = Error; fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { @@ -267,7 +273,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T, NoDma> { type Error = Error; fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { @@ -304,7 +310,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T, NoDma> { type Error = Error; fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { @@ -357,3 +363,31 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> Ok(words) } } + +use crate::dma::NoDma; +use core::future::Future; +use embassy_traits::spi::FullDuplex; + +#[rustfmt::skip] +impl<'d, T: Instance, Tx: TxDmaChannel, Rx: RxDmaChannel> FullDuplex for Spi<'d, T, DmaPair> { + type Error = super::Error; + type WriteFuture<'a> where Self: 'a = impl Future> + 'a; + type ReadFuture<'a> where Self: 'a = impl Future> + 'a; + type WriteReadFuture<'a> where Self: 'a = impl Future> + 'a; + + fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> { + unimplemented!() + } + + fn write<'a>(&'a mut self, data: &'a [u8]) -> Self::WriteFuture<'a> { + unimplemented!() + } + + fn read_write<'a>( + &'a mut self, + read: &'a mut [u8], + write: &'a [u8], + ) -> Self::WriteReadFuture<'a> { + unimplemented!() + } +} From 3f379e06b0351ca21c9d1001c68d39c9c26cdc02 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 13:38:44 -0400 Subject: [PATCH 06/28] Begin reworking SPI to add DMA for stm32. --- embassy-stm32/src/spi/mod.rs | 28 +++----------- embassy-stm32/src/spi/v3.rs | 75 +++++++++++++++++++++++++----------- embassy-traits/src/spi.rs | 2 +- 3 files changed, 59 insertions(+), 46 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 91b3d4ab3..f84d820b5 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -8,7 +8,6 @@ use crate::{dma, peripherals, rcc::RccPeripheral}; pub use _version::*; use crate::gpio::Pin; -use core::marker::PhantomData; #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Error { @@ -73,27 +72,12 @@ pub(crate) mod sealed { } } -pub trait Instance: sealed::Instance + RccPeripheral + 'static {} - -pub trait SckPin: sealed::SckPin + 'static {} - -pub trait MosiPin: sealed::MosiPin + 'static {} - -pub trait MisoPin: sealed::MisoPin + 'static {} - -pub trait TxDmaChannel: sealed::TxDmaChannel + 'static {} - -pub trait RxDmaChannel: sealed::RxDmaChannel + 'static {} - -pub trait SpiDma {} - -pub struct DmaPair, Rx: RxDmaChannel> { - tx: Tx, - rx: Rx, - _phantom: PhantomData, -} - -impl, Rx: RxDmaChannel> SpiDma for DmaPair {} +pub trait Instance: sealed::Instance + RccPeripheral {} +pub trait SckPin: sealed::SckPin {} +pub trait MosiPin: sealed::MosiPin {} +pub trait MisoPin: sealed::MisoPin {} +pub trait TxDmaChannel: sealed::TxDmaChannel + dma::Channel {} +pub trait RxDmaChannel: sealed::RxDmaChannel + dma::Channel {} crate::pac::peripherals!( (spi, $inst:ident) => { diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index 2c6d4415f..6a6a01550 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -1,18 +1,21 @@ #![macro_use] +use crate::dma::NoDma; use crate::gpio::{AnyPin, Pin}; use crate::pac::gpio::vals::{Afr, Moder}; use crate::pac::gpio::Gpio; use crate::pac::spi; use crate::spi::{ - ByteOrder, Config, DmaPair, Error, Instance, MisoPin, MosiPin, RxDmaChannel, SckPin, SpiDma, - TxDmaChannel, WordSize, + ByteOrder, Config, Error, Instance, MisoPin, MosiPin, RxDmaChannel, SckPin, TxDmaChannel, + WordSize, }; use crate::time::Hertz; +use core::future::Future; use core::marker::PhantomData; use core::ptr; use embassy::util::Unborrow; use embassy_extras::unborrow; +use embassy_traits::spi as traits; pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; impl WordSize { @@ -31,28 +34,30 @@ impl WordSize { } } -pub struct Spi<'d, T: Instance, D = NoDma> { +pub struct Spi<'d, T: Instance, Tx = NoDma, Rx = NoDma> { sck: AnyPin, mosi: AnyPin, miso: AnyPin, - dma: D, + txdma: Tx, + rxdma: Rx, phantom: PhantomData<&'d mut T>, } -impl<'d, T: Instance, D> Spi<'d, T, D> { +impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { pub fn new( _peri: impl Unborrow + 'd, sck: impl Unborrow>, mosi: impl Unborrow>, miso: impl Unborrow>, - dma: impl Unborrow, + txdma: impl Unborrow, + rxdma: impl Unborrow, freq: F, config: Config, ) -> Self where F: Into, { - unborrow!(sck, mosi, miso, dma); + unborrow!(sck, mosi, miso, txdma, rxdma); unsafe { Self::configure_pin(sck.block(), sck.pin() as _, sck.af_num()); @@ -118,7 +123,8 @@ impl<'d, T: Instance, D> Spi<'d, T, D> { sck, mosi, miso, - dma, + txdma, + rxdma, phantom: PhantomData, } } @@ -167,9 +173,21 @@ impl<'d, T: Instance, D> Spi<'d, T, D> { }); } } + + async fn write_dma_u8(&mut self, write: &[u8]) -> Result<(), Error> { + unimplemented!() + } + + async fn read_dma_u8(&mut self, read: &mut [u8]) -> Result<(), Error> { + unimplemented!() + } + + async fn read_write_dma_u8(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error> { + unimplemented!() + } } -impl<'d, T: Instance> Drop for Spi<'d, T> { +impl<'d, T: Instance, Tx, Rx> Drop for Spi<'d, T, Tx, Rx> { fn drop(&mut self) { unsafe { Self::unconfigure_pin(self.sck.block(), self.sck.pin() as _); @@ -364,30 +382,41 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T, } } -use crate::dma::NoDma; -use core::future::Future; -use embassy_traits::spi::FullDuplex; - -#[rustfmt::skip] -impl<'d, T: Instance, Tx: TxDmaChannel, Rx: RxDmaChannel> FullDuplex for Spi<'d, T, DmaPair> { +impl<'d, T: Instance, Tx, Rx> traits::Spi for Spi<'d, T, Tx, Rx> { type Error = super::Error; - type WriteFuture<'a> where Self: 'a = impl Future> + 'a; - type ReadFuture<'a> where Self: 'a = impl Future> + 'a; - type WriteReadFuture<'a> where Self: 'a = impl Future> + 'a; +} - fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> { - unimplemented!() - } +impl<'d, T: Instance, Tx: TxDmaChannel, Rx> traits::Write for Spi<'d, T, Tx, Rx> { + #[rustfmt::skip] + type WriteFuture<'a> where Self: 'a = impl Future> + 'a; fn write<'a>(&'a mut self, data: &'a [u8]) -> Self::WriteFuture<'a> { - unimplemented!() + self.write_dma_u8(data) } +} + +impl<'d, T: Instance, Tx: TxDmaChannel, Rx: RxDmaChannel> traits::Read + for Spi<'d, T, Tx, Rx> +{ + #[rustfmt::skip] + type ReadFuture<'a> where Self: 'a = impl Future> + 'a; + + fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> { + self.read_dma_u8(data) + } +} + +impl<'d, T: Instance, Tx: TxDmaChannel, Rx: RxDmaChannel> traits::FullDuplex + for Spi<'d, T, Tx, Rx> +{ + #[rustfmt::skip] + type WriteReadFuture<'a> where Self: 'a = impl Future> + 'a; fn read_write<'a>( &'a mut self, read: &'a mut [u8], write: &'a [u8], ) -> Self::WriteReadFuture<'a> { - unimplemented!() + self.read_write_dma_u8(read, write) } } diff --git a/embassy-traits/src/spi.rs b/embassy-traits/src/spi.rs index 961da38c4..9d044dfd3 100644 --- a/embassy-traits/src/spi.rs +++ b/embassy-traits/src/spi.rs @@ -44,7 +44,7 @@ pub trait Write: Spi { fn write<'a>(&'a mut self, data: &'a [Word]) -> Self::WriteFuture<'a>; } -pub trait Read: Spi { +pub trait Read: Write { type ReadFuture<'a>: Future> + 'a where Self: 'a; From a75110296d10bf00315caeae429a0dbc4458ddad Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 13:48:54 -0400 Subject: [PATCH 07/28] Annotate to avoid unused warnings for the moment. --- embassy-stm32/src/spi/v3.rs | 3 +++ 1 file changed, 3 insertions(+) diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index 6a6a01550..bd3c74288 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -174,14 +174,17 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { } } + #[allow(unused)] async fn write_dma_u8(&mut self, write: &[u8]) -> Result<(), Error> { unimplemented!() } + #[allow(unused)] async fn read_dma_u8(&mut self, read: &mut [u8]) -> Result<(), Error> { unimplemented!() } + #[allow(unused)] async fn read_write_dma_u8(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error> { unimplemented!() } From 4bcc3b06c6c506e1856599e1160d2676e63801e6 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 14:01:33 -0400 Subject: [PATCH 08/28] Include all versions when handing to CI. --- embassy-stm32/src/spi/mod.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index f84d820b5..7e1686443 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -//#[cfg_attr(spi_v1, path = "v1.rs")] -//#[cfg_attr(spi_v2, path = "v2.rs")] +#[cfg_attr(spi_v1, path = "v1.rs")] +#[cfg_attr(spi_v2, path = "v2.rs")] #[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; From 7bbad4c4e577c310a15667543e3670d205e29c8f Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 14:07:11 -0400 Subject: [PATCH 09/28] More unused allowances. --- embassy-stm32/src/spi/v3.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index bd3c74288..2df2b49b6 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -34,6 +34,7 @@ impl WordSize { } } +#[allow(unused)] pub struct Spi<'d, T: Instance, Tx = NoDma, Rx = NoDma> { sck: AnyPin, mosi: AnyPin, From 4c5a234a3aff07077cba4e8fe42feb10ed8458bd Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 15:20:16 -0400 Subject: [PATCH 10/28] Add a non-minc write() to DMA which takes a count. Use it from "read-only" SPI. --- embassy-stm32/src/dma/bdma.rs | 29 ++++++++++++++++++ embassy-stm32/src/dma/dma.rs | 29 ++++++++++++++++++ embassy-stm32/src/dma/mod.rs | 8 +++++ embassy-stm32/src/spi/mod.rs | 4 +-- embassy-stm32/src/spi/v3.rs | 56 ++++++++++++++++++++++++++++++----- 5 files changed, 117 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs index e2da2a8ea..46670e1be 100644 --- a/embassy-stm32/src/dma/bdma.rs +++ b/embassy-stm32/src/dma/bdma.rs @@ -47,6 +47,7 @@ pub(crate) unsafe fn do_transfer( peri_addr: *const u8, mem_addr: *mut u8, mem_len: usize, + incr_mem: bool, #[cfg(dmamux)] dmamux_regs: pac::dmamux::Dmamux, #[cfg(dmamux)] dmamux_ch_num: u8, ) -> impl Future { @@ -182,6 +183,7 @@ pac::dma_channels! { src, buf.as_mut_ptr(), buf.len(), + true, #[cfg(dmamux)] ::DMAMUX_REGS, #[cfg(dmamux)] @@ -206,6 +208,33 @@ pac::dma_channels! { dst, buf.as_ptr() as *mut u8, buf.len(), + true, + #[cfg(dmamux)] + ::DMAMUX_REGS, + #[cfg(dmamux)] + ::DMAMUX_CH_NUM, + ) + } + } + + fn write_x<'a>( + &'a mut self, + request: Request, + word: &u8, + count: usize, + dst: *mut u8, + ) -> Self::WriteFuture<'a> { + unsafe { + do_transfer( + crate::pac::$dma_peri, + $channel_num, + (dma_num!($dma_peri) * 8) + $channel_num, + request, + vals::Dir::FROMMEMORY, + dst, + word as *const u8 as *mut u8, + count, + false, #[cfg(dmamux)] ::DMAMUX_REGS, #[cfg(dmamux)] diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs index cf0889a3e..9ac6df159 100644 --- a/embassy-stm32/src/dma/dma.rs +++ b/embassy-stm32/src/dma/dma.rs @@ -48,6 +48,7 @@ pub(crate) unsafe fn do_transfer( peri_addr: *const u8, mem_addr: *mut u8, mem_len: usize, + incr_mem: bool, #[cfg(dmamux)] dmamux_regs: pac::dmamux::Dmamux, #[cfg(dmamux)] dmamux_ch_num: u8, ) -> impl Future { @@ -187,6 +188,7 @@ pac::dma_channels! { src, buf.as_mut_ptr(), buf.len(), + true, #[cfg(dmamux)] ::DMAMUX_REGS, #[cfg(dmamux)] @@ -211,6 +213,33 @@ pac::dma_channels! { dst, buf.as_ptr() as *mut u8, buf.len(), + true, + #[cfg(dmamux)] + ::DMAMUX_REGS, + #[cfg(dmamux)] + ::DMAMUX_CH_NUM, + ) + } + } + + fn write_x<'a>( + &'a mut self, + request: Request, + word: &u8, + num: usize, + dst: *mut u8, + ) -> Self::WriteFuture<'a> { + unsafe { + do_transfer( + crate::pac::$dma_peri, + $channel_num, + (dma_num!($dma_peri) * 8) + $channel_num, + request, + vals::Dir::MEMORYTOPERIPHERAL, + dst, + word as *const u8 as *mut u8, + num, + false, #[cfg(dmamux)] ::DMAMUX_REGS, #[cfg(dmamux)] diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs index fbf82b87b..60f6a3020 100644 --- a/embassy-stm32/src/dma/mod.rs +++ b/embassy-stm32/src/dma/mod.rs @@ -42,6 +42,14 @@ pub trait Channel: sealed::Channel { buf: &'a [u8], dst: *mut u8, ) -> Self::WriteFuture<'a>; + + fn write_x<'a>( + &'a mut self, + request: Request, + word: &u8, + num: usize, + dst: *mut u8, + ) -> Self::WriteFuture<'a>; } pub struct NoDma; diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 7e1686443..f84d820b5 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -#[cfg_attr(spi_v1, path = "v1.rs")] -#[cfg_attr(spi_v2, path = "v2.rs")] +//#[cfg_attr(spi_v1, path = "v1.rs")] +//#[cfg_attr(spi_v2, path = "v2.rs")] #[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index 2df2b49b6..a3f9b8911 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -18,6 +18,8 @@ use embassy_extras::unborrow; use embassy_traits::spi as traits; pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; +use futures::future::join; + impl WordSize { fn dsize(&self) -> u8 { match self { @@ -176,18 +178,58 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { } #[allow(unused)] - async fn write_dma_u8(&mut self, write: &[u8]) -> Result<(), Error> { + async fn write_dma_u8(&mut self, write: &[u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + { + let request = self.txdma.request(); + let dst = T::regs().txdr().ptr() as *mut u8; + let f = self.txdma.write(request, write, dst); + unsafe { + T::regs().cfg1().modify(|reg| { + reg.set_txdmaen(true); + }); + } + + f.await; + Ok(()) + } + + #[allow(unused)] + async fn read_dma_u8(&mut self, read: &mut [u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + Rx: RxDmaChannel, + { unimplemented!() } #[allow(unused)] - async fn read_dma_u8(&mut self, read: &mut [u8]) -> Result<(), Error> { - unimplemented!() - } + async fn read_write_dma_u8(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + Rx: RxDmaChannel, + { + let rx_request = self.rxdma.request(); + let rx_src = T::regs().rxdr().ptr() as *mut u8; + let rx_f = self.rxdma.read(rx_request, rx_src, read); - #[allow(unused)] - async fn read_write_dma_u8(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error> { - unimplemented!() + let tx_request = self.txdma.request(); + let tx_dst = T::regs().txdr().ptr() as *mut u8; + let clock_byte = 0x00; + let tx_f = self + .txdma + .write_x(tx_request, &clock_byte, read.len(), tx_dst); + + unsafe { + T::regs().cfg1().modify(|reg| { + reg.set_txdmaen(true); + reg.set_rxdmaen(true); + }); + } + + let r = join(tx_f, rx_f).await; + Ok(()) } } From dedc2bac427f5c68da70038d7e7f773795f44041 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 15:27:57 -0400 Subject: [PATCH 11/28] IntelliJ'd. --- embassy-stm32/src/spi/mod.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index f84d820b5..7e1686443 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -//#[cfg_attr(spi_v1, path = "v1.rs")] -//#[cfg_attr(spi_v2, path = "v2.rs")] +#[cfg_attr(spi_v1, path = "v1.rs")] +#[cfg_attr(spi_v2, path = "v2.rs")] #[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; From 3df2aadc391fb32fd5f7cb09fe0b7208c15c9642 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 15:33:42 -0400 Subject: [PATCH 12/28] Avoid borrowck issue. --- embassy-stm32/src/spi/v3.rs | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index a3f9b8911..eb8df44ae 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -210,6 +210,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { Tx: TxDmaChannel, Rx: RxDmaChannel, { + let clock_byte_count = read.len(); + let rx_request = self.rxdma.request(); let rx_src = T::regs().rxdr().ptr() as *mut u8; let rx_f = self.rxdma.read(rx_request, rx_src, read); @@ -219,7 +221,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { let clock_byte = 0x00; let tx_f = self .txdma - .write_x(tx_request, &clock_byte, read.len(), tx_dst); + .write_x(tx_request, &clock_byte, clock_byte_count, tx_dst); unsafe { T::regs().cfg1().modify(|reg| { From 1a03f00b56061dbef8a3aae6e499e5e635b3fd4d Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Tue, 20 Jul 2021 15:44:13 -0400 Subject: [PATCH 13/28] Wire up peripheral DMA channels for SPI. --- embassy-stm32/src/spi/mod.rs | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 7e1686443..9bb5a729c 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -116,3 +116,39 @@ crate::pac::peripheral_pins!( impl_pin!($inst, $pin, MisoPin, $af); }; ); + +macro_rules! impl_dma { + ($inst:ident, {dmamux: $dmamux:ident}, $signal:ident, $request:expr) => { + impl sealed::$signal for T + where + T: crate::dma::MuxChannel, + { + fn request(&self) -> dma::Request { + $request + } + } + + impl $signal for T where + T: crate::dma::MuxChannel + { + } + }; + ($inst:ident, {channel: $channel:ident}, $signal:ident, $request:expr) => { + impl sealed::$signal for peripherals::$channel { + fn request(&self) -> dma::Request { + $request + } + } + + impl $signal for peripherals::$channel {} + }; +} + +crate::pac::peripheral_dma_channels! { + ($peri:ident, spi, $kind:ident, RX, $channel:tt, $request:expr) => { + impl_dma!($peri, $channel, RxDmaChannel, $request); + }; + ($peri:ident, spi, $kind:ident, TX, $channel:tt, $request:expr) => { + impl_dma!($peri, $channel, TxDmaChannel, $request); + }; +} From 0d2051243ef62aac7210dd68c7569912fa315fb2 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 10:42:22 -0400 Subject: [PATCH 14/28] SPIv2 + DMA. --- embassy-stm32/src/dma/bdma.rs | 6 +- embassy-stm32/src/spi/mod.rs | 4 +- embassy-stm32/src/spi/v2.rs | 217 ++++++++++++++++++++++++++-- embassy-stm32/src/spi/v3.rs | 28 +++- examples/stm32l4/src/bin/spi.rs | 3 + examples/stm32l4/src/bin/spi_dma.rs | 103 +++++++++++++ 6 files changed, 344 insertions(+), 17 deletions(-) create mode 100644 examples/stm32l4/src/bin/spi_dma.rs diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs index 46670e1be..adb288eb0 100644 --- a/embassy-stm32/src/dma/bdma.rs +++ b/embassy-stm32/src/dma/bdma.rs @@ -89,7 +89,11 @@ pub(crate) unsafe fn do_transfer( ch.cr().write(|w| { w.set_psize(vals::Size::BITS8); w.set_msize(vals::Size::BITS8); - w.set_minc(vals::Inc::ENABLED); + if incr_mem { + w.set_minc(vals::Inc::ENABLED); + } else { + w.set_minc(vals::Inc::DISABLED); + } w.set_dir(dir); w.set_teie(true); w.set_tcie(true); diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 9bb5a729c..046ec0fe7 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,8 +1,8 @@ #![macro_use] -#[cfg_attr(spi_v1, path = "v1.rs")] +//#[cfg_attr(spi_v1, path = "v1.rs")] #[cfg_attr(spi_v2, path = "v2.rs")] -#[cfg_attr(spi_v3, path = "v3.rs")] +//#[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; pub use _version::*; diff --git a/embassy-stm32/src/spi/v2.rs b/embassy-stm32/src/spi/v2.rs index 4e135e9df..400fd89af 100644 --- a/embassy-stm32/src/spi/v2.rs +++ b/embassy-stm32/src/spi/v2.rs @@ -1,16 +1,23 @@ #![macro_use] +use crate::dma::NoDma; use crate::gpio::{AnyPin, Pin}; use crate::pac::gpio::vals::{Afr, Moder}; use crate::pac::gpio::Gpio; use crate::pac::spi; -use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize}; +use crate::spi::{ + ByteOrder, Config, Error, Instance, MisoPin, MosiPin, RxDmaChannel, SckPin, TxDmaChannel, + WordSize, +}; use crate::time::Hertz; +use core::future::Future; use core::marker::PhantomData; use core::ptr; use embassy::util::Unborrow; use embassy_extras::unborrow; +use embassy_traits::spi as traits; pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; +use futures::future::join3; impl WordSize { fn ds(&self) -> spi::vals::Ds { @@ -28,26 +35,30 @@ impl WordSize { } } -pub struct Spi<'d, T: Instance> { +pub struct Spi<'d, T: Instance, Tx, Rx> { sck: AnyPin, mosi: AnyPin, miso: AnyPin, + txdma: Tx, + rxdma: Rx, phantom: PhantomData<&'d mut T>, } -impl<'d, T: Instance> Spi<'d, T> { +impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { pub fn new( _peri: impl Unborrow + 'd, sck: impl Unborrow>, mosi: impl Unborrow>, miso: impl Unborrow>, + txdma: impl Unborrow, + rxdma: impl Unborrow, freq: F, config: Config, ) -> Self where F: Into, { - unborrow!(sck, mosi, miso); + unborrow!(sck, mosi, miso, txdma, rxdma); unsafe { Self::configure_pin(sck.block(), sck.pin() as _, sck.af_num()); @@ -98,6 +109,8 @@ impl<'d, T: Instance> Spi<'d, T> { sck, mosi, miso, + txdma, + rxdma, phantom: PhantomData, } } @@ -140,9 +153,156 @@ impl<'d, T: Instance> Spi<'d, T> { }); } } + + #[allow(unused)] + async fn write_dma_u8(&mut self, write: &[u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + { + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + T::regs().cr2().modify(|reg| { + reg.set_rxdmaen(true); + }); + } + Self::set_word_size(WordSize::EightBit); + + let request = self.txdma.request(); + let dst = T::regs().dr().ptr() as *mut u8; + let f = self.txdma.write(request, write, dst); + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(true); + }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + } + + f.await; + Ok(()) + } + + #[allow(unused)] + async fn read_dma_u8(&mut self, read: &mut [u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + Rx: RxDmaChannel, + { + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + T::regs().cr2().modify(|reg| { + reg.set_rxdmaen(true); + }); + } + Self::set_word_size(WordSize::EightBit); + + let clock_byte_count = read.len(); + + let rx_request = self.rxdma.request(); + let rx_src = T::regs().dr().ptr() as *mut u8; + let rx_f = self.rxdma.read(rx_request, rx_src, read); + + let tx_request = self.txdma.request(); + let tx_dst = T::regs().dr().ptr() as *mut u8; + let clock_byte = 0x00; + let tx_f = self + .txdma + .write_x(tx_request, &clock_byte, clock_byte_count, tx_dst); + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(true); + }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + } + + join3(tx_f, rx_f, Self::wait_for_idle()).await; + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(false); + reg.set_rxdmaen(false); + }); + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + } + + Ok(()) + } + + #[allow(unused)] + async fn read_write_dma_u8(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + Rx: RxDmaChannel, + { + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + T::regs().cr2().modify(|reg| { + reg.set_rxdmaen(true); + }); + } + Self::set_word_size(WordSize::EightBit); + + let rx_request = self.rxdma.request(); + let rx_src = T::regs().dr().ptr() as *mut u8; + let rx_f = self.rxdma.read(rx_request, rx_src, read); + + let tx_request = self.txdma.request(); + let tx_dst = T::regs().dr().ptr() as *mut u8; + let tx_f = self.txdma.write(tx_request, write, tx_dst); + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(true); + }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + } + + join3(tx_f, rx_f, Self::wait_for_idle()).await; + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(false); + reg.set_rxdmaen(false); + }); + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + } + + Ok(()) + } + + async fn wait_for_idle() { + unsafe { + while T::regs().sr().read().ftlvl() > 0 { + // spin + } + while T::regs().sr().read().frlvl() > 0 { + // spin + } + while T::regs().sr().read().bsy() { + // spin + } + } + } } -impl<'d, T: Instance> Drop for Spi<'d, T> { +impl<'d, T: Instance, Tx, Rx> Drop for Spi<'d, T, Tx, Rx> { fn drop(&mut self) { unsafe { Self::unconfigure_pin(self.sck.block(), self.sck.pin() as _); @@ -200,7 +360,7 @@ fn read_word(regs: &'static crate::pac::spi::Spi) -> Result { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { +impl<'d, T: Instance, Rx> embedded_hal::blocking::spi::Write for Spi<'d, T, NoDma, Rx> { type Error = Error; fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { @@ -216,7 +376,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T, NoDma, NoDma> { type Error = Error; fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { @@ -232,7 +392,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { +impl<'d, T: Instance, Rx> embedded_hal::blocking::spi::Write for Spi<'d, T, NoDma, Rx> { type Error = Error; fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { @@ -248,7 +408,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T, NoDma, NoDma> { type Error = Error; fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { @@ -263,3 +423,42 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> Ok(words) } } + +impl<'d, T: Instance, Tx, Rx> traits::Spi for Spi<'d, T, Tx, Rx> { + type Error = super::Error; +} + +impl<'d, T: Instance, Tx: TxDmaChannel, Rx> traits::Write for Spi<'d, T, Tx, Rx> { + #[rustfmt::skip] + type WriteFuture<'a> where Self: 'a = impl Future> + 'a; + + fn write<'a>(&'a mut self, data: &'a [u8]) -> Self::WriteFuture<'a> { + self.write_dma_u8(data) + } +} + +impl<'d, T: Instance, Tx: TxDmaChannel, Rx: RxDmaChannel> traits::Read + for Spi<'d, T, Tx, Rx> +{ + #[rustfmt::skip] + type ReadFuture<'a> where Self: 'a = impl Future> + 'a; + + fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> { + self.read_dma_u8(data) + } +} + +impl<'d, T: Instance, Tx: TxDmaChannel, Rx: RxDmaChannel> traits::FullDuplex + for Spi<'d, T, Tx, Rx> +{ + #[rustfmt::skip] + type WriteReadFuture<'a> where Self: 'a = impl Future> + 'a; + + fn read_write<'a>( + &'a mut self, + read: &'a mut [u8], + write: &'a [u8], + ) -> Self::WriteReadFuture<'a> { + self.read_write_dma_u8(read, write) + } +} diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index eb8df44ae..fb2a46f3e 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -201,7 +201,28 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { Tx: TxDmaChannel, Rx: RxDmaChannel, { - unimplemented!() + let clock_byte_count = read.len(); + + let rx_request = self.rxdma.request(); + let rx_src = T::regs().rxdr().ptr() as *mut u8; + let rx_f = self.rxdma.read(rx_request, rx_src, read); + + let tx_request = self.txdma.request(); + let tx_dst = T::regs().txdr().ptr() as *mut u8; + let clock_byte = 0x00; + let tx_f = self + .txdma + .write_x(tx_request, &clock_byte, clock_byte_count, tx_dst); + + unsafe { + T::regs().cfg1().modify(|reg| { + reg.set_txdmaen(true); + reg.set_rxdmaen(true); + }); + } + + let r = join(tx_f, rx_f).await; + Ok(()) } #[allow(unused)] @@ -218,10 +239,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { let tx_request = self.txdma.request(); let tx_dst = T::regs().txdr().ptr() as *mut u8; - let clock_byte = 0x00; - let tx_f = self - .txdma - .write_x(tx_request, &clock_byte, clock_byte_count, tx_dst); + let tx_f = self.txdma.write(tx_request, write, tx_dst); unsafe { T::regs().cfg1().modify(|reg| { diff --git a/examples/stm32l4/src/bin/spi.rs b/examples/stm32l4/src/bin/spi.rs index 8702fe0cc..14605283b 100644 --- a/examples/stm32l4/src/bin/spi.rs +++ b/examples/stm32l4/src/bin/spi.rs @@ -17,6 +17,7 @@ use embassy_stm32::time::Hertz; use embedded_hal::blocking::spi::Transfer; use embedded_hal::digital::v2::OutputPin; use example_common::*; +use embassy_stm32::dma::NoDma; #[entry] fn main() -> ! { @@ -41,6 +42,8 @@ fn main() -> ! { p.PC10, p.PC12, p.PC11, + NoDma, + NoDma, Hertz(1_000_000), Config::default(), ); diff --git a/examples/stm32l4/src/bin/spi_dma.rs b/examples/stm32l4/src/bin/spi_dma.rs new file mode 100644 index 000000000..ca77c2f9b --- /dev/null +++ b/examples/stm32l4/src/bin/spi_dma.rs @@ -0,0 +1,103 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; + +use cortex_m_rt::entry; +use embassy::executor::Executor; +use embassy::time::Clock; +use embassy::util::Forever; +use embassy_stm32::pac; +use example_common::*; +use embassy_stm32::spi::{Spi, Config}; +use embassy_traits::spi::FullDuplex; +use embassy_stm32::time::Hertz; +use embassy_stm32::gpio::{Output, Level, Speed}; +use embedded_hal::digital::v2::OutputPin; + +#[embassy::task] +async fn main_task() { + let p = embassy_stm32::init(Default::default()); + + let mut spi = Spi::new( + p.SPI3, + p.PC10, + p.PC12, + p.PC11, + p.DMA1_CH0, + p.DMA1_CH1, + Hertz(1_000_000), + Config::default(), + ); + + let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); + + loop { + let write = [0x0A; 10]; + let mut read = [0; 10]; + unwrap!(cs.set_low()); + spi.read_write(&mut read, &write).await.ok(); + unwrap!(cs.set_high()); + info!("xfer {=[u8]:x}", read); + } +} + +struct ZeroClock; + +impl Clock for ZeroClock { + fn now(&self) -> u64 { + 0 + } +} + +static EXECUTOR: Forever = Forever::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + unsafe { + pac::DBGMCU.cr().modify(|w| { + w.set_dbg_sleep(true); + w.set_dbg_standby(true); + w.set_dbg_stop(true); + }); + + //pac::RCC.apbenr().modify(|w| { + //w.set_spi3en(true); + // }); + + pac::RCC.apb2enr().modify(|w| { + w.set_syscfgen(true); + }); + + pac::RCC.ahb1enr().modify(|w| { + w.set_dmamux1en(true); + w.set_dma1en(true); + w.set_dma2en(true); + }); + + pac::RCC.ahb2enr().modify(|w| { + w.set_gpioaen(true); + w.set_gpioben(true); + w.set_gpiocen(true); + w.set_gpioden(true); + w.set_gpioeen(true); + w.set_gpiofen(true); + }); + } + + unsafe { embassy::time::set_clock(&ZeroClock) }; + + let executor = EXECUTOR.put(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task())); + }) +} From bee7f60f080e091bb26cb3aa9c7239cda6a3ffac Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 10:52:26 -0400 Subject: [PATCH 15/28] Improve the SPIv2 DMA example to verify it actually works. --- examples/stm32l4/src/bin/spi_dma.rs | 33 ++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git a/examples/stm32l4/src/bin/spi_dma.rs b/examples/stm32l4/src/bin/spi_dma.rs index ca77c2f9b..2d176a3d2 100644 --- a/examples/stm32l4/src/bin/spi_dma.rs +++ b/examples/stm32l4/src/bin/spi_dma.rs @@ -18,8 +18,8 @@ use example_common::*; use embassy_stm32::spi::{Spi, Config}; use embassy_traits::spi::FullDuplex; use embassy_stm32::time::Hertz; -use embassy_stm32::gpio::{Output, Level, Speed}; -use embedded_hal::digital::v2::OutputPin; +use embassy_stm32::gpio::{Output, Level, Speed, Input, Pull}; +use embedded_hal::digital::v2::{OutputPin, InputPin}; #[embassy::task] async fn main_task() { @@ -36,16 +36,29 @@ async fn main_task() { Config::default(), ); - let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); - loop { - let write = [0x0A; 10]; - let mut read = [0; 10]; - unwrap!(cs.set_low()); - spi.read_write(&mut read, &write).await.ok(); - unwrap!(cs.set_high()); - info!("xfer {=[u8]:x}", read); + // These are the pins for the Inventek eS-Wifi SPI Wifi Adapter. + + let mut boot = Output::new(p.PB12, Level::Low, Speed::VeryHigh); + let mut wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh); + let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh); + let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); + let mut ready = Input::new(p.PE1, Pull::Up); + + cortex_m::asm::delay(100_000); + reset.set_high(); + cortex_m::asm::delay(100_000); + + while ready.is_low().unwrap() { + info!("waiting for ready"); } + + let write = [0x0A; 10]; + let mut read = [0; 10]; + unwrap!(cs.set_low()); + spi.read_write(&mut read, &write).await.ok(); + unwrap!(cs.set_high()); + info!("xfer {=[u8]:x}", read); } struct ZeroClock; From 6dbe0494689aa22eeb516e07d7ab48f7ec28bf62 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 10:55:13 -0400 Subject: [PATCH 16/28] Add back in the other versions of SPI. --- embassy-stm32/src/spi/mod.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 046ec0fe7..9bb5a729c 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,8 +1,8 @@ #![macro_use] -//#[cfg_attr(spi_v1, path = "v1.rs")] +#[cfg_attr(spi_v1, path = "v1.rs")] #[cfg_attr(spi_v2, path = "v2.rs")] -//#[cfg_attr(spi_v3, path = "v3.rs")] +#[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; pub use _version::*; From 638235e72de4f9f888a3ae10b9c9aaee4f41be98 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 11:05:50 -0400 Subject: [PATCH 17/28] Fix up the L0 example for SPI. --- examples/stm32l0/src/bin/spi.rs | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/examples/stm32l0/src/bin/spi.rs b/examples/stm32l0/src/bin/spi.rs index 9bb9b741e..5290906ef 100644 --- a/examples/stm32l0/src/bin/spi.rs +++ b/examples/stm32l0/src/bin/spi.rs @@ -18,10 +18,11 @@ use embassy_stm32::rcc; use embassy_stm32::spi::{Config, Spi}; use embassy_stm32::time::Hertz; use embedded_hal::blocking::spi::Transfer; +use embassy_stm32::dma::NoDma; #[entry] fn main() -> ! { - info!("Hello World, dude!"); + info!("Hello World, folks!"); let mut p = embassy_stm32::init(Default::default()); let mut rcc = rcc::Rcc::new(p.RCC); @@ -32,6 +33,8 @@ fn main() -> ! { p.PB3, p.PA7, p.PA6, + NoDma, + NoDma, Hertz(1_000_000), Config::default(), ); From e269971597f45ac4138b9097538fbdd7dc7be588 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 11:20:03 -0400 Subject: [PATCH 18/28] Fix extraneous `mut` warnings in L4 example. --- examples/stm32l4/src/bin/spi_dma.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/stm32l4/src/bin/spi_dma.rs b/examples/stm32l4/src/bin/spi_dma.rs index 2d176a3d2..8725f2ca8 100644 --- a/examples/stm32l4/src/bin/spi_dma.rs +++ b/examples/stm32l4/src/bin/spi_dma.rs @@ -39,11 +39,11 @@ async fn main_task() { // These are the pins for the Inventek eS-Wifi SPI Wifi Adapter. - let mut boot = Output::new(p.PB12, Level::Low, Speed::VeryHigh); - let mut wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh); + let boot = Output::new(p.PB12, Level::Low, Speed::VeryHigh); + let wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh); let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh); let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); - let mut ready = Input::new(p.PE1, Pull::Up); + let ready = Input::new(p.PE1, Pull::Up); cortex_m::asm::delay(100_000); reset.set_high(); From 053e3303757369fea2c98cc1f01c7918df18fed0 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 11:28:02 -0400 Subject: [PATCH 19/28] Fix warnings about un-used variables. --- examples/stm32l4/src/bin/spi_dma.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/stm32l4/src/bin/spi_dma.rs b/examples/stm32l4/src/bin/spi_dma.rs index 8725f2ca8..a5ad213e3 100644 --- a/examples/stm32l4/src/bin/spi_dma.rs +++ b/examples/stm32l4/src/bin/spi_dma.rs @@ -39,8 +39,8 @@ async fn main_task() { // These are the pins for the Inventek eS-Wifi SPI Wifi Adapter. - let boot = Output::new(p.PB12, Level::Low, Speed::VeryHigh); - let wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh); + let _boot = Output::new(p.PB12, Level::Low, Speed::VeryHigh); + let _wake = Output::new(p.PB13, Level::Low, Speed::VeryHigh); let mut reset = Output::new(p.PE8, Level::Low, Speed::VeryHigh); let mut cs = Output::new(p.PE0, Level::High, Speed::VeryHigh); let ready = Input::new(p.PE1, Pull::Up); From 34dfe28d3a80192ed69e8f49c41172d0738afda8 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 11:33:04 -0400 Subject: [PATCH 20/28] FFS warnings about unused Result<>. --- examples/stm32l4/src/bin/spi_dma.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32l4/src/bin/spi_dma.rs b/examples/stm32l4/src/bin/spi_dma.rs index a5ad213e3..ba03ff44e 100644 --- a/examples/stm32l4/src/bin/spi_dma.rs +++ b/examples/stm32l4/src/bin/spi_dma.rs @@ -46,7 +46,7 @@ async fn main_task() { let ready = Input::new(p.PE1, Pull::Up); cortex_m::asm::delay(100_000); - reset.set_high(); + reset.set_high().unwrap(); cortex_m::asm::delay(100_000); while ready.is_low().unwrap() { From a1dac21bdfdecfe24bcf7890c116fc122667dcc0 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 14:09:24 -0400 Subject: [PATCH 21/28] Make SPIv3 work with DMA. Add both DMA and non-DMA example to H7. --- embassy-stm32/src/dma/dma.rs | 6 +- embassy-stm32/src/spi/mod.rs | 4 +- embassy-stm32/src/spi/v3.rs | 98 ++++++++++++++++++++++-- examples/stm32h7/src/bin/spi.rs | 112 ++++++++++++++++++++++++++++ examples/stm32h7/src/bin/spi_dma.rs | 109 +++++++++++++++++++++++++++ 5 files changed, 318 insertions(+), 11 deletions(-) create mode 100644 examples/stm32h7/src/bin/spi.rs create mode 100644 examples/stm32h7/src/bin/spi_dma.rs diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs index 9ac6df159..72502043d 100644 --- a/embassy-stm32/src/dma/dma.rs +++ b/embassy-stm32/src/dma/dma.rs @@ -88,7 +88,11 @@ pub(crate) unsafe fn do_transfer( w.set_dir(dir); w.set_msize(vals::Size::BITS8); w.set_psize(vals::Size::BITS8); - w.set_minc(vals::Inc::INCREMENTED); + if incr_mem { + w.set_minc(vals::Inc::INCREMENTED); + } else { + w.set_minc(vals::Inc::FIXED); + } w.set_pinc(vals::Inc::FIXED); w.set_teie(true); w.set_tcie(true); diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 9bb5a729c..9c259715d 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -#[cfg_attr(spi_v1, path = "v1.rs")] -#[cfg_attr(spi_v2, path = "v2.rs")] +//#[cfg_attr(spi_v1, path = "v1.rs")] +//#[cfg_attr(spi_v2, path = "v2.rs")] #[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index fb2a46f3e..2d6f4a28f 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -18,7 +18,7 @@ use embassy_extras::unborrow; use embassy_traits::spi as traits; pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; -use futures::future::join; +use futures::future::join3; impl WordSize { fn dsize(&self) -> u8 { @@ -110,7 +110,6 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { w.set_crcen(false); w.set_mbr(spi::vals::Mbr(br)); w.set_dsize(WordSize::EightBit.dsize()); - //w.set_fthlv(WordSize::EightBit.frxth()); }); T::regs().cr2().modify(|w| { w.set_tsize(0); @@ -182,16 +181,40 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { where Tx: TxDmaChannel, { + Self::set_word_size(WordSize::EightBit); + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + } + let request = self.txdma.request(); let dst = T::regs().txdr().ptr() as *mut u8; let f = self.txdma.write(request, write, dst); + unsafe { T::regs().cfg1().modify(|reg| { reg.set_txdmaen(true); }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + T::regs().cr1().modify(|w| { + w.set_cstart(true); + }); } f.await; + unsafe { + T::regs().cfg1().modify(|reg| { + reg.set_rxdmaen(false); + reg.set_txdmaen(false); + }); + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + } + Ok(()) } @@ -201,6 +224,16 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { Tx: TxDmaChannel, Rx: RxDmaChannel, { + Self::set_word_size(WordSize::EightBit); + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + T::regs().cfg1().modify(|reg| { + reg.set_rxdmaen(true); + }); + } + let clock_byte_count = read.len(); let rx_request = self.rxdma.request(); @@ -217,11 +250,25 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { unsafe { T::regs().cfg1().modify(|reg| { reg.set_txdmaen(true); - reg.set_rxdmaen(true); + }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + T::regs().cr1().modify(|w| { + w.set_cstart(true); }); } - let r = join(tx_f, rx_f).await; + join3(tx_f, rx_f, Self::wait_for_idle()).await; + unsafe { + T::regs().cfg1().modify(|reg| { + reg.set_rxdmaen(false); + reg.set_txdmaen(false); + }); + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + } Ok(()) } @@ -231,11 +278,21 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { Tx: TxDmaChannel, Rx: RxDmaChannel, { - let clock_byte_count = read.len(); + Self::set_word_size(WordSize::EightBit); + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + T::regs().cfg1().modify(|reg| { + reg.set_rxdmaen(true); + }); + } let rx_request = self.rxdma.request(); let rx_src = T::regs().rxdr().ptr() as *mut u8; - let rx_f = self.rxdma.read(rx_request, rx_src, read); + let rx_f = self + .rxdma + .read(rx_request, rx_src, &mut read[0..write.len()]); let tx_request = self.txdma.request(); let tx_dst = T::regs().txdr().ptr() as *mut u8; @@ -244,13 +301,38 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { unsafe { T::regs().cfg1().modify(|reg| { reg.set_txdmaen(true); - reg.set_rxdmaen(true); + }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + T::regs().cr1().modify(|w| { + w.set_cstart(true); }); } - let r = join(tx_f, rx_f).await; + join3(tx_f, rx_f, Self::wait_for_idle()).await; + unsafe { + T::regs().cfg1().modify(|reg| { + reg.set_rxdmaen(false); + reg.set_txdmaen(false); + }); + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + } Ok(()) } + + async fn wait_for_idle() { + unsafe { + while !T::regs().sr().read().txc() { + // spin + } + while T::regs().sr().read().rxplvl().0 > 0 { + // spin + } + } + } } impl<'d, T: Instance, Tx, Rx> Drop for Spi<'d, T, Tx, Rx> { diff --git a/examples/stm32h7/src/bin/spi.rs b/examples/stm32h7/src/bin/spi.rs new file mode 100644 index 000000000..ac483a311 --- /dev/null +++ b/examples/stm32h7/src/bin/spi.rs @@ -0,0 +1,112 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; + +use core::fmt::Write; +use embassy::executor::Executor; +use embassy::time::Clock; +use embassy::util::Forever; +use embassy_stm32::dma::NoDma; +use example_common::*; +use embedded_hal::blocking::spi::Transfer; + +use hal::prelude::*; +use stm32h7xx_hal as hal; + +use cortex_m_rt::entry; +use stm32h7::stm32h743 as pac; +use heapless::String; +use embassy_stm32::spi::{Spi, Config}; +use embassy_stm32::time::Hertz; + +#[embassy::task] +async fn main_task() { + let p = embassy_stm32::init(Default::default()); + + let mut spi = Spi::new( + p.SPI3, + p.PB3, + p.PB5, + p.PB4, + NoDma, + NoDma, + Hertz(1_000_000), + Config::default(), + ); + + for n in 0u32.. { + let mut write: String<128> = String::new(); + core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); + unsafe { + let result = spi.transfer(write.as_bytes_mut()); + if let Err(_) = result { + defmt::panic!("crap"); + } + } + info!("read via spi: {}", write.as_bytes()); + } +} + +struct ZeroClock; + +impl Clock for ZeroClock { + fn now(&self) -> u64 { + 0 + } +} + +static EXECUTOR: Forever = Forever::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let pp = pac::Peripherals::take().unwrap(); + + let pwrcfg = pp.PWR.constrain().freeze(); + + let rcc = pp.RCC.constrain(); + + rcc.sys_ck(96.mhz()) + .pclk1(48.mhz()) + .pclk2(48.mhz()) + .pclk3(48.mhz()) + .pclk4(48.mhz()) + .pll1_q_ck(48.mhz()) + .freeze(pwrcfg, &pp.SYSCFG); + + let pp = unsafe { pac::Peripherals::steal() }; + + pp.DBGMCU.cr.modify(|_, w| { + w.dbgsleep_d1().set_bit(); + w.dbgstby_d1().set_bit(); + w.dbgstop_d1().set_bit(); + w.d1dbgcken().set_bit(); + w + }); + + pp.RCC.ahb4enr.modify(|_, w| { + w.gpioaen().set_bit(); + w.gpioben().set_bit(); + w.gpiocen().set_bit(); + w.gpioden().set_bit(); + w.gpioeen().set_bit(); + w.gpiofen().set_bit(); + w + }); + + unsafe { embassy::time::set_clock(&ZeroClock) }; + + let executor = EXECUTOR.put(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task())); + }) +} diff --git a/examples/stm32h7/src/bin/spi_dma.rs b/examples/stm32h7/src/bin/spi_dma.rs new file mode 100644 index 000000000..9dbfd0960 --- /dev/null +++ b/examples/stm32h7/src/bin/spi_dma.rs @@ -0,0 +1,109 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; +use core::fmt::Write; +use embassy::executor::Executor; +use embassy::time::Clock; +use embassy::util::Forever; +use example_common::*; +use embassy_traits::spi::FullDuplex; + +use hal::prelude::*; +use stm32h7xx_hal as hal; + +use cortex_m_rt::entry; +use stm32h7::stm32h743 as pac; +use heapless::String; +use embassy_stm32::spi::{Spi, Config}; +use embassy_stm32::time::Hertz; +use core::str::from_utf8; + +#[embassy::task] +async fn main_task() { + let p = embassy_stm32::init(Default::default()); + + let mut spi = Spi::new( + p.SPI3, + p.PB3, + p.PB5, + p.PB4, + p.DMA1_CH3, + p.DMA1_CH4, + Hertz(1_000_000), + Config::default(), + ); + + for n in 0u32.. { + let mut write: String<128> = String::new(); + let mut read = [0;128]; + core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); + // read_write will slice the &mut read down to &write's actual length. + spi.read_write(&mut read, write.as_bytes()).await.ok(); + info!("read via spi+dma: {}", from_utf8(&read).unwrap()); + } + +} + +struct ZeroClock; + +impl Clock for ZeroClock { + fn now(&self) -> u64 { + 0 + } +} + +static EXECUTOR: Forever = Forever::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let pp = pac::Peripherals::take().unwrap(); + + let pwrcfg = pp.PWR.constrain().freeze(); + + let rcc = pp.RCC.constrain(); + + rcc.sys_ck(96.mhz()) + .pclk1(48.mhz()) + .pclk2(48.mhz()) + .pclk3(48.mhz()) + .pclk4(48.mhz()) + .pll1_q_ck(48.mhz()) + .freeze(pwrcfg, &pp.SYSCFG); + + let pp = unsafe { pac::Peripherals::steal() }; + + pp.DBGMCU.cr.modify(|_, w| { + w.dbgsleep_d1().set_bit(); + w.dbgstby_d1().set_bit(); + w.dbgstop_d1().set_bit(); + w.d1dbgcken().set_bit(); + w + }); + + pp.RCC.ahb4enr.modify(|_, w| { + w.gpioaen().set_bit(); + w.gpioben().set_bit(); + w.gpiocen().set_bit(); + w.gpioden().set_bit(); + w.gpioeen().set_bit(); + w.gpiofen().set_bit(); + w + }); + + unsafe { embassy::time::set_clock(&ZeroClock) }; + + let executor = EXECUTOR.put(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task())); + }) +} From 8ab82191b76290a69ae068ed99da0e81d07cba12 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 14:12:50 -0400 Subject: [PATCH 22/28] Every dang time. --- embassy-stm32/src/spi/mod.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 9c259715d..9bb5a729c 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,7 +1,7 @@ #![macro_use] -//#[cfg_attr(spi_v1, path = "v1.rs")] -//#[cfg_attr(spi_v2, path = "v2.rs")] +#[cfg_attr(spi_v1, path = "v1.rs")] +#[cfg_attr(spi_v2, path = "v2.rs")] #[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; From b07325b47600283113ffb8aa99c50080ca092abb Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 16:45:43 -0400 Subject: [PATCH 23/28] Enable DMA for SPIv1 on F4's etc. --- embassy-stm32/src/dma/dma.rs | 5 +- embassy-stm32/src/spi/mod.rs | 4 +- embassy-stm32/src/spi/v1.rs | 211 ++++++++++++++++++++++++++-- examples/stm32f4/.cargo/config.toml | 3 +- examples/stm32f4/memory.x | 4 +- examples/stm32f4/src/bin/spi.rs | 3 + examples/stm32f4/src/bin/spi_dma.rs | 85 +++++++++++ 7 files changed, 299 insertions(+), 16 deletions(-) create mode 100644 examples/stm32f4/src/bin/spi_dma.rs diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs index 72502043d..c5695baca 100644 --- a/embassy-stm32/src/dma/dma.rs +++ b/embassy-stm32/src/dma/dma.rs @@ -98,16 +98,17 @@ pub(crate) unsafe fn do_transfer( w.set_tcie(true); #[cfg(dma_v1)] w.set_trbuff(true); - w.set_en(true); #[cfg(dma_v2)] w.set_chsel(request); + + w.set_en(true); }); } async move { let res = poll_fn(|cx| { - let n = channel_number as usize; + let n = state_number as usize; STATE.ch_wakers[n].register(cx.waker()); match STATE.ch_status[n].load(Ordering::Acquire) { CH_STATUS_NONE => Poll::Pending, diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 9bb5a729c..237a07209 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,8 +1,8 @@ #![macro_use] #[cfg_attr(spi_v1, path = "v1.rs")] -#[cfg_attr(spi_v2, path = "v2.rs")] -#[cfg_attr(spi_v3, path = "v3.rs")] +//#[cfg_attr(spi_v2, path = "v2.rs")] +//#[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; pub use _version::*; diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs index 01cbf86b6..72bde898d 100644 --- a/embassy-stm32/src/spi/v1.rs +++ b/embassy-stm32/src/spi/v1.rs @@ -1,14 +1,21 @@ #![macro_use] +use crate::dma::NoDma; use crate::gpio::{sealed::Pin, AnyPin}; use crate::pac::spi; -use crate::spi::{ByteOrder, Config, Error, Instance, MisoPin, MosiPin, SckPin, WordSize}; +use crate::spi::{ + ByteOrder, Config, Error, Instance, MisoPin, MosiPin, RxDmaChannel, SckPin, TxDmaChannel, + WordSize, +}; use crate::time::Hertz; +use core::future::Future; use core::marker::PhantomData; use core::ptr; use embassy::util::Unborrow; use embassy_extras::unborrow; +use embassy_traits::spi as traits; pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3}; +use futures::future::join3; impl WordSize { fn dff(&self) -> spi::vals::Dff { @@ -19,27 +26,31 @@ impl WordSize { } } -pub struct Spi<'d, T: Instance> { +pub struct Spi<'d, T: Instance, Tx, Rx> { sck: AnyPin, mosi: AnyPin, miso: AnyPin, + txdma: Tx, + rxdma: Rx, current_word_size: WordSize, phantom: PhantomData<&'d mut T>, } -impl<'d, T: Instance> Spi<'d, T> { +impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { pub fn new( _peri: impl Unborrow + 'd, sck: impl Unborrow>, mosi: impl Unborrow>, miso: impl Unborrow>, + txdma: impl Unborrow, + rxdma: impl Unborrow, freq: F, config: Config, ) -> Self where F: Into, { - unborrow!(sck, mosi, miso); + unborrow!(sck, mosi, miso, txdma, rxdma); unsafe { sck.set_as_af(sck.af_num()); @@ -94,6 +105,8 @@ impl<'d, T: Instance> Spi<'d, T> { sck, mosi, miso, + txdma, + rxdma, current_word_size: WordSize::EightBit, phantom: PhantomData, } @@ -128,9 +141,150 @@ impl<'d, T: Instance> Spi<'d, T> { self.current_word_size = word_size; } } + + #[allow(unused)] + async fn write_dma_u8(&mut self, write: &[u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + { + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + T::regs().cr2().modify(|reg| { + reg.set_rxdmaen(true); + }); + } + self.set_word_size(WordSize::EightBit); + + let request = self.txdma.request(); + let dst = T::regs().dr().ptr() as *mut u8; + let f = self.txdma.write(request, write, dst); + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(true); + }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + } + + f.await; + Ok(()) + } + + #[allow(unused)] + async fn read_dma_u8(&mut self, read: &mut [u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + Rx: RxDmaChannel, + { + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + T::regs().cr2().modify(|reg| { + reg.set_rxdmaen(true); + }); + } + self.set_word_size(WordSize::EightBit); + + let clock_byte_count = read.len(); + + let rx_request = self.rxdma.request(); + let rx_src = T::regs().dr().ptr() as *mut u8; + let rx_f = self.rxdma.read(rx_request, rx_src, read); + + let tx_request = self.txdma.request(); + let tx_dst = T::regs().dr().ptr() as *mut u8; + let clock_byte = 0x00; + let tx_f = self + .txdma + .write_x(tx_request, &clock_byte, clock_byte_count, tx_dst); + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(true); + }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + } + + join3(tx_f, rx_f, Self::wait_for_idle()).await; + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(false); + reg.set_rxdmaen(false); + }); + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + } + + Ok(()) + } + + #[allow(unused)] + async fn read_write_dma_u8(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Error> + where + Tx: TxDmaChannel, + Rx: RxDmaChannel, + { + unsafe { + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + T::regs().cr2().modify(|reg| { + reg.set_rxdmaen(true); + }); + } + self.set_word_size(WordSize::EightBit); + + let rx_request = self.rxdma.request(); + let rx_src = T::regs().dr().ptr() as *mut u8; + let rx_f = self.rxdma.read(rx_request, rx_src, read); + + let tx_request = self.txdma.request(); + let tx_dst = T::regs().dr().ptr() as *mut u8; + let tx_f = self.txdma.write(tx_request, write, tx_dst); + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(true); + }); + T::regs().cr1().modify(|w| { + w.set_spe(true); + }); + } + + join3(tx_f, rx_f, Self::wait_for_idle()).await; + + unsafe { + T::regs().cr2().modify(|reg| { + reg.set_txdmaen(false); + reg.set_rxdmaen(false); + }); + T::regs().cr1().modify(|w| { + w.set_spe(false); + }); + } + + Ok(()) + } + + async fn wait_for_idle() { + unsafe { + while T::regs().sr().read().bsy() { + // spin + } + } + } } -impl<'d, T: Instance> Drop for Spi<'d, T> { +impl<'d, T: Instance, Tx, Rx> Drop for Spi<'d, T, Tx, Rx> { fn drop(&mut self) { unsafe { self.sck.set_as_analog(); @@ -140,7 +294,7 @@ impl<'d, T: Instance> Drop for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T, NoDma, NoDma> { type Error = Error; fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { @@ -176,7 +330,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T, NoDma, NoDma> { type Error = Error; fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { @@ -217,7 +371,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T, NoDma, NoDma> { type Error = Error; fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> { @@ -253,7 +407,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { } } -impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { +impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T, NoDma, NoDma> { type Error = Error; fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> { @@ -291,3 +445,42 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> Ok(words) } } + +impl<'d, T: Instance, Tx, Rx> traits::Spi for Spi<'d, T, Tx, Rx> { + type Error = super::Error; +} + +impl<'d, T: Instance, Tx: TxDmaChannel, Rx> traits::Write for Spi<'d, T, Tx, Rx> { + #[rustfmt::skip] + type WriteFuture<'a> where Self: 'a = impl Future> + 'a; + + fn write<'a>(&'a mut self, data: &'a [u8]) -> Self::WriteFuture<'a> { + self.write_dma_u8(data) + } +} + +impl<'d, T: Instance, Tx: TxDmaChannel, Rx: RxDmaChannel> traits::Read + for Spi<'d, T, Tx, Rx> +{ + #[rustfmt::skip] + type ReadFuture<'a> where Self: 'a = impl Future> + 'a; + + fn read<'a>(&'a mut self, data: &'a mut [u8]) -> Self::ReadFuture<'a> { + self.read_dma_u8(data) + } +} + +impl<'d, T: Instance, Tx: TxDmaChannel, Rx: RxDmaChannel> traits::FullDuplex + for Spi<'d, T, Tx, Rx> +{ + #[rustfmt::skip] + type WriteReadFuture<'a> where Self: 'a = impl Future> + 'a; + + fn read_write<'a>( + &'a mut self, + read: &'a mut [u8], + write: &'a [u8], + ) -> Self::WriteReadFuture<'a> { + self.read_write_dma_u8(read, write) + } +} diff --git a/examples/stm32f4/.cargo/config.toml b/examples/stm32f4/.cargo/config.toml index 8704a9ba5..f7173a194 100644 --- a/examples/stm32f4/.cargo/config.toml +++ b/examples/stm32f4/.cargo/config.toml @@ -3,7 +3,8 @@ build-std = ["core"] [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-run --list-chips` -runner = "probe-run --chip STM32F429ZITx" +#runner = "probe-run --chip STM32F429ZITx" +runner = "probe-run --chip STM32F401RE" rustflags = [ # LLD (shipped with the Rust toolchain) is used as the default linker diff --git a/examples/stm32f4/memory.x b/examples/stm32f4/memory.x index f21e32572..bcd2bbcd4 100644 --- a/examples/stm32f4/memory.x +++ b/examples/stm32f4/memory.x @@ -2,6 +2,6 @@ MEMORY { /* NOTE 1 K = 1 KiBi = 1024 bytes */ /* These values correspond to the STM32F429ZI */ - FLASH : ORIGIN = 0x08000000, LENGTH = 2048K - RAM : ORIGIN = 0x20000000, LENGTH = 192K + FLASH : ORIGIN = 0x08000000, LENGTH = 512K + RAM : ORIGIN = 0x20000000, LENGTH = 96K } diff --git a/examples/stm32f4/src/bin/spi.rs b/examples/stm32f4/src/bin/spi.rs index 88fc84bc0..604283877 100644 --- a/examples/stm32f4/src/bin/spi.rs +++ b/examples/stm32f4/src/bin/spi.rs @@ -18,6 +18,7 @@ use embassy_stm32::dbgmcu::Dbgmcu; use embassy_stm32::spi::{Config, Spi}; use embassy_stm32::time::Hertz; use embedded_hal::blocking::spi::Transfer; +use embassy_stm32::dma::NoDma; #[entry] fn main() -> ! { @@ -34,6 +35,8 @@ fn main() -> ! { p.PC10, p.PC12, p.PC11, + NoDma, + NoDma, Hertz(1_000_000), Config::default(), ); diff --git a/examples/stm32f4/src/bin/spi_dma.rs b/examples/stm32f4/src/bin/spi_dma.rs new file mode 100644 index 000000000..db6b69c85 --- /dev/null +++ b/examples/stm32f4/src/bin/spi_dma.rs @@ -0,0 +1,85 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] +#![allow(incomplete_features)] + +#[path = "../example_common.rs"] +mod example_common; +use core::fmt::Write; +use cortex_m_rt::entry; +use embassy::executor::Executor; +use embassy::time::Clock; +use embassy::util::Forever; +use example_common::*; +use embassy_traits::spi::FullDuplex; +use heapless::String; +use embassy_stm32::spi::{Spi, Config}; +use embassy_stm32::pac; +use embassy_stm32::time::Hertz; +use core::str::from_utf8; + +#[embassy::task] +async fn main_task() { + let p = embassy_stm32::init(Default::default()); + + let mut spi = Spi::new( + p.SPI1, + p.PB3, + p.PA7, + p.PA6, + p.DMA2_CH3, + p.DMA2_CH2, + Hertz(1_000_000), + Config::default(), + ); + + for n in 0u32.. { + let mut write: String<128> = String::new(); + let mut read = [0;128]; + core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap(); + spi.read_write(&mut read[0..write.len()], write.as_bytes()).await.ok(); + info!("read via spi+dma: {}", from_utf8(&read).unwrap()); + } +} + +struct ZeroClock; + +impl Clock for ZeroClock { + fn now(&self) -> u64 { + 0 + } +} + +static EXECUTOR: Forever = Forever::new(); + +#[entry] +fn main() -> ! { + info!("Hello World!"); + unsafe { + pac::DBGMCU.cr().modify(|w| { + w.set_dbg_sleep(true); + w.set_dbg_standby(true); + w.set_dbg_stop(true); + }); + + pac::RCC.ahb1enr().modify(|w| { + w.set_gpioaen(true); + w.set_gpioben(true); + w.set_gpiocen(true); + w.set_gpioden(true); + w.set_gpioeen(true); + w.set_gpiofen(true); + }); + } + + unsafe { embassy::time::set_clock(&ZeroClock) }; + + let executor = EXECUTOR.put(Executor::new()); + + executor.run(|spawner| { + unwrap!(spawner.spawn(main_task())); + }) +} From a63847944f96c2b083bedf6958824a1435161bcf Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 16:48:42 -0400 Subject: [PATCH 24/28] Reset the examples to the original F4 flavor. --- examples/stm32f4/.cargo/config.toml | 3 +-- examples/stm32f4/src/bin/spi_dma.rs | 4 ++-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/examples/stm32f4/.cargo/config.toml b/examples/stm32f4/.cargo/config.toml index f7173a194..8704a9ba5 100644 --- a/examples/stm32f4/.cargo/config.toml +++ b/examples/stm32f4/.cargo/config.toml @@ -3,8 +3,7 @@ build-std = ["core"] [target.'cfg(all(target_arch = "arm", target_os = "none"))'] # replace STM32F429ZITx with your chip as listed in `probe-run --list-chips` -#runner = "probe-run --chip STM32F429ZITx" -runner = "probe-run --chip STM32F401RE" +runner = "probe-run --chip STM32F429ZITx" rustflags = [ # LLD (shipped with the Rust toolchain) is used as the default linker diff --git a/examples/stm32f4/src/bin/spi_dma.rs b/examples/stm32f4/src/bin/spi_dma.rs index db6b69c85..10a419fda 100644 --- a/examples/stm32f4/src/bin/spi_dma.rs +++ b/examples/stm32f4/src/bin/spi_dma.rs @@ -28,8 +28,8 @@ async fn main_task() { let mut spi = Spi::new( p.SPI1, p.PB3, - p.PA7, - p.PA6, + p.PB5, + p.PB4, p.DMA2_CH3, p.DMA2_CH2, Hertz(1_000_000), From f1a3e0e05d5943437be006943326e1c350482239 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 16:50:38 -0400 Subject: [PATCH 25/28] As before, EVERY DANG TIME. It'll be sweet with intellij-rust-plugin works better. --- embassy-stm32/src/spi/mod.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs index 237a07209..9bb5a729c 100644 --- a/embassy-stm32/src/spi/mod.rs +++ b/embassy-stm32/src/spi/mod.rs @@ -1,8 +1,8 @@ #![macro_use] #[cfg_attr(spi_v1, path = "v1.rs")] -//#[cfg_attr(spi_v2, path = "v2.rs")] -//#[cfg_attr(spi_v3, path = "v3.rs")] +#[cfg_attr(spi_v2, path = "v2.rs")] +#[cfg_attr(spi_v3, path = "v3.rs")] mod _version; use crate::{dma, peripherals, rcc::RccPeripheral}; pub use _version::*; From 67283c0cbd595929cc82ce1de7bf6434077227a4 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Wed, 21 Jul 2021 16:53:19 -0400 Subject: [PATCH 26/28] Reset back the memory.x also. --- examples/stm32f4/memory.x | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/stm32f4/memory.x b/examples/stm32f4/memory.x index bcd2bbcd4..f21e32572 100644 --- a/examples/stm32f4/memory.x +++ b/examples/stm32f4/memory.x @@ -2,6 +2,6 @@ MEMORY { /* NOTE 1 K = 1 KiBi = 1024 bytes */ /* These values correspond to the STM32F429ZI */ - FLASH : ORIGIN = 0x08000000, LENGTH = 512K - RAM : ORIGIN = 0x20000000, LENGTH = 96K + FLASH : ORIGIN = 0x08000000, LENGTH = 2048K + RAM : ORIGIN = 0x20000000, LENGTH = 192K } From 473a83a937ed03c844da8dd72bc6a1dc089367e1 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Thu, 22 Jul 2021 09:28:42 -0400 Subject: [PATCH 27/28] Adjust how we deal with read/write being different length. Including some docs about it. Removing the Rx-enablement for write-only operations. --- embassy-stm32/src/spi/v1.rs | 7 +++---- embassy-stm32/src/spi/v2.rs | 7 +++---- embassy-stm32/src/spi/v3.rs | 3 ++- embassy-traits/src/spi.rs | 3 +++ 4 files changed, 11 insertions(+), 9 deletions(-) diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs index 72bde898d..b4ebe5a6d 100644 --- a/embassy-stm32/src/spi/v1.rs +++ b/embassy-stm32/src/spi/v1.rs @@ -151,9 +151,6 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { T::regs().cr1().modify(|w| { w.set_spe(false); }); - T::regs().cr2().modify(|reg| { - reg.set_rxdmaen(true); - }); } self.set_word_size(WordSize::EightBit); @@ -233,6 +230,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { Tx: TxDmaChannel, Rx: RxDmaChannel, { + assert!(read.len() >= write.len()); + unsafe { T::regs().cr1().modify(|w| { w.set_spe(false); @@ -245,7 +244,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { let rx_request = self.rxdma.request(); let rx_src = T::regs().dr().ptr() as *mut u8; - let rx_f = self.rxdma.read(rx_request, rx_src, read); + let rx_f = self.rxdma.read(rx_request, rx_src, read[0..write.len()]); let tx_request = self.txdma.request(); let tx_dst = T::regs().dr().ptr() as *mut u8; diff --git a/embassy-stm32/src/spi/v2.rs b/embassy-stm32/src/spi/v2.rs index 400fd89af..9ca3e3c1c 100644 --- a/embassy-stm32/src/spi/v2.rs +++ b/embassy-stm32/src/spi/v2.rs @@ -163,9 +163,6 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { T::regs().cr1().modify(|w| { w.set_spe(false); }); - T::regs().cr2().modify(|reg| { - reg.set_rxdmaen(true); - }); } Self::set_word_size(WordSize::EightBit); @@ -245,6 +242,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { Tx: TxDmaChannel, Rx: RxDmaChannel, { + assert!(read.len() >= write.len()); + unsafe { T::regs().cr1().modify(|w| { w.set_spe(false); @@ -257,7 +256,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { let rx_request = self.rxdma.request(); let rx_src = T::regs().dr().ptr() as *mut u8; - let rx_f = self.rxdma.read(rx_request, rx_src, read); + let rx_f = self.rxdma.read(rx_request, rx_src, read[0..write.len()]); let tx_request = self.txdma.request(); let tx_dst = T::regs().dr().ptr() as *mut u8; diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs index 2d6f4a28f..f433d7f9c 100644 --- a/embassy-stm32/src/spi/v3.rs +++ b/embassy-stm32/src/spi/v3.rs @@ -207,7 +207,6 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { f.await; unsafe { T::regs().cfg1().modify(|reg| { - reg.set_rxdmaen(false); reg.set_txdmaen(false); }); T::regs().cr1().modify(|w| { @@ -278,6 +277,8 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { Tx: TxDmaChannel, Rx: RxDmaChannel, { + assert!(read.len() >= write.len()); + Self::set_word_size(WordSize::EightBit); unsafe { T::regs().cr1().modify(|w| { diff --git a/embassy-traits/src/spi.rs b/embassy-traits/src/spi.rs index 9d044dfd3..04322dddc 100644 --- a/embassy-traits/src/spi.rs +++ b/embassy-traits/src/spi.rs @@ -29,6 +29,9 @@ pub trait FullDuplex: Spi + Write + Read { where Self: 'a; + /// The `read` array must be at least as long as the `write` array, + /// but is guaranteed to only be filled with bytes equal to the + /// length of the `write` array. fn read_write<'a>( &'a mut self, read: &'a mut [Word], From 83f63890e59715596093c907c50998d2f1033adb Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Thu, 22 Jul 2021 09:50:34 -0400 Subject: [PATCH 28/28] Actually take a &mut of that read slice. --- embassy-stm32/src/spi/v1.rs | 4 +++- embassy-stm32/src/spi/v2.rs | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs index b4ebe5a6d..43489bb6f 100644 --- a/embassy-stm32/src/spi/v1.rs +++ b/embassy-stm32/src/spi/v1.rs @@ -244,7 +244,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { let rx_request = self.rxdma.request(); let rx_src = T::regs().dr().ptr() as *mut u8; - let rx_f = self.rxdma.read(rx_request, rx_src, read[0..write.len()]); + let rx_f = self + .rxdma + .read(rx_request, rx_src, &mut read[0..write.len()]); let tx_request = self.txdma.request(); let tx_dst = T::regs().dr().ptr() as *mut u8; diff --git a/embassy-stm32/src/spi/v2.rs b/embassy-stm32/src/spi/v2.rs index 9ca3e3c1c..2144dfcc8 100644 --- a/embassy-stm32/src/spi/v2.rs +++ b/embassy-stm32/src/spi/v2.rs @@ -256,7 +256,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> { let rx_request = self.rxdma.request(); let rx_src = T::regs().dr().ptr() as *mut u8; - let rx_f = self.rxdma.read(rx_request, rx_src, read[0..write.len()]); + let rx_f = self + .rxdma + .read(rx_request, rx_src, &mut read[0..write.len()]); let tx_request = self.txdma.request(); let tx_dst = T::regs().dr().ptr() as *mut u8;