diff --git a/embassy-stm32/src/spi/mod.rs b/embassy-stm32/src/spi/mod.rs
index f47347265..a2a475e2b 100644
--- a/embassy-stm32/src/spi/mod.rs
+++ b/embassy-stm32/src/spi/mod.rs
@@ -431,6 +431,26 @@ fn spin_until_rx_ready(regs: Regs) -> Result<(), Error> {
     }
 }
 
+fn spin_until_idle(regs: Regs) {
+    #[cfg(any(spi_v1, spi_f1))]
+    unsafe {
+        while regs.sr().read().bsy() {}
+    }
+
+    #[cfg(spi_v2)]
+    unsafe {
+        while regs.sr().read().ftlvl() > 0 {}
+        while regs.sr().read().frlvl() > 0 {}
+        while regs.sr().read().bsy() {}
+    }
+
+    #[cfg(spi_v3)]
+    unsafe {
+        while !regs.sr().read().txc() {}
+        while regs.sr().read().rxplvl().0 > 0 {}
+    }
+}
+
 trait Word {
     const WORDSIZE: WordSize;
 }
diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs
index 98f05770b..943592617 100644
--- a/embassy-stm32/src/spi/v1.rs
+++ b/embassy-stm32/src/spi/v1.rs
@@ -2,7 +2,7 @@
 
 pub use embedded_hal::blocking;
 pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
-use futures::future::join3;
+use futures::future::join;
 
 use super::*;
 
@@ -76,7 +76,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             });
         }
 
-        join3(tx_f, rx_f, Self::wait_for_idle()).await;
+        join(tx_f, rx_f).await;
+
+        spin_until_idle(T::regs());
 
         unsafe {
             T::regs().cr2().modify(|reg| {
@@ -134,7 +136,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             });
         }
 
-        join3(tx_f, rx_f, Self::wait_for_idle()).await;
+        join(tx_f, rx_f).await;
+
+        spin_until_idle(T::regs());
 
         unsafe {
             T::regs().cr2().modify(|reg| {
@@ -148,12 +152,4 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
 
         Ok(())
     }
-
-    async fn wait_for_idle() {
-        unsafe {
-            while T::regs().sr().read().bsy() {
-                // spin
-            }
-        }
-    }
 }
diff --git a/embassy-stm32/src/spi/v2.rs b/embassy-stm32/src/spi/v2.rs
index 286976329..d9f5b46fe 100644
--- a/embassy-stm32/src/spi/v2.rs
+++ b/embassy-stm32/src/spi/v2.rs
@@ -1,7 +1,7 @@
 #![macro_use]
 
 pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
-use futures::future::{join, join3};
+use futures::future::join;
 
 use super::*;
 
@@ -35,7 +35,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             });
         }
 
-        join(f, Self::wait_for_idle()).await;
+        f.await;
+
+        spin_until_idle(T::regs());
 
         unsafe {
             T::regs().cr2().modify(|reg| {
@@ -89,7 +91,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             });
         }
 
-        join3(tx_f, rx_f, Self::wait_for_idle()).await;
+        join(tx_f, rx_f).await;
+
+        spin_until_idle(T::regs());
 
         unsafe {
             T::regs().cr2().modify(|reg| {
@@ -152,7 +156,9 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             });
         }
 
-        join3(tx_f, rx_f, Self::wait_for_idle()).await;
+        join(tx_f, rx_f).await;
+
+        spin_until_idle(T::regs());
 
         unsafe {
             T::regs().cr2().modify(|reg| {
@@ -166,18 +172,4 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
 
         Ok(())
     }
-
-    async fn wait_for_idle() {
-        unsafe {
-            while T::regs().sr().read().ftlvl() > 0 {
-                // spin
-            }
-            while T::regs().sr().read().frlvl() > 0 {
-                // spin
-            }
-            while T::regs().sr().read().bsy() {
-                // spin
-            }
-        }
-    }
 }
diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs
index c31415a2f..a3e39b213 100644
--- a/embassy-stm32/src/spi/v3.rs
+++ b/embassy-stm32/src/spi/v3.rs
@@ -1,7 +1,7 @@
 #![macro_use]
 
 pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
-use futures::future::join3;
+use futures::future::join;
 
 use super::*;
 
@@ -95,7 +95,10 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             });
         }
 
-        join3(tx_f, rx_f, Self::wait_for_idle()).await;
+        join(tx_f, rx_f).await;
+
+        spin_until_idle(T::regs());
+
         unsafe {
             T::regs().cfg1().modify(|reg| {
                 reg.set_rxdmaen(false);
@@ -159,7 +162,10 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
             });
         }
 
-        join3(tx_f, rx_f, Self::wait_for_idle()).await;
+        join(tx_f, rx_f).await;
+
+        spin_until_idle(T::regs());
+
         unsafe {
             T::regs().cfg1().modify(|reg| {
                 reg.set_rxdmaen(false);
@@ -171,15 +177,4 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
         }
         Ok(())
     }
-
-    async fn wait_for_idle() {
-        unsafe {
-            while !T::regs().sr().read().txc() {
-                // spin
-            }
-            while T::regs().sr().read().rxplvl().0 > 0 {
-                // spin
-            }
-        }
-    }
 }