Add tx_ptr and rx_ptr methods
This commit is contained in:
parent
a35f337bd6
commit
a35b7d90bc
4 changed files with 49 additions and 34 deletions
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@ -290,6 +290,29 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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}
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}
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}
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}
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trait RegsExt {
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fn tx_ptr<W>(&self) -> *mut W;
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fn rx_ptr<W>(&self) -> *mut W;
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}
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impl RegsExt for crate::pac::spi::Spi {
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fn tx_ptr<W>(&self) -> *mut W {
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#[cfg(not(spi_v3))]
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let dr = self.dr();
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#[cfg(spi_v3)]
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let dr = self.txdr();
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dr.ptr() as *mut W
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}
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fn rx_ptr<W>(&self) -> *mut W {
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#[cfg(not(spi_v3))]
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let dr = self.dr();
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#[cfg(spi_v3)]
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let dr = self.rxdr();
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dr.ptr() as *mut W
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}
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}
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pub(crate) mod sealed {
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pub(crate) mod sealed {
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use super::*;
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use super::*;
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@ -2,7 +2,7 @@
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use crate::dma::NoDma;
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use crate::dma::NoDma;
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use crate::gpio::sealed::Pin;
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use crate::gpio::sealed::Pin;
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use crate::spi::{Error, Instance, RxDmaChannel, TxDmaChannel, WordSize};
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use crate::spi::{Error, Instance, RegsExt, RxDmaChannel, TxDmaChannel, WordSize};
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use core::future::Future;
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use core::future::Future;
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use core::ptr;
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use core::ptr;
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use embassy_traits::spi as traits;
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use embassy_traits::spi as traits;
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@ -42,7 +42,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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self.set_word_size(WordSize::EightBit);
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self.set_word_size(WordSize::EightBit);
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let request = self.txdma.request();
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let request = self.txdma.request();
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let dst = T::regs().dr().ptr() as *mut u8;
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let dst = T::regs().tx_ptr();
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let f = self.txdma.write(request, write, dst);
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let f = self.txdma.write(request, write, dst);
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unsafe {
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unsafe {
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@ -77,11 +77,11 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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let clock_byte_count = read.len();
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let clock_byte_count = read.len();
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let rx_request = self.rxdma.request();
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let rx_request = self.rxdma.request();
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let rx_src = T::regs().dr().ptr() as *mut u8;
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let rx_src = T::regs().rx_ptr();
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let rx_f = self.rxdma.read(rx_request, rx_src, read);
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let rx_f = self.rxdma.read(rx_request, rx_src, read);
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let tx_request = self.txdma.request();
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let tx_request = self.txdma.request();
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let tx_dst = T::regs().dr().ptr() as *mut u8;
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let tx_dst = T::regs().tx_ptr();
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let clock_byte = 0x00;
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let clock_byte = 0x00;
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let tx_f = self
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let tx_f = self
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.txdma
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.txdma
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@ -130,13 +130,13 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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self.set_word_size(WordSize::EightBit);
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self.set_word_size(WordSize::EightBit);
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let rx_request = self.rxdma.request();
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let rx_request = self.rxdma.request();
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let rx_src = T::regs().dr().ptr() as *mut u8;
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let rx_src = T::regs().rx_ptr();
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let rx_f = self
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let rx_f = self
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.rxdma
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.rxdma
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.read(rx_request, rx_src, &mut read[0..write.len()]);
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.read(rx_request, rx_src, &mut read[0..write.len()]);
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let tx_request = self.txdma.request();
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let tx_request = self.txdma.request();
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let tx_dst = T::regs().dr().ptr() as *mut u8;
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let tx_dst = T::regs().tx_ptr();
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let tx_f = self.txdma.write(tx_request, write, tx_dst);
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let tx_f = self.txdma.write(tx_request, write, tx_dst);
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unsafe {
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unsafe {
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@ -308,8 +308,7 @@ fn write_word<W: Word>(regs: &'static crate::pac::spi::Spi, word: W) -> Result<(
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}
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}
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if sr.txe() {
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if sr.txe() {
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unsafe {
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unsafe {
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let dr = regs.dr().ptr() as *mut W;
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ptr::write_volatile(regs.tx_ptr(), word);
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ptr::write_volatile(dr, word);
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}
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}
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return Ok(());
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return Ok(());
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}
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}
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@ -335,8 +334,7 @@ fn read_word<W: Word>(regs: &'static crate::pac::spi::Spi) -> Result<W, Error> {
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}
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}
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if sr.rxne() {
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if sr.rxne() {
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unsafe {
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unsafe {
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let dr = regs.dr().ptr() as *const W;
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return Ok(ptr::read_volatile(regs.rx_ptr()));
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return Ok(ptr::read_volatile(dr));
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}
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}
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}
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}
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}
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}
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@ -2,7 +2,7 @@
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use crate::dma::NoDma;
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use crate::dma::NoDma;
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use crate::gpio::sealed::Pin;
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use crate::gpio::sealed::Pin;
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use crate::spi::{Error, Instance, RxDmaChannel, TxDmaChannel, WordSize};
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use crate::spi::{Error, Instance, RegsExt, RxDmaChannel, TxDmaChannel, WordSize};
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use core::future::Future;
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use core::future::Future;
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use core::ptr;
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use core::ptr;
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use embassy_traits::spi as traits;
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use embassy_traits::spi as traits;
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@ -44,7 +44,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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self.set_word_size(WordSize::EightBit);
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self.set_word_size(WordSize::EightBit);
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let request = self.txdma.request();
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let request = self.txdma.request();
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let dst = T::regs().dr().ptr() as *mut u8;
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let dst = T::regs().tx_ptr();
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let f = self.txdma.write(request, write, dst);
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let f = self.txdma.write(request, write, dst);
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unsafe {
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unsafe {
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@ -88,11 +88,11 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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let clock_byte_count = read.len();
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let clock_byte_count = read.len();
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let rx_request = self.rxdma.request();
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let rx_request = self.rxdma.request();
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let rx_src = T::regs().dr().ptr() as *mut u8;
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let rx_src = T::regs().rx_ptr();
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let rx_f = self.rxdma.read(rx_request, rx_src, read);
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let rx_f = self.rxdma.read(rx_request, rx_src, read);
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let tx_request = self.txdma.request();
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let tx_request = self.txdma.request();
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let tx_dst = T::regs().dr().ptr() as *mut u8;
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let tx_dst = T::regs().tx_ptr();
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let clock_byte = 0x00;
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let clock_byte = 0x00;
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let tx_f = self
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let tx_f = self
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.txdma
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.txdma
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@ -146,13 +146,13 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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self.set_word_size(WordSize::EightBit);
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self.set_word_size(WordSize::EightBit);
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let rx_request = self.rxdma.request();
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let rx_request = self.rxdma.request();
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let rx_src = T::regs().dr().ptr() as *mut u8;
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let rx_src = T::regs().rx_ptr();
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let rx_f = self
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let rx_f = self
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.rxdma
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.rxdma
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.read(rx_request, rx_src, &mut read[0..write.len()]);
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.read(rx_request, rx_src, &mut read[0..write.len()]);
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let tx_request = self.txdma.request();
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let tx_request = self.txdma.request();
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let tx_dst = T::regs().dr().ptr() as *mut u8;
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let tx_dst = T::regs().tx_ptr();
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let tx_f = self.txdma.write(tx_request, write, tx_dst);
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let tx_f = self.txdma.write(tx_request, write, tx_dst);
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unsafe {
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unsafe {
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@ -223,8 +223,7 @@ fn write_word<W: Word>(regs: &'static crate::pac::spi::Spi, word: W) -> Result<(
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return Err(Error::Crc);
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return Err(Error::Crc);
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} else if sr.txe() {
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} else if sr.txe() {
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unsafe {
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unsafe {
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let dr = regs.dr().ptr() as *mut W;
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ptr::write_volatile(regs.tx_ptr(), word);
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ptr::write_volatile(dr, word);
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}
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}
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return Ok(());
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return Ok(());
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}
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}
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@ -245,8 +244,7 @@ fn read_word<W: Word>(regs: &'static crate::pac::spi::Spi) -> Result<W, Error> {
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return Err(Error::Crc);
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return Err(Error::Crc);
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} else if sr.rxne() {
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} else if sr.rxne() {
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unsafe {
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unsafe {
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let dr = regs.dr().ptr() as *const W;
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return Ok(ptr::read_volatile(regs.rx_ptr()));
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return Ok(ptr::read_volatile(dr));
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}
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}
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}
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}
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}
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}
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@ -2,7 +2,7 @@
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use crate::dma::NoDma;
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use crate::dma::NoDma;
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use crate::gpio::sealed::Pin;
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use crate::gpio::sealed::Pin;
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use crate::spi::{Error, Instance, RxDmaChannel, TxDmaChannel, WordSize};
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use crate::spi::{Error, Instance, RegsExt, RxDmaChannel, TxDmaChannel, WordSize};
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use core::future::Future;
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use core::future::Future;
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use core::ptr;
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use core::ptr;
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use embassy_traits::spi as traits;
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use embassy_traits::spi as traits;
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@ -49,7 +49,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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}
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}
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let request = self.txdma.request();
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let request = self.txdma.request();
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let dst = T::regs().txdr().ptr() as *mut u8;
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let dst = T::regs().tx_ptr();
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let f = self.txdma.write(request, write, dst);
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let f = self.txdma.write(request, write, dst);
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unsafe {
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unsafe {
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@ -96,11 +96,11 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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let clock_byte_count = read.len();
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let clock_byte_count = read.len();
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let rx_request = self.rxdma.request();
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let rx_request = self.rxdma.request();
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let rx_src = T::regs().rxdr().ptr() as *mut u8;
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let rx_src = T::regs().rx_ptr();
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let rx_f = self.rxdma.read(rx_request, rx_src, read);
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let rx_f = self.rxdma.read(rx_request, rx_src, read);
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let tx_request = self.txdma.request();
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let tx_request = self.txdma.request();
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let tx_dst = T::regs().txdr().ptr() as *mut u8;
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let tx_dst = T::regs().tx_ptr();
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let clock_byte = 0x00;
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let clock_byte = 0x00;
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let tx_f = self
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let tx_f = self
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.txdma
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.txdma
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@ -155,13 +155,13 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
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}
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}
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let rx_request = self.rxdma.request();
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let rx_request = self.rxdma.request();
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let rx_src = T::regs().rxdr().ptr() as *mut u8;
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let rx_src = T::regs().rx_ptr();
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let rx_f = self
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let rx_f = self
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.rxdma
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.rxdma
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.read(rx_request, rx_src, &mut read[0..write.len()]);
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.read(rx_request, rx_src, &mut read[0..write.len()]);
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let tx_request = self.txdma.request();
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let tx_request = self.txdma.request();
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let tx_dst = T::regs().txdr().ptr() as *mut u8;
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let tx_dst = T::regs().tx_ptr();
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let tx_f = self.txdma.write(tx_request, write, tx_dst);
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let tx_f = self.txdma.write(tx_request, write, tx_dst);
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unsafe {
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unsafe {
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@ -223,8 +223,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T, NoDm
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// spin
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// spin
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}
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}
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unsafe {
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unsafe {
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let txdr = regs.txdr().ptr() as *mut u8;
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ptr::write_volatile(regs.tx_ptr(), *word);
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ptr::write_volatile(txdr, *word);
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regs.cr1().modify(|reg| reg.set_cstart(true));
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regs.cr1().modify(|reg| reg.set_cstart(true));
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}
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}
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loop {
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loop {
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@ -245,9 +244,8 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T, NoDm
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break;
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break;
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}
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}
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unsafe {
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unsafe {
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let rxdr = regs.rxdr().ptr() as *const u8;
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// discard read to prevent pverrun.
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// discard read to prevent pverrun.
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let _ = ptr::read_volatile(rxdr);
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let _: u8 = ptr::read_volatile(T::regs().rx_ptr());
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}
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}
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}
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}
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@ -276,8 +274,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T, N
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// spin
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// spin
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}
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}
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unsafe {
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unsafe {
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let txdr = regs.txdr().ptr() as *mut u8;
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ptr::write_volatile(T::regs().tx_ptr(), *word);
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ptr::write_volatile(txdr, *word);
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regs.cr1().modify(|reg| reg.set_cstart(true));
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regs.cr1().modify(|reg| reg.set_cstart(true));
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}
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}
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loop {
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loop {
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@ -297,8 +294,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer<u8> for Spi<'d, T, N
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}
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}
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}
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}
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unsafe {
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unsafe {
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let rxdr = regs.rxdr().ptr() as *const u8;
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*word = ptr::read_volatile(T::regs().rx_ptr());
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*word = ptr::read_volatile(rxdr);
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}
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}
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let sr = unsafe { regs.sr().read() };
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let sr = unsafe { regs.sr().read() };
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if sr.tifre() {
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if sr.tifre() {
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