rp: add PWM api
This commit is contained in:
pennae
parent
54fe50c685
commit
a4866ad278
7 changed files with 522 additions and 4 deletions
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@ -60,8 +60,9 @@ chrono = { version = "0.4", default-features = false, optional = true }
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embedded-io = { version = "0.4.0", features = ["async"], optional = true }
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embedded-storage = { version = "0.3" }
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rand_core = "0.6.4"
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fixed = "1.23.1"
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rp-pac = { version = "1", features = ["rt"] }
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rp-pac = { version = "2", features = ["rt"] }
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embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
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embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10", optional = true}
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@ -155,8 +155,8 @@ unsafe fn configure_pll(p: pac::pll::Pll, refdiv: u32, vco_freq: u32, post_div1:
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let cs = p.cs().read();
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let prim = p.prim().read();
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if cs.lock()
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&& cs.refdiv() == refdiv as _
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&& p.fbdiv_int().read().fbdiv_int() == fbdiv as _
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&& cs.refdiv() == refdiv as u8
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&& p.fbdiv_int().read().fbdiv_int() == fbdiv as u16
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&& prim.postdiv1() == post_div1
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&& prim.postdiv2() == post_div2
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{
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@ -21,6 +21,7 @@ pub mod interrupt;
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pub mod pio;
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#[cfg(feature = "pio")]
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pub mod pio_instr_util;
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pub mod pwm;
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#[cfg(feature = "pio")]
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pub mod relocate;
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@ -109,6 +110,15 @@ embassy_hal_common::peripherals! {
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DMA_CH10,
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DMA_CH11,
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PWM_CH0,
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PWM_CH1,
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PWM_CH2,
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PWM_CH3,
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PWM_CH4,
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PWM_CH5,
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PWM_CH6,
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PWM_CH7,
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USB,
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RTC,
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338
embassy-rp/src/pwm.rs
Normal file
338
embassy-rp/src/pwm.rs
Normal file
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@ -0,0 +1,338 @@
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//! Pulse Width Modulation (PWM)
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use embassy_embedded_hal::SetConfig;
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use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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use fixed::traits::ToFixed;
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use fixed::FixedU16;
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use pac::pwm::regs::{ChDiv, Intr};
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use pac::pwm::vals::Divmode;
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use crate::gpio::sealed::Pin as _;
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use crate::gpio::{AnyPin, Pin as GpioPin};
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use crate::{pac, peripherals, RegExt};
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#[non_exhaustive]
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#[derive(Clone)]
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pub struct Config {
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pub invert_a: bool,
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pub invert_b: bool,
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pub phase_correct: bool,
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pub enable: bool,
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pub divider: fixed::FixedU16<fixed::types::extra::U4>,
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pub compare_a: u16,
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pub compare_b: u16,
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pub top: u16,
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}
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impl Default for Config {
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fn default() -> Self {
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Self {
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invert_a: false,
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invert_b: false,
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phase_correct: false,
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enable: true, // differs from reset value
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divider: 1.to_fixed(),
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compare_a: 0,
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compare_b: 0,
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top: 0xffff,
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}
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}
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}
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pub enum InputMode {
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Level,
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RisingEdge,
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FallingEdge,
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}
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impl From<InputMode> for Divmode {
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fn from(value: InputMode) -> Self {
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match value {
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InputMode::Level => Divmode::LEVEL,
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InputMode::RisingEdge => Divmode::RISE,
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InputMode::FallingEdge => Divmode::FALL,
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}
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}
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}
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pub struct Pwm<'d, T: Channel> {
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inner: PeripheralRef<'d, T>,
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pin_a: Option<PeripheralRef<'d, AnyPin>>,
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pin_b: Option<PeripheralRef<'d, AnyPin>>,
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}
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impl<'d, T: Channel> Pwm<'d, T> {
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fn new_inner(
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inner: impl Peripheral<P = T> + 'd,
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a: Option<PeripheralRef<'d, AnyPin>>,
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b: Option<PeripheralRef<'d, AnyPin>>,
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config: Config,
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divmode: Divmode,
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) -> Self {
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into_ref!(inner);
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let p = inner.regs();
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unsafe {
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p.csr().modify(|w| {
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w.set_divmode(divmode);
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w.set_en(false);
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});
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p.ctr().write(|w| w.0 = 0);
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Self::configure(p, &config);
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if let Some(pin) = &a {
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pin.io().ctrl().write(|w| w.set_funcsel(4));
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}
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if let Some(pin) = &b {
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pin.io().ctrl().write(|w| w.set_funcsel(4));
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}
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}
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Self {
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inner,
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pin_a: a.into(),
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pin_b: b.into(),
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}
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}
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#[inline]
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pub fn new_free(inner: impl Peripheral<P = T> + 'd, config: Config) -> Self {
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Self::new_inner(inner, None, None, config, Divmode::DIV)
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}
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#[inline]
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pub fn new_output_a(
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inner: impl Peripheral<P = T> + 'd,
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a: impl Peripheral<P = impl PwmPinA<T>> + 'd,
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config: Config,
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) -> Self {
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into_ref!(a);
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Self::new_inner(inner, Some(a.map_into()), None, config, Divmode::DIV)
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}
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#[inline]
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pub fn new_output_b(
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inner: impl Peripheral<P = T> + 'd,
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b: impl Peripheral<P = impl PwmPinB<T>> + 'd,
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config: Config,
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) -> Self {
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into_ref!(b);
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Self::new_inner(inner, None, Some(b.map_into()), config, Divmode::DIV)
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}
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#[inline]
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pub fn new_output_ab(
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inner: impl Peripheral<P = T> + 'd,
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a: impl Peripheral<P = impl PwmPinA<T>> + 'd,
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b: impl Peripheral<P = impl PwmPinB<T>> + 'd,
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config: Config,
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) -> Self {
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into_ref!(a, b);
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Self::new_inner(inner, Some(a.map_into()), Some(b.map_into()), config, Divmode::DIV)
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}
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#[inline]
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pub fn new_input(
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inner: impl Peripheral<P = T> + 'd,
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b: impl Peripheral<P = impl PwmPinB<T>> + 'd,
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mode: InputMode,
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config: Config,
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) -> Self {
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into_ref!(b);
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Self::new_inner(inner, None, Some(b.map_into()), config, mode.into())
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}
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#[inline]
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pub fn new_output_input(
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inner: impl Peripheral<P = T> + 'd,
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a: impl Peripheral<P = impl PwmPinA<T>> + 'd,
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b: impl Peripheral<P = impl PwmPinB<T>> + 'd,
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mode: InputMode,
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config: Config,
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) -> Self {
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into_ref!(a, b);
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Self::new_inner(inner, Some(a.map_into()), Some(b.map_into()), config, mode.into())
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}
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fn configure(p: pac::pwm::Channel, config: &Config) {
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if config.divider > FixedU16::<fixed::types::extra::U4>::from_bits(0xFF_F) {
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panic!("Requested divider is too large");
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}
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unsafe {
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p.div().write_value(ChDiv(config.divider.to_bits() as u32));
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p.cc().write(|w| {
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w.set_a(config.compare_a);
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w.set_b(config.compare_b);
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});
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p.top().write(|w| w.set_top(config.top));
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p.csr().modify(|w| {
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w.set_a_inv(config.invert_a);
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w.set_b_inv(config.invert_b);
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w.set_ph_correct(config.phase_correct);
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w.set_en(config.enable);
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});
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}
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}
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#[inline]
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pub unsafe fn phase_advance(&mut self) {
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let p = self.inner.regs();
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p.csr().write_set(|w| w.set_ph_adv(true));
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while p.csr().read().ph_adv() {}
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}
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#[inline]
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pub unsafe fn phase_retard(&mut self) {
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let p = self.inner.regs();
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p.csr().write_set(|w| w.set_ph_ret(true));
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while p.csr().read().ph_ret() {}
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}
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#[inline]
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pub fn counter(&self) -> u16 {
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unsafe { self.inner.regs().ctr().read().ctr() }
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}
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#[inline]
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pub fn set_counter(&self, ctr: u16) {
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unsafe { self.inner.regs().ctr().write(|w| w.set_ctr(ctr)) }
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}
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#[inline]
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pub fn wait_for_wrap(&mut self) {
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while !self.wrapped() {}
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self.clear_wrapped();
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}
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#[inline]
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pub fn wrapped(&mut self) -> bool {
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unsafe { pac::PWM.intr().read().0 & self.bit() != 0 }
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}
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#[inline]
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pub fn clear_wrapped(&mut self) {
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unsafe {
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pac::PWM.intr().write_value(Intr(self.bit() as _));
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}
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}
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#[inline]
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fn bit(&self) -> u32 {
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1 << self.inner.number() as usize
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}
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}
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pub struct PwmBatch(u32);
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impl PwmBatch {
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#[inline]
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pub fn enable(&mut self, pwm: &Pwm<'_, impl Channel>) {
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self.0 |= pwm.bit();
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}
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#[inline]
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pub fn set_enabled(enabled: bool, batch: impl FnOnce(&mut PwmBatch)) {
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let mut en = PwmBatch(0);
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batch(&mut en);
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unsafe {
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if enabled {
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pac::PWM.en().write_set(|w| w.0 = en.0);
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} else {
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pac::PWM.en().write_clear(|w| w.0 = en.0);
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}
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}
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}
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}
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impl<'d, T: Channel> Drop for Pwm<'d, T> {
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fn drop(&mut self) {
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unsafe {
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self.inner.regs().csr().write_clear(|w| w.set_en(false));
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if let Some(pin) = &self.pin_a {
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pin.io().ctrl().write(|w| w.set_funcsel(31));
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}
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if let Some(pin) = &self.pin_b {
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pin.io().ctrl().write(|w| w.set_funcsel(31));
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}
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}
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}
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}
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mod sealed {
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pub trait Channel {}
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}
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pub trait Channel: Peripheral<P = Self> + sealed::Channel + Sized + 'static {
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fn number(&self) -> u8;
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fn regs(&self) -> pac::pwm::Channel {
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pac::PWM.ch(self.number() as _)
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}
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}
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macro_rules! channel {
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($name:ident, $num:expr) => {
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impl sealed::Channel for peripherals::$name {}
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impl Channel for peripherals::$name {
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fn number(&self) -> u8 {
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$num
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}
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}
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};
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}
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channel!(PWM_CH0, 0);
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channel!(PWM_CH1, 1);
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channel!(PWM_CH2, 2);
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channel!(PWM_CH3, 3);
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channel!(PWM_CH4, 4);
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channel!(PWM_CH5, 5);
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channel!(PWM_CH6, 6);
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channel!(PWM_CH7, 7);
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pub trait PwmPinA<T: Channel>: GpioPin {}
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pub trait PwmPinB<T: Channel>: GpioPin {}
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macro_rules! impl_pin {
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($pin:ident, $channel:ident, $kind:ident) => {
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impl $kind<peripherals::$channel> for peripherals::$pin {}
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};
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}
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impl_pin!(PIN_0, PWM_CH0, PwmPinA);
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impl_pin!(PIN_1, PWM_CH0, PwmPinB);
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impl_pin!(PIN_2, PWM_CH1, PwmPinA);
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impl_pin!(PIN_3, PWM_CH1, PwmPinB);
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impl_pin!(PIN_4, PWM_CH2, PwmPinA);
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impl_pin!(PIN_5, PWM_CH2, PwmPinB);
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impl_pin!(PIN_6, PWM_CH3, PwmPinA);
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impl_pin!(PIN_7, PWM_CH3, PwmPinB);
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impl_pin!(PIN_8, PWM_CH4, PwmPinA);
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impl_pin!(PIN_9, PWM_CH4, PwmPinB);
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impl_pin!(PIN_10, PWM_CH5, PwmPinA);
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impl_pin!(PIN_11, PWM_CH5, PwmPinB);
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impl_pin!(PIN_12, PWM_CH6, PwmPinA);
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impl_pin!(PIN_13, PWM_CH6, PwmPinB);
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impl_pin!(PIN_14, PWM_CH7, PwmPinA);
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impl_pin!(PIN_15, PWM_CH7, PwmPinB);
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impl_pin!(PIN_16, PWM_CH0, PwmPinA);
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impl_pin!(PIN_17, PWM_CH0, PwmPinB);
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impl_pin!(PIN_18, PWM_CH1, PwmPinA);
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impl_pin!(PIN_19, PWM_CH1, PwmPinB);
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impl_pin!(PIN_20, PWM_CH2, PwmPinA);
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impl_pin!(PIN_21, PWM_CH2, PwmPinB);
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impl_pin!(PIN_22, PWM_CH3, PwmPinA);
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impl_pin!(PIN_23, PWM_CH3, PwmPinB);
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impl_pin!(PIN_24, PWM_CH4, PwmPinA);
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impl_pin!(PIN_25, PWM_CH4, PwmPinB);
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impl_pin!(PIN_26, PWM_CH5, PwmPinA);
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impl_pin!(PIN_27, PWM_CH5, PwmPinB);
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impl_pin!(PIN_28, PWM_CH6, PwmPinA);
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impl_pin!(PIN_29, PWM_CH6, PwmPinB);
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impl<'d, T: Channel> SetConfig for Pwm<'d, T> {
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type Config = Config;
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fn set_config(&mut self, config: &Self::Config) {
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Self::configure(self.inner.regs(), config);
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}
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}
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@ -231,7 +231,7 @@ impl<'d, T: Instance> Driver<'d, T> {
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let len = (max_packet_size + 63) / 64 * 64;
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let addr = self.ep_mem_free;
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if addr + len > EP_MEMORY_SIZE as _ {
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if addr + len > EP_MEMORY_SIZE as u16 {
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warn!("Endpoint memory full");
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return Err(EndpointAllocError);
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}
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27
examples/rp/src/bin/pwm.rs
Normal file
27
examples/rp/src/bin/pwm.rs
Normal file
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@ -0,0 +1,27 @@
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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use defmt::*;
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use embassy_embedded_hal::SetConfig;
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use embassy_executor::Spawner;
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use embassy_rp::pwm::{Config, Pwm};
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use embassy_time::{Duration, Timer};
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use {defmt_rtt as _, panic_probe as _};
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let p = embassy_rp::init(Default::default());
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let mut c: Config = Default::default();
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c.top = 0x8000;
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c.compare_b = 8;
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let mut pwm = Pwm::new_output_b(p.PWM_CH4, p.PIN_25, c.clone());
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loop {
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info!("current LED duty cycle: {}/32768", c.compare_b);
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Timer::after(Duration::from_secs(1)).await;
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c.compare_b = c.compare_b.rotate_left(4);
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pwm.set_config(&c);
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}
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}
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142
tests/rp/src/bin/pwm.rs
Normal file
142
tests/rp/src/bin/pwm.rs
Normal file
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@ -0,0 +1,142 @@
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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use defmt::{assert, assert_eq, assert_ne, *};
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use embassy_executor::Spawner;
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use embassy_rp::gpio::{Input, Level, Output, Pull};
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use embassy_rp::pwm::{Config, InputMode, Pwm};
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use embassy_time::{Duration, Timer};
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use {defmt_rtt as _, panic_probe as _};
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let mut p = embassy_rp::init(Default::default());
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info!("Hello World!");
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// Connections on CI device: 6 -> 9, 7 -> 11
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let (mut p6, mut p7, mut p9, mut p11) = (p.PIN_6, p.PIN_7, p.PIN_9, p.PIN_11);
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let cfg = {
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let mut c = Config::default();
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c.divider = 125.into();
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c.top = 10000;
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c.compare_a = 5000;
|
||||
c.compare_b = 5000;
|
||||
c
|
||||
};
|
||||
|
||||
// Test free-running clock
|
||||
{
|
||||
let pwm = Pwm::new_free(&mut p.PWM_CH3, cfg.clone());
|
||||
cortex_m::asm::delay(125);
|
||||
let ctr = pwm.counter();
|
||||
assert!(ctr > 0);
|
||||
assert!(ctr < 100);
|
||||
cortex_m::asm::delay(125);
|
||||
assert!(ctr < pwm.counter());
|
||||
}
|
||||
|
||||
for invert_a in [false, true] {
|
||||
info!("free-running, invert A: {}", invert_a);
|
||||
let mut cfg = cfg.clone();
|
||||
cfg.invert_a = invert_a;
|
||||
cfg.invert_b = !invert_a;
|
||||
|
||||
// Test output from A
|
||||
{
|
||||
let pin1 = Input::new(&mut p9, Pull::None);
|
||||
let _pwm = Pwm::new_output_a(&mut p.PWM_CH3, &mut p6, cfg.clone());
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
assert_eq!(pin1.is_low(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pin1.is_high(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pin1.is_low(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pin1.is_high(), invert_a);
|
||||
}
|
||||
|
||||
// Test output from B
|
||||
{
|
||||
let pin2 = Input::new(&mut p11, Pull::None);
|
||||
let _pwm = Pwm::new_output_b(&mut p.PWM_CH3, &mut p7, cfg.clone());
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
assert_ne!(pin2.is_low(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_ne!(pin2.is_high(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_ne!(pin2.is_low(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_ne!(pin2.is_high(), invert_a);
|
||||
}
|
||||
|
||||
// Test output from A+B
|
||||
{
|
||||
let pin1 = Input::new(&mut p9, Pull::None);
|
||||
let pin2 = Input::new(&mut p11, Pull::None);
|
||||
let _pwm = Pwm::new_output_ab(&mut p.PWM_CH3, &mut p6, &mut p7, cfg.clone());
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
assert_eq!(pin1.is_low(), invert_a);
|
||||
assert_ne!(pin2.is_low(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pin1.is_high(), invert_a);
|
||||
assert_ne!(pin2.is_high(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pin1.is_low(), invert_a);
|
||||
assert_ne!(pin2.is_low(), invert_a);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pin1.is_high(), invert_a);
|
||||
assert_ne!(pin2.is_high(), invert_a);
|
||||
}
|
||||
}
|
||||
|
||||
// Test level-gated
|
||||
{
|
||||
let mut pin2 = Output::new(&mut p11, Level::Low);
|
||||
let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::Level, cfg.clone());
|
||||
assert_eq!(pwm.counter(), 0);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pwm.counter(), 0);
|
||||
pin2.set_high();
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
pin2.set_low();
|
||||
let ctr = pwm.counter();
|
||||
assert!(ctr >= 1000);
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
assert_eq!(pwm.counter(), ctr);
|
||||
}
|
||||
|
||||
// Test rising-gated
|
||||
{
|
||||
let mut pin2 = Output::new(&mut p11, Level::Low);
|
||||
let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::RisingEdge, cfg.clone());
|
||||
assert_eq!(pwm.counter(), 0);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pwm.counter(), 0);
|
||||
pin2.set_high();
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
pin2.set_low();
|
||||
assert_eq!(pwm.counter(), 1);
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
assert_eq!(pwm.counter(), 1);
|
||||
}
|
||||
|
||||
// Test falling-gated
|
||||
{
|
||||
let mut pin2 = Output::new(&mut p11, Level::High);
|
||||
let pwm = Pwm::new_input(&mut p.PWM_CH3, &mut p7, InputMode::FallingEdge, cfg.clone());
|
||||
assert_eq!(pwm.counter(), 0);
|
||||
Timer::after(Duration::from_millis(5)).await;
|
||||
assert_eq!(pwm.counter(), 0);
|
||||
pin2.set_low();
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
pin2.set_high();
|
||||
assert_eq!(pwm.counter(), 1);
|
||||
Timer::after(Duration::from_millis(1)).await;
|
||||
assert_eq!(pwm.counter(), 1);
|
||||
}
|
||||
|
||||
info!("Test OK");
|
||||
cortex_m::asm::bkpt();
|
||||
}
|
||||
Loading…
Reference in a new issue