diff --git a/embassy-stm32-examples/Cargo.toml b/embassy-stm32-examples/Cargo.toml index f12ed9101..af809b838 100644 --- a/embassy-stm32-examples/Cargo.toml +++ b/embassy-stm32-examples/Cargo.toml @@ -7,6 +7,7 @@ version = "0.1.0" [features] default = [ "defmt-default", + "f429", ] defmt-default = [] defmt-trace = [] @@ -15,23 +16,23 @@ defmt-info = [] defmt-warn = [] defmt-error = [] -stm32f401 = ["embassy-stm32/stm32f401"] -stm32f405 = ["embassy-stm32/stm32f405"] -stm32f407 = ["embassy-stm32/stm32f407"] -stm32f410 = ["embassy-stm32/stm32f410"] -stm32f411 = ["embassy-stm32/stm32f411"] -stm32f412 = ["embassy-stm32/stm32f412"] -stm32f413 = ["embassy-stm32/stm32f413"] -stm32f415 = ["embassy-stm32/stm32f405"] -stm32f417 = ["embassy-stm32/stm32f407"] -stm32f423 = ["embassy-stm32/stm32f413"] -stm32f427 = ["embassy-stm32/stm32f427"] -stm32f429 = ["embassy-stm32/stm32f429"] -stm32f437 = ["embassy-stm32/stm32f427"] -stm32f439 = ["embassy-stm32/stm32f429"] -stm32f446 = ["embassy-stm32/stm32f446"] -stm32f469 = ["embassy-stm32/stm32f469"] -stm32f479 = ["embassy-stm32/stm32f469"] +f401 = ["embassy-stm32/f401"] +f405 = ["embassy-stm32/f405"] +f407 = ["embassy-stm32/f407"] +f410 = ["embassy-stm32/f410"] +f411 = ["embassy-stm32/f411"] +f412 = ["embassy-stm32/f412"] +f413 = ["embassy-stm32/f413"] +f415 = ["embassy-stm32/f405"] +f417 = ["embassy-stm32/f407"] +f423 = ["embassy-stm32/f413"] +f427 = ["embassy-stm32/f427"] +f429 = ["embassy-stm32/f429"] +f437 = ["embassy-stm32/f427"] +f439 = ["embassy-stm32/f429"] +f446 = ["embassy-stm32/f446"] +f469 = ["embassy-stm32/f469"] +f479 = ["embassy-stm32/f469"] [dependencies] @@ -39,6 +40,7 @@ embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt- embassy-traits = { version = "0.1.0", path = "../embassy-traits", features = ["defmt"] } embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32" } embassy-extras = {version = "0.1.0", path = "../embassy-extras" } +stm32f4 = { version = "0.13", features = ["stm32f429"] } defmt = "0.2.0" defmt-rtt = "0.2.0" @@ -49,5 +51,3 @@ embedded-hal = { version = "0.2.4" } panic-probe = "0.1.0" futures = { version = "0.3.8", default-features = false, features = ["async-await"] } rtt-target = { version = "0.3", features = ["cortex-m"] } -bxcan = "0.5.0" -usb-device = "0.2.7" diff --git a/embassy-stm32-examples/src/bin/blinky.rs b/embassy-stm32-examples/src/bin/blinky.rs new file mode 100644 index 000000000..a90992be4 --- /dev/null +++ b/embassy-stm32-examples/src/bin/blinky.rs @@ -0,0 +1,52 @@ +#![no_std] +#![no_main] +#![feature(trait_alias)] +#![feature(min_type_alias_impl_trait)] +#![feature(impl_trait_in_bindings)] +#![feature(type_alias_impl_trait)] + +#[path = "../example_common.rs"] +mod example_common; +use embassy_stm32::gpio::{Level, Output}; +use embedded_hal::digital::v2::OutputPin; +use example_common::*; + +use cortex_m_rt::entry; +use stm32f4::stm32f429 as pac; + +#[entry] +fn main() -> ! { + info!("Hello World!"); + + let pp = pac::Peripherals::take().unwrap(); + + pp.DBGMCU.cr.modify(|_, w| { + w.dbg_sleep().set_bit(); + w.dbg_standby().set_bit(); + w.dbg_stop().set_bit() + }); + pp.RCC.ahb1enr.modify(|_, w| w.dma1en().enabled()); + + pp.RCC.ahb1enr.modify(|_, w| { + w.gpioaen().enabled(); + w.gpioben().enabled(); + w.gpiocen().enabled(); + w.gpioden().enabled(); + w.gpioeen().enabled(); + w.gpiofen().enabled(); + w + }); + + let p = embassy_stm32::Peripherals::take().unwrap(); + let mut led = Output::new(p.PB7, Level::High); + + loop { + info!("high"); + led.set_high().unwrap(); + cortex_m::asm::delay(1_000_000); + + info!("low"); + led.set_low().unwrap(); + cortex_m::asm::delay(1_000_000); + } +} diff --git a/embassy-stm32-examples/src/bin/can.rs b/embassy-stm32-examples/src/bin/can.rs_ similarity index 100% rename from embassy-stm32-examples/src/bin/can.rs rename to embassy-stm32-examples/src/bin/can.rs_ diff --git a/embassy-stm32-examples/src/bin/exti.rs b/embassy-stm32-examples/src/bin/exti.rs_ similarity index 100% rename from embassy-stm32-examples/src/bin/exti.rs rename to embassy-stm32-examples/src/bin/exti.rs_ diff --git a/embassy-stm32-examples/src/bin/hello.rs b/embassy-stm32-examples/src/bin/hello.rs deleted file mode 100644 index b851482d4..000000000 --- a/embassy-stm32-examples/src/bin/hello.rs +++ /dev/null @@ -1,42 +0,0 @@ -#![no_std] -#![no_main] -#![feature(trait_alias)] -#![feature(min_type_alias_impl_trait)] -#![feature(impl_trait_in_bindings)] -#![feature(type_alias_impl_trait)] - -#[path = "../example_common.rs"] -mod example_common; -use example_common::*; - -use cortex_m_rt::entry; -use embassy_stm32::hal::prelude::*; - -#[entry] -fn main() -> ! { - info!("Hello World!"); - - let p = embassy_stm32::pac::Peripherals::take().unwrap(); - - p.DBGMCU.cr.modify(|_, w| { - w.dbg_sleep().set_bit(); - w.dbg_standby().set_bit(); - w.dbg_stop().set_bit() - }); - p.RCC.ahb1enr.modify(|_, w| w.dma1en().enabled()); - - let gpioa = p.GPIOA.split(); - let gpioc = p.GPIOC.split(); - - let mut led = gpioc.pc13.into_push_pull_output(); - let button = gpioa.pa0.into_pull_up_input(); - led.set_low().unwrap(); - - loop { - if button.is_high().unwrap() { - led.set_low().unwrap(); - } else { - led.set_high().unwrap(); - } - } -} diff --git a/embassy-stm32-examples/src/bin/rtc_async.rs b/embassy-stm32-examples/src/bin/rtc_async.rs_ similarity index 100% rename from embassy-stm32-examples/src/bin/rtc_async.rs rename to embassy-stm32-examples/src/bin/rtc_async.rs_ diff --git a/embassy-stm32-examples/src/bin/serial.rs b/embassy-stm32-examples/src/bin/serial.rs_ similarity index 100% rename from embassy-stm32-examples/src/bin/serial.rs rename to embassy-stm32-examples/src/bin/serial.rs_ diff --git a/embassy-stm32-examples/src/bin/usb_serial.rs b/embassy-stm32-examples/src/bin/usb_serial.rs_ similarity index 100% rename from embassy-stm32-examples/src/bin/usb_serial.rs rename to embassy-stm32-examples/src/bin/usb_serial.rs_ diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 523359417..15f902cf6 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -11,31 +11,28 @@ defmt-info = [ ] defmt-warn = [ ] defmt-error = [ ] -stm32f401 = ["stm32f4xx-hal/stm32f401"] -stm32f405 = ["stm32f4xx-hal/stm32f405"] -stm32f407 = ["stm32f4xx-hal/stm32f407"] -stm32f410 = ["stm32f4xx-hal/stm32f410"] -stm32f411 = ["stm32f4xx-hal/stm32f411"] -stm32f412 = ["stm32f4xx-hal/stm32f412"] -stm32f413 = ["stm32f4xx-hal/stm32f413"] -stm32f415 = ["stm32f4xx-hal/stm32f405"] -stm32f417 = ["stm32f4xx-hal/stm32f407"] -stm32f423 = ["stm32f4xx-hal/stm32f413"] -stm32f427 = ["stm32f4xx-hal/stm32f427"] -stm32f429 = ["stm32f4xx-hal/stm32f429"] -stm32f437 = ["stm32f4xx-hal/stm32f427"] -stm32f439 = ["stm32f4xx-hal/stm32f429"] -stm32f446 = ["stm32f4xx-hal/stm32f446"] -stm32f469 = ["stm32f4xx-hal/stm32f469"] -stm32f479 = ["stm32f4xx-hal/stm32f469"] - -stm32l0x1 = ["stm32l0xx-hal/stm32l0x1"] -stm32l0x2 = ["stm32l0xx-hal/stm32l0x2"] -stm32l0x3 = ["stm32l0xx-hal/stm32l0x3"] +f4 = [] +f401 = ["f4"] +f405 = ["f4"] +f407 = ["f4"] +f410 = ["f4"] +f411 = ["f4"] +f412 = ["f4"] +f413 = ["f4"] +f415 = ["f4"] +f417 = ["f4"] +f423 = ["f4"] +f427 = ["f4"] +f429 = ["f4"] +f437 = ["f4"] +f439 = ["f4"] +f446 = ["f4"] +f469 = ["f4"] +f479 = ["f4"] [dependencies] embassy = { version = "0.1.0", path = "../embassy" } -embassy-macros = { version = "0.1.0", path = "../embassy-macros", features = ["stm32"]} +embassy-macros = { version = "0.1.0", path = "../embassy-macros" } embassy-extras = {version = "0.1.0", path = "../embassy-extras" } defmt = { version = "0.2.0", optional = true } @@ -43,9 +40,5 @@ log = { version = "0.4.11", optional = true } cortex-m-rt = "0.6.13" cortex-m = "0.7.1" embedded-hal = { version = "0.2.4" } -embedded-dma = { version = "0.1.2" } -bxcan = "0.5.0" -nb = "*" -stm32f4xx-hal = { version = "0.9.0", features = ["rt", "can", "usb_fs"], optional = true } -stm32l0xx-hal = { version = "0.7.0", features = ["rt"], optional = true } -futures = { version = "0.3.5", default-features = false, features = ["async-await"] } \ No newline at end of file +futures = { version = "0.3.5", default-features = false, features = ["async-await"] } +stm32-metapac = { path = "../../stm32-metapac"} diff --git a/embassy-stm32/src/chip/f429.rs b/embassy-stm32/src/chip/f429.rs new file mode 100644 index 000000000..1c2fdc0c6 --- /dev/null +++ b/embassy-stm32/src/chip/f429.rs @@ -0,0 +1,6 @@ +use embassy_extras::peripherals; + +peripherals!( + PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1, + PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, +); diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs new file mode 100644 index 000000000..80fcbba24 --- /dev/null +++ b/embassy-stm32/src/gpio.rs @@ -0,0 +1,370 @@ +use core::convert::Infallible; +use core::hint::unreachable_unchecked; +use core::marker::PhantomData; + +use embassy::util::PeripheralBorrow; +use embassy_extras::{impl_unborrow, unborrow}; +use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin}; +use gpio::vals::{self, Pupdr}; + +use crate::pac; +use crate::pac::gpio_v2 as gpio; +use crate::peripherals; + +/// A GPIO port with up to 16 pins. +#[derive(Debug, Eq, PartialEq)] +pub enum Port { + PortA, + PortB, +} + +/// Pull setting for an input. +#[derive(Debug, Eq, PartialEq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum Pull { + None, + Up, + Down, +} + +/* +/// GPIO input driver. +pub struct Input<'d, T: Pin> { + pub(crate) pin: T, + phantom: PhantomData<&'d mut T>, +} + +impl<'d, T: Pin> Input<'d, T> { + pub fn new(pin: impl PeripheralBorrow + 'd, pull: Pull) -> Self { + unborrow!(pin); + + pin.conf().write(|w| { + w.dir().input(); + w.input().connect(); + match pull { + Pull::None => { + w.pull().disabled(); + } + Pull::Up => { + w.pull().pullup(); + } + Pull::Down => { + w.pull().pulldown(); + } + } + w.drive().s0s1(); + w.sense().disabled(); + w + }); + + Self { + pin, + phantom: PhantomData, + } + } +} + +impl<'d, T: Pin> Drop for Input<'d, T> { + fn drop(&mut self) { + self.pin.conf().reset(); + } +} + +impl<'d, T: Pin> InputPin for Input<'d, T> { + type Error = Infallible; + + fn is_high(&self) -> Result { + self.is_low().map(|v| !v) + } + + fn is_low(&self) -> Result { + Ok(self.pin.block().in_.read().bits() & (1 << self.pin.pin()) == 0) + } +} + +*/ + +/// Digital input or output level. +#[derive(Debug, Eq, PartialEq)] +#[cfg_attr(feature = "defmt", derive(defmt::Format))] +pub enum Level { + Low, + High, +} + +/// GPIO output driver. +pub struct Output<'d, T: Pin> { + pub(crate) pin: T, + phantom: PhantomData<&'d mut T>, +} + +impl<'d, T: Pin> Output<'d, T> { + pub fn new(pin: impl PeripheralBorrow + 'd, initial_output: Level) -> Self { + unborrow!(pin); + + match initial_output { + Level::High => pin.set_high(), + Level::Low => pin.set_low(), + } + + cortex_m::interrupt::free(|_| unsafe { + let r = pin.block(); + let n = pin.pin() as usize; + r.pupdr().modify(|w| w.set_pupdr(n, vals::Pupdr::FLOATING)); + r.otyper().modify(|w| w.set_ot(n, vals::Ot::PUSHPULL)); + r.moder().modify(|w| w.set_moder(n, vals::Moder::OUTPUT)); + }); + + Self { + pin, + phantom: PhantomData, + } + } +} + +impl<'d, T: Pin> Drop for Output<'d, T> { + fn drop(&mut self) { + cortex_m::interrupt::free(|_| unsafe { + let r = self.pin.block(); + let n = self.pin.pin() as usize; + r.moder().modify(|w| w.set_moder(n, vals::Moder::INPUT)); + }); + } +} + +impl<'d, T: Pin> OutputPin for Output<'d, T> { + type Error = Infallible; + + /// Set the output as high. + fn set_high(&mut self) -> Result<(), Self::Error> { + self.pin.set_high(); + Ok(()) + } + + /// Set the output as low. + fn set_low(&mut self) -> Result<(), Self::Error> { + self.pin.set_low(); + Ok(()) + } +} + +impl<'d, T: Pin> StatefulOutputPin for Output<'d, T> { + /// Is the output pin set as high? + fn is_set_high(&self) -> Result { + self.is_set_low().map(|v| !v) + } + + /// Is the output pin set as low? + fn is_set_low(&self) -> Result { + let state = unsafe { self.pin.block().odr().read().odr(self.pin.pin() as _) }; + Ok(state == vals::Odr::LOW) + } +} + +pub(crate) mod sealed { + use super::*; + + pub trait Pin { + fn pin_port(&self) -> u8; + + #[inline] + fn _pin(&self) -> u8 { + self.pin_port() % 16 + } + #[inline] + fn _port(&self) -> u8 { + self.pin_port() / 16 + } + + #[inline] + fn block(&self) -> gpio::Gpio { + let p = 0x4002_0000 + (self._port() as u32) * 0x400; + gpio::Gpio(p as *mut u8) + } + + /// Set the output as high. + #[inline] + fn set_high(&self) { + unsafe { + self.block() + .bsrr() + .write(|w| w.set_bs(self._pin() as _, true)); + } + } + + /// Set the output as low. + #[inline] + fn set_low(&self) { + unsafe { + self.block() + .bsrr() + .write(|w| w.set_br(self._pin() as _, true)); + } + } + } + + pub trait OptionalPin {} +} + +pub trait Pin: sealed::Pin + Sized { + /// Number of the pin within the port (0..31) + #[inline] + fn pin(&self) -> u8 { + self._pin() + } + + /// Port of the pin + #[inline] + fn port(&self) -> Port { + match self.pin_port() / 16 { + 0 => Port::PortA, + 1 => Port::PortB, + _ => unsafe { unreachable_unchecked() }, + } + } + + #[inline] + fn psel_bits(&self) -> u32 { + self.pin_port() as u32 + } + + /// Convert from concrete pin type PX_XX to type erased `AnyPin`. + #[inline] + fn degrade(self) -> AnyPin { + AnyPin { + pin_port: self.pin_port(), + } + } +} + +// Type-erased GPIO pin +pub struct AnyPin { + pin_port: u8, +} + +impl AnyPin { + #[inline] + pub unsafe fn steal(pin_port: u8) -> Self { + Self { pin_port } + } +} + +impl_unborrow!(AnyPin); +impl Pin for AnyPin {} +impl sealed::Pin for AnyPin { + #[inline] + fn pin_port(&self) -> u8 { + self.pin_port + } +} + +// ==================== + +pub trait OptionalPin: sealed::OptionalPin + Sized { + type Pin: Pin; + fn pin(&self) -> Option<&Self::Pin>; + fn pin_mut(&mut self) -> Option<&mut Self::Pin>; + + #[inline] + fn psel_bits(&self) -> u32 { + self.pin().map_or(1u32 << 31, |pin| Pin::psel_bits(pin)) + } + + /// Convert from concrete pin type PX_XX to type erased `Option`. + #[inline] + fn degrade_optional(mut self) -> Option { + self.pin_mut() + .map(|pin| unsafe { core::ptr::read(pin) }.degrade()) + } +} + +impl sealed::OptionalPin for T {} +impl OptionalPin for T { + type Pin = T; + + #[inline] + fn pin(&self) -> Option<&T> { + Some(self) + } + + #[inline] + fn pin_mut(&mut self) -> Option<&mut T> { + Some(self) + } +} + +// Uninhabited enum, so it's actually impossible to create a DummyPin value. +#[doc(hidden)] +pub enum DummyPin {} +impl Pin for DummyPin {} +impl sealed::Pin for DummyPin { + #[inline] + fn pin_port(&self) -> u8 { + unreachable!() + } +} + +#[derive(Clone, Copy, Debug)] +pub struct NoPin; +impl_unborrow!(NoPin); +impl sealed::OptionalPin for NoPin {} +impl OptionalPin for NoPin { + type Pin = DummyPin; + + #[inline] + fn pin(&self) -> Option<&DummyPin> { + None + } + + #[inline] + fn pin_mut(&mut self) -> Option<&mut DummyPin> { + None + } +} + +// ==================== + +macro_rules! impl_pin { + ($type:ident, $port_num:expr, $pin_num:expr) => { + impl Pin for peripherals::$type {} + impl sealed::Pin for peripherals::$type { + #[inline] + fn pin_port(&self) -> u8 { + $port_num * 16 + $pin_num + } + } + }; +} + +impl_pin!(PA0, 0, 0); +impl_pin!(PA1, 0, 1); +impl_pin!(PA2, 0, 2); +impl_pin!(PA3, 0, 3); +impl_pin!(PA4, 0, 4); +impl_pin!(PA5, 0, 5); +impl_pin!(PA6, 0, 6); +impl_pin!(PA7, 0, 7); +impl_pin!(PA8, 0, 8); +impl_pin!(PA9, 0, 9); +impl_pin!(PA10, 0, 10); +impl_pin!(PA11, 0, 11); +impl_pin!(PA12, 0, 12); +impl_pin!(PA13, 0, 13); +impl_pin!(PA14, 0, 14); +impl_pin!(PA15, 0, 15); +impl_pin!(PB0, 1, 0); +impl_pin!(PB1, 1, 1); +impl_pin!(PB2, 1, 2); +impl_pin!(PB3, 1, 3); +impl_pin!(PB4, 1, 4); +impl_pin!(PB5, 1, 5); +impl_pin!(PB6, 1, 6); +impl_pin!(PB7, 1, 7); +impl_pin!(PB8, 1, 8); +impl_pin!(PB9, 1, 9); +impl_pin!(PB10, 1, 10); +impl_pin!(PB11, 1, 11); +impl_pin!(PB12, 1, 12); +impl_pin!(PB13, 1, 13); +impl_pin!(PB14, 1, 14); +impl_pin!(PB15, 1, 15); diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 56efa461c..58a846229 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs @@ -6,395 +6,30 @@ #![feature(type_alias_impl_trait)] #![allow(incomplete_features)] -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -mod f4; - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -pub use {stm32f4xx_hal as hal, stm32f4xx_hal::stm32 as pac}; - -#[cfg(any(feature = "stm32l0x1", feature = "stm32l0x2", feature = "stm32l0x3",))] -pub use {stm32l0xx_hal as hal, stm32l0xx_hal::pac}; - pub mod fmt; -pub mod exti; -pub mod interrupt; +#[cfg_attr(feature = "f401", path = "chip/f401.rs")] +#[cfg_attr(feature = "f405", path = "chip/f405.rs")] +#[cfg_attr(feature = "f407", path = "chip/f407.rs")] +#[cfg_attr(feature = "f410", path = "chip/f410.rs")] +#[cfg_attr(feature = "f411", path = "chip/f411.rs")] +#[cfg_attr(feature = "f412", path = "chip/f412.rs")] +#[cfg_attr(feature = "f413", path = "chip/f413.rs")] +#[cfg_attr(feature = "f415", path = "chip/f415.rs")] +#[cfg_attr(feature = "f417", path = "chip/f417.rs")] +#[cfg_attr(feature = "f423", path = "chip/f423.rs")] +#[cfg_attr(feature = "f427", path = "chip/f427.rs")] +#[cfg_attr(feature = "f429", path = "chip/f429.rs")] +#[cfg_attr(feature = "f437", path = "chip/f437.rs")] +#[cfg_attr(feature = "f439", path = "chip/f439.rs")] +#[cfg_attr(feature = "f446", path = "chip/f446.rs")] +#[cfg_attr(feature = "f469", path = "chip/f469.rs")] +#[cfg_attr(feature = "f479", path = "chip/f479.rs")] +mod chip; +pub use chip::{peripherals, Peripherals}; -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -pub mod can; +pub mod gpio; +//pub mod exti; +//pub mod interrupt; -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -pub mod rtc; - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -pub use f4::{serial, spi}; - -#[cfg(any( - feature = "stm32f401", - feature = "stm32f405", - feature = "stm32f407", - feature = "stm32f410", - feature = "stm32f411", - feature = "stm32f412", - feature = "stm32f413", - feature = "stm32f415", - feature = "stm32f417", - feature = "stm32f423", - feature = "stm32f427", - feature = "stm32f429", - feature = "stm32f437", - feature = "stm32f439", - feature = "stm32f446", - feature = "stm32f469", - feature = "stm32f479", -))] -unsafe impl embassy_extras::usb::USBInterrupt for interrupt::OTG_FS {} - -use core::option::Option; -use hal::prelude::*; -use hal::rcc::Clocks; - -#[cfg(feature = "stm32f446")] -embassy_extras::std_peripherals! { - DCMI, - FMC, - DBGMCU, - DMA2, - DMA1, -// RCC, - GPIOH, - GPIOG, - GPIOF, - GPIOE, - GPIOD, - GPIOC, - GPIOB, - GPIOA, - SYSCFG, - SPI1, - SPI2, - SPI3, - SPI4, - ADC1, - ADC2, - ADC3, - USART6, - USART1, - USART2, - USART3, - DAC, - I2C3, - I2C2, - I2C1, - IWDG, - WWDG, - RTC, - UART4, - UART5, - ADC_COMMON, - TIM1, - TIM2, - TIM8, -// TIM3, - TIM4, - TIM5, - TIM9, - TIM12, - TIM10, - TIM13, - TIM14, - TIM11, - TIM6, - TIM7, - CRC, - OTG_FS_GLOBAL, - OTG_FS_HOST, - OTG_FS_DEVICE, - OTG_FS_PWRCLK, - CAN1, - CAN2, - FLASH, - EXTI, - OTG_HS_GLOBAL, - OTG_HS_HOST, - OTG_HS_DEVICE, - OTG_HS_PWRCLK, - SAI1, - SAI2, - PWR, - QUADSPI, - SPDIFRX, -// SDMMC, - HDMI_CEC, - FPU, - STK, - NVIC_STIR, - FPU_CPACR, - SCB_ACTRL, -} - -#[cfg(feature = "stm32f405")] -embassy_extras::std_peripherals! { - RNG, - DCMI, - FSMC, - DBGMCU, - DMA2, - DMA1, -// RCC, - GPIOI, - GPIOH, - GPIOG, - GPIOF, - GPIOE, - GPIOD, - GPIOC, - GPIOJ, - GPIOK, - GPIOB, - GPIOA, - SYSCFG, - SPI1, - SPI2, - SPI3, - I2S2EXT, - I2S3EXT, - SPI4, - SPI5, - SPI6, - SDIO, - ADC1, - ADC2, - ADC3, - USART6, - USART1, - USART2, - USART3, - DAC, - PWR, - I2C3, - I2C2, - I2C1, - IWDG, - WWDG, - RTC, - UART4, - UART5, - UART7, - UART8, - ADC_COMMON, - TIM1, - TIM8, - TIM2, -// TIM3, - TIM4, - TIM5, - TIM9, - TIM12, - TIM10, - TIM13, - TIM14, - TIM11, - TIM6, - TIM7, - ETHERNET_MAC, - ETHERNET_MMC, - ETHERNET_PTP, - ETHERNET_DMA, - CRC, - OTG_FS_GLOBAL, - OTG_FS_HOST, - OTG_FS_DEVICE, - OTG_FS_PWRCLK, - CAN1, - CAN2, - FLASH, - EXTI, - OTG_HS_GLOBAL, - OTG_HS_HOST, - OTG_HS_DEVICE, - OTG_HS_PWRCLK, - SAI1, - LTDC, - HASH, - CRYP, - FPU, - STK, - NVIC_STIR, - FPU_CPACR, - SCB_ACTRL, -} - -#[cfg(feature = "stm32f407")] -embassy_extras::std_peripherals! { - RNG, - DCMI, - FSMC, - DBGMCU, - DMA2, - DMA1, -// RCC, - GPIOI, - GPIOH, - GPIOG, - GPIOF, - GPIOE, - GPIOD, - GPIOC, - GPIOJ, - GPIOK, - GPIOB, - GPIOA, - SYSCFG, - SPI1, - SPI2, - SPI3, - I2S2EXT, - I2S3EXT, - SPI4, - SPI5, - SPI6, - SDIO, - ADC1, - ADC2, - ADC3, - USART6, - USART1, - USART2, - USART3, - DAC, - PWR, - I2C3, - I2C2, - I2C1, - IWDG, - WWDG, - RTC, - UART4, - UART5, - UART7, - UART8, - ADC_COMMON, - TIM1, - TIM8, - TIM2, -// TIM3, - TIM4, - TIM5, - TIM9, - TIM12, - TIM10, - TIM13, - TIM14, - TIM11, - TIM6, - TIM7, - ETHERNET_MAC, - ETHERNET_MMC, - ETHERNET_PTP, - ETHERNET_DMA, - CRC, - OTG_FS_GLOBAL, - OTG_FS_HOST, - OTG_FS_DEVICE, - OTG_FS_PWRCLK, - CAN1, - CAN2, - FLASH, - EXTI, - OTG_HS_GLOBAL, - OTG_HS_HOST, - OTG_HS_DEVICE, - OTG_HS_PWRCLK, - SAI1, - LTDC, - HASH, - CRYP, - FPU, - STK, - NVIC_STIR, - FPU_CPACR, - SCB_ACTRL, -} +pub(crate) use stm32_metapac as pac;