diff --git a/embassy-stm32/src/spi/v1.rs b/embassy-stm32/src/spi/v1.rs index 95afaa673..d1f0473cc 100644 --- a/embassy-stm32/src/spi/v1.rs +++ b/embassy-stm32/src/spi/v1.rs @@ -152,7 +152,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { // spin } unsafe { - let dr = regs.txdr().ptr() as *mut u8; + let dr = regs.dr().ptr() as *mut u8; ptr::write_volatile(dr, *word); } loop { @@ -188,7 +188,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { // spin } unsafe { - let dr = regs.txdr().ptr() as *mut u8; + let dr = regs.dr().ptr() as *mut u8; ptr::write_volatile(dr, *word); } @@ -229,7 +229,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write for Spi<'d, T> { // spin } unsafe { - let dr = regs.txdr().ptr() as *mut u16; + let dr = regs.dr().ptr() as *mut u16; ptr::write_volatile(dr, *word); } loop { @@ -265,7 +265,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> // spin } unsafe { - let dr = regs.txdr().ptr() as *mut u16; + let dr = regs.dr().ptr() as *mut u16; ptr::write_volatile(dr, *word); } while unsafe { !regs.sr().read().rxne() } { diff --git a/embassy-stm32/src/spi/v2.rs b/embassy-stm32/src/spi/v2.rs index 00ea10820..393adc4e9 100644 --- a/embassy-stm32/src/spi/v2.rs +++ b/embassy-stm32/src/spi/v2.rs @@ -220,7 +220,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> { } } unsafe { - let dr = regs.rxdr().ptr() as *const u8; + let dr = regs.dr().ptr() as *const u8; *word = ptr::read_volatile(dr); } let sr = unsafe { regs.sr().read() }; @@ -294,7 +294,7 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Transfer for Spi<'d, T> // spin waiting for inbound to shift in. } unsafe { - let dr = regs.rxdr().ptr() as *const u16; + let dr = regs.dr().ptr() as *const u16; *word = ptr::read_volatile(dr); } let sr = unsafe { regs.sr().read() };