Merge pull request #2600 from MaxiluxSystems/flash_h50
Flash support for STM32H50x [wip]
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commit
b98057d0c9
2 changed files with 126 additions and 1 deletions
124
embassy-stm32/src/flash/h50.rs
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124
embassy-stm32/src/flash/h50.rs
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/// STM32H50 series flash impl. See RM0492
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use core::{
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ptr::write_volatile,
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sync::atomic::{fence, Ordering},
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};
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use cortex_m::interrupt;
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use pac::flash::regs::Nssr;
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use pac::flash::vals::Bksel;
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use super::{Error, FlashBank, FlashRegion, FlashSector, FLASH_REGIONS, WRITE_SIZE};
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use crate::pac;
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pub(crate) const fn is_default_layout() -> bool {
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true
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}
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pub(crate) const fn get_flash_regions() -> &'static [&'static FlashRegion] {
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&FLASH_REGIONS
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}
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pub(crate) unsafe fn lock() {
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pac::FLASH.nscr().modify(|w| w.set_lock(true));
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}
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pub(crate) unsafe fn unlock() {
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while busy() {}
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if pac::FLASH.nscr().read().lock() {
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pac::FLASH.nskeyr().write_value(0x4567_0123);
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pac::FLASH.nskeyr().write_value(0xCDEF_89AB);
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}
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}
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pub(crate) unsafe fn enable_blocking_write() {
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assert_eq!(0, WRITE_SIZE % 4);
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pac::FLASH.nscr().write(|w| w.set_pg(true));
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}
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pub(crate) unsafe fn disable_blocking_write() {
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pac::FLASH.nscr().write(|w| w.set_pg(false));
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}
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pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> {
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let mut address = start_address;
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for val in buf.chunks(4) {
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write_volatile(address as *mut u32, u32::from_le_bytes(val.try_into().unwrap()));
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address += val.len() as u32;
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// prevents parallelism errors
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fence(Ordering::SeqCst);
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}
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wait_ready_blocking()
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}
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pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> {
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assert!(sector.bank != FlashBank::Otp);
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assert!(sector.index_in_bank < 8);
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while busy() {}
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interrupt::free(|_| {
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pac::FLASH.nscr().modify(|w| {
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w.set_bksel(match sector.bank {
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FlashBank::Bank1 => Bksel::B_0X0,
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FlashBank::Bank2 => Bksel::B_0X1,
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_ => unreachable!(),
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});
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w.set_snb(sector.index_in_bank);
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w.set_ser(true);
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w.set_strt(true);
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})
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});
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let ret = wait_ready_blocking();
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pac::FLASH.nscr().modify(|w| w.set_ser(false));
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ret
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}
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pub(crate) unsafe fn wait_ready_blocking() -> Result<(), Error> {
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loop {
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let sr = pac::FLASH.nssr().read();
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if !sr_busy(sr) {
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if sr.wrperr() {
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return Err(Error::Protected);
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}
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if sr.pgserr() {
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return Err(Error::Seq);
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}
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if sr.strberr() {
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// writing several times to the same byte in the write buffer
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return Err(Error::Prog);
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}
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if sr.incerr() {
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// attempting write operation before completion of previous
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// write operation
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return Err(Error::Seq);
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}
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return Ok(());
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}
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}
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}
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pub(crate) unsafe fn clear_all_err() {
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pac::FLASH.nsccr().modify(|w| {
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w.set_clr_wrperr(true);
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w.set_clr_pgserr(true);
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w.set_clr_strberr(true);
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w.set_clr_incerr(true);
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})
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}
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fn sr_busy(sr: Nssr) -> bool {
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// Note: RM0492 sometimes incorrectly refers to WBNE as NSWBNE
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sr.bsy() || sr.dbne() || sr.wbne()
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}
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fn busy() -> bool {
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let sr = pac::FLASH.nssr().read();
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sr_busy(sr)
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}
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@ -102,10 +102,11 @@ pub enum FlashBank {
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#[cfg_attr(flash_h7, path = "h7.rs")]
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#[cfg_attr(flash_h7, path = "h7.rs")]
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#[cfg_attr(flash_h7ab, path = "h7.rs")]
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#[cfg_attr(flash_h7ab, path = "h7.rs")]
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#[cfg_attr(flash_u5, path = "u5.rs")]
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#[cfg_attr(flash_u5, path = "u5.rs")]
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#[cfg_attr(flash_h50, path = "h50.rs")]
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#[cfg_attr(
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#[cfg_attr(
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not(any(
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not(any(
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flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f1, flash_f3, flash_f4, flash_f7, flash_g0,
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flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f1, flash_f3, flash_f4, flash_f7, flash_g0,
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flash_g4, flash_h7, flash_h7ab, flash_u5
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flash_g4, flash_h7, flash_h7ab, flash_u5, flash_h50
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)),
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)),
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path = "other.rs"
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path = "other.rs"
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)]
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)]
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