Update embedded-hal crates.

embassy-embedded-hal/Cargo.toml

@@ -19,8 +19,8 @@ nightly = ["embedded-hal-async", "embedded-storage-async"]
 [dependencies]
 embassy-sync = { version = "0.1.0", path = "../embassy-sync" }
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
-embedded-hal-async = { version = "=0.2.0-alpha.0", optional = true }
+embedded-hal-async = { version = "=0.2.0-alpha.1", optional = true }
 embedded-storage = "0.3.0"
 embedded-storage-async = { version = "0.4.0", optional = true }
 nb = "1.0.0"

embassy-embedded-hal/src/adapter.rs

@@ -36,27 +36,22 @@ where
     E: embedded_hal_1::i2c::Error + 'static,
     T: blocking::i2c::WriteRead<Error = E> + blocking::i2c::Read<Error = E> + blocking::i2c::Write<Error = E>,
 {
-    async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), Self::Error> {
+    async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-        self.wrapped.read(address, buffer)
+        self.wrapped.read(address, read)
     }
 
-    async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), Self::Error> {
+    async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-        self.wrapped.write(address, bytes)
+        self.wrapped.write(address, write)
     }
 
-    async fn write_read<'a>(
+    async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        &'a mut self,
+        self.wrapped.write_read(address, write, read)
+    }
+
+    async fn transaction(
+        &mut self,
         address: u8,
-        bytes: &'a [u8],
+        operations: &mut [embedded_hal_1::i2c::Operation<'_>],
-        buffer: &'a mut [u8],
-    ) -> Result<(), Self::Error> {
-        self.wrapped.write_read(address, bytes, buffer)
-    }
-
-    async fn transaction<'a, 'b>(
-        &'a mut self,
-        address: u8,
-        operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
     ) -> Result<(), Self::Error> {
         let _ = address;
         let _ = operations;

embassy-embedded-hal/src/lib.rs

@@ -1,7 +1,7 @@
 #![cfg_attr(not(feature = "std"), no_std)]
 #![cfg_attr(
     feature = "nightly",
-    feature(type_alias_impl_trait, async_fn_in_trait, impl_trait_projections)
+    feature(type_alias_impl_trait, async_fn_in_trait, impl_trait_projections, try_blocks)
 )]
 #![cfg_attr(feature = "nightly", allow(incomplete_features))]
 #![warn(missing_docs)]

embassy-embedded-hal/src/shared_bus/asynch/i2c.rs

@@ -54,35 +54,35 @@ where
     M: RawMutex + 'static,
     BUS: i2c::I2c + 'static,
 {
-    async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
+    async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
         let mut bus = self.bus.lock().await;
-        bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
+        bus.read(address, read).await.map_err(I2cDeviceError::I2c)?;
         Ok(())
     }
 
-    async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
+    async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
         let mut bus = self.bus.lock().await;
-        bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
+        bus.write(address, write).await.map_err(I2cDeviceError::I2c)?;
         Ok(())
     }
 
-    async fn write_read<'a>(
+    async fn write_read(
-        &'a mut self,
+        &mut self,
         address: u8,
-        wr_buffer: &'a [u8],
+        write: &[u8],
-        rd_buffer: &'a mut [u8],
+        read: &mut [u8],
     ) -> Result<(), I2cDeviceError<BUS::Error>> {
         let mut bus = self.bus.lock().await;
-        bus.write_read(address, wr_buffer, rd_buffer)
+        bus.write_read(address, write, read)
             .await
             .map_err(I2cDeviceError::I2c)?;
         Ok(())
     }
 
-    async fn transaction<'a, 'b>(
+    async fn transaction(
-        &'a mut self,
+        &mut self,
         address: u8,
-        operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
+        operations: &mut [embedded_hal_async::i2c::Operation<'_>],
     ) -> Result<(), I2cDeviceError<BUS::Error>> {
         let _ = address;
         let _ = operations;
@@ -121,25 +121,25 @@ where
     M: RawMutex + 'static,
     BUS: i2c::I2c + SetConfig + 'static,
 {
-    async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
+    async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
         let mut bus = self.bus.lock().await;
         bus.set_config(&self.config);
         bus.read(address, buffer).await.map_err(I2cDeviceError::I2c)?;
         Ok(())
     }
 
-    async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
+    async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), I2cDeviceError<BUS::Error>> {
         let mut bus = self.bus.lock().await;
         bus.set_config(&self.config);
         bus.write(address, bytes).await.map_err(I2cDeviceError::I2c)?;
         Ok(())
     }
 
-    async fn write_read<'a>(
+    async fn write_read(
-        &'a mut self,
+        &mut self,
         address: u8,
-        wr_buffer: &'a [u8],
+        wr_buffer: &[u8],
-        rd_buffer: &'a mut [u8],
+        rd_buffer: &mut [u8],
     ) -> Result<(), I2cDeviceError<BUS::Error>> {
         let mut bus = self.bus.lock().await;
         bus.set_config(&self.config);
@@ -149,11 +149,7 @@ where
         Ok(())
     }
 
-    async fn transaction<'a, 'b>(
+    async fn transaction(&mut self, address: u8, operations: &mut [i2c::Operation<'_>]) -> Result<(), Self::Error> {
-        &'a mut self,
-        address: u8,
-        operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
-    ) -> Result<(), I2cDeviceError<BUS::Error>> {
         let _ = address;
         let _ = operations;
         todo!()

embassy-embedded-hal/src/shared_bus/asynch/spi.rs

@@ -25,12 +25,11 @@
 //! let spi_dev2 = SpiDevice::new(spi_bus, cs_pin2);
 //! let display2 = ST7735::new(spi_dev2, dc2, rst2, Default::default(), 160, 128);
 //! ```
-use core::future::Future;
 
 use embassy_sync::blocking_mutex::raw::RawMutex;
 use embassy_sync::mutex::Mutex;
 use embedded_hal_1::digital::OutputPin;
-use embedded_hal_1::spi::ErrorType;
+use embedded_hal_1::spi::Operation;
 use embedded_hal_async::spi;
 
 use crate::shared_bus::SpiDeviceError;
@@ -57,33 +56,92 @@ where
     type Error = SpiDeviceError<BUS::Error, CS::Error>;
 }
 
-unsafe impl<M, BUS, CS> spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
+impl<M, BUS, CS> spi::SpiDeviceRead for SpiDevice<'_, M, BUS, CS>
 where
-    M: RawMutex + 'static,
+    M: RawMutex,
-    BUS: spi::SpiBusFlush + 'static,
+    BUS: spi::SpiBusRead,
     CS: OutputPin,
 {
-    type Bus = BUS;
+    async fn read_transaction(&mut self, operations: &mut [&mut [u8]]) -> Result<(), Self::Error> {
-
-    async fn transaction<R, F, Fut>(&mut self, f: F) -> Result<R, Self::Error>
-    where
-        F: FnOnce(*mut Self::Bus) -> Fut,
-        Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>>,
-    {
         let mut bus = self.bus.lock().await;
         self.cs.set_low().map_err(SpiDeviceError::Cs)?;
 
-        let f_res = f(&mut *bus).await;
+        let op_res: Result<(), BUS::Error> = try {
+            for buf in operations {
+                bus.read(buf).await?;
+            }
+        };
 
         // On failure, it's important to still flush and deassert CS.
         let flush_res = bus.flush().await;
         let cs_res = self.cs.set_high();
 
-        let f_res = f_res.map_err(SpiDeviceError::Spi)?;
+        let op_res = op_res.map_err(SpiDeviceError::Spi)?;
         flush_res.map_err(SpiDeviceError::Spi)?;
         cs_res.map_err(SpiDeviceError::Cs)?;
 
-        Ok(f_res)
+        Ok(op_res)
+    }
+}
+
+impl<M, BUS, CS> spi::SpiDeviceWrite for SpiDevice<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: spi::SpiBusWrite,
+    CS: OutputPin,
+{
+    async fn write_transaction(&mut self, operations: &[&[u8]]) -> Result<(), Self::Error> {
+        let mut bus = self.bus.lock().await;
+        self.cs.set_low().map_err(SpiDeviceError::Cs)?;
+
+        let op_res: Result<(), BUS::Error> = try {
+            for buf in operations {
+                bus.write(buf).await?;
+            }
+        };
+
+        // On failure, it's important to still flush and deassert CS.
+        let flush_res = bus.flush().await;
+        let cs_res = self.cs.set_high();
+
+        let op_res = op_res.map_err(SpiDeviceError::Spi)?;
+        flush_res.map_err(SpiDeviceError::Spi)?;
+        cs_res.map_err(SpiDeviceError::Cs)?;
+
+        Ok(op_res)
+    }
+}
+
+impl<M, BUS, CS> spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: spi::SpiBus,
+    CS: OutputPin,
+{
+    async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> {
+        let mut bus = self.bus.lock().await;
+        self.cs.set_low().map_err(SpiDeviceError::Cs)?;
+
+        let op_res: Result<(), BUS::Error> = try {
+            for op in operations {
+                match op {
+                    Operation::Read(buf) => bus.read(buf).await?,
+                    Operation::Write(buf) => bus.write(buf).await?,
+                    Operation::Transfer(read, write) => bus.transfer(read, write).await?,
+                    Operation::TransferInPlace(buf) => bus.transfer_in_place(buf).await?,
+                }
+            }
+        };
+
+        // On failure, it's important to still flush and deassert CS.
+        let flush_res = bus.flush().await;
+        let cs_res = self.cs.set_high();
+
+        let op_res = op_res.map_err(SpiDeviceError::Spi)?;
+        flush_res.map_err(SpiDeviceError::Spi)?;
+        cs_res.map_err(SpiDeviceError::Cs)?;
+
+        Ok(op_res)
     }
 }
 
@@ -114,33 +172,94 @@ where
     type Error = SpiDeviceError<BUS::Error, CS::Error>;
 }
 
-unsafe impl<M, BUS, CS> spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
+impl<M, BUS, CS> spi::SpiDeviceWrite for SpiDeviceWithConfig<'_, M, BUS, CS>
 where
-    M: RawMutex + 'static,
+    M: RawMutex,
-    BUS: spi::SpiBusFlush + SetConfig + 'static,
+    BUS: spi::SpiBusWrite + SetConfig,
     CS: OutputPin,
 {
-    type Bus = BUS;
+    async fn write_transaction(&mut self, operations: &[&[u8]]) -> Result<(), Self::Error> {
-
-    async fn transaction<R, F, Fut>(&mut self, f: F) -> Result<R, Self::Error>
-    where
-        F: FnOnce(*mut Self::Bus) -> Fut,
-        Fut: Future<Output = Result<R, <Self::Bus as ErrorType>::Error>>,
-    {
         let mut bus = self.bus.lock().await;
         bus.set_config(&self.config);
         self.cs.set_low().map_err(SpiDeviceError::Cs)?;
 
-        let f_res = f(&mut *bus).await;
+        let op_res: Result<(), BUS::Error> = try {
+            for buf in operations {
+                bus.write(buf).await?;
+            }
+        };
 
         // On failure, it's important to still flush and deassert CS.
         let flush_res = bus.flush().await;
         let cs_res = self.cs.set_high();
 
-        let f_res = f_res.map_err(SpiDeviceError::Spi)?;
+        let op_res = op_res.map_err(SpiDeviceError::Spi)?;
         flush_res.map_err(SpiDeviceError::Spi)?;
         cs_res.map_err(SpiDeviceError::Cs)?;
 
-        Ok(f_res)
+        Ok(op_res)
+    }
+}
+
+impl<M, BUS, CS> spi::SpiDeviceRead for SpiDeviceWithConfig<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: spi::SpiBusRead + SetConfig,
+    CS: OutputPin,
+{
+    async fn read_transaction(&mut self, operations: &mut [&mut [u8]]) -> Result<(), Self::Error> {
+        let mut bus = self.bus.lock().await;
+        bus.set_config(&self.config);
+        self.cs.set_low().map_err(SpiDeviceError::Cs)?;
+
+        let op_res: Result<(), BUS::Error> = try {
+            for buf in operations {
+                bus.read(buf).await?;
+            }
+        };
+
+        // On failure, it's important to still flush and deassert CS.
+        let flush_res = bus.flush().await;
+        let cs_res = self.cs.set_high();
+
+        let op_res = op_res.map_err(SpiDeviceError::Spi)?;
+        flush_res.map_err(SpiDeviceError::Spi)?;
+        cs_res.map_err(SpiDeviceError::Cs)?;
+
+        Ok(op_res)
+    }
+}
+
+impl<M, BUS, CS> spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: spi::SpiBus + SetConfig,
+    CS: OutputPin,
+{
+    async fn transaction(&mut self, operations: &mut [spi::Operation<'_, u8>]) -> Result<(), Self::Error> {
+        let mut bus = self.bus.lock().await;
+        bus.set_config(&self.config);
+        self.cs.set_low().map_err(SpiDeviceError::Cs)?;
+
+        let op_res: Result<(), BUS::Error> = try {
+            for op in operations {
+                match op {
+                    Operation::Read(buf) => bus.read(buf).await?,
+                    Operation::Write(buf) => bus.write(buf).await?,
+                    Operation::Transfer(read, write) => bus.transfer(read, write).await?,
+                    Operation::TransferInPlace(buf) => bus.transfer_in_place(buf).await?,
+                }
+            }
+        };
+
+        // On failure, it's important to still flush and deassert CS.
+        let flush_res = bus.flush().await;
+        let cs_res = self.cs.set_high();
+
+        let op_res = op_res.map_err(SpiDeviceError::Spi)?;
+        flush_res.map_err(SpiDeviceError::Spi)?;
+        cs_res.map_err(SpiDeviceError::Cs)?;
+
+        Ok(op_res)
     }
 }

embassy-embedded-hal/src/shared_bus/blocking/i2c.rs

@@ -72,34 +72,6 @@ where
         let _ = operations;
         todo!()
     }
-
-    fn write_iter<B: IntoIterator<Item = u8>>(&mut self, addr: u8, bytes: B) -> Result<(), Self::Error> {
-        let _ = addr;
-        let _ = bytes;
-        todo!()
-    }
-
-    fn write_iter_read<B: IntoIterator<Item = u8>>(
-        &mut self,
-        addr: u8,
-        bytes: B,
-        buffer: &mut [u8],
-    ) -> Result<(), Self::Error> {
-        let _ = addr;
-        let _ = bytes;
-        let _ = buffer;
-        todo!()
-    }
-
-    fn transaction_iter<'a, O: IntoIterator<Item = Operation<'a>>>(
-        &mut self,
-        address: u8,
-        operations: O,
-    ) -> Result<(), Self::Error> {
-        let _ = address;
-        let _ = operations;
-        todo!()
-    }
 }
 
 impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cDevice<'_, M, BUS>
@@ -204,32 +176,4 @@ where
         let _ = operations;
         todo!()
     }
-
-    fn write_iter<B: IntoIterator<Item = u8>>(&mut self, addr: u8, bytes: B) -> Result<(), Self::Error> {
-        let _ = addr;
-        let _ = bytes;
-        todo!()
-    }
-
-    fn write_iter_read<B: IntoIterator<Item = u8>>(
-        &mut self,
-        addr: u8,
-        bytes: B,
-        buffer: &mut [u8],
-    ) -> Result<(), Self::Error> {
-        let _ = addr;
-        let _ = bytes;
-        let _ = buffer;
-        todo!()
-    }
-
-    fn transaction_iter<'a, O: IntoIterator<Item = Operation<'a>>>(
-        &mut self,
-        address: u8,
-        operations: O,
-    ) -> Result<(), Self::Error> {
-        let _ = address;
-        let _ = operations;
-        todo!()
-    }
 }

embassy-embedded-hal/src/shared_bus/blocking/spi.rs

@@ -23,8 +23,7 @@ use core::cell::RefCell;
 use embassy_sync::blocking_mutex::raw::RawMutex;
 use embassy_sync::blocking_mutex::Mutex;
 use embedded_hal_1::digital::OutputPin;
-use embedded_hal_1::spi;
+use embedded_hal_1::spi::{self, Operation, SpiBus, SpiBusRead, SpiBusWrite};
-use embedded_hal_1::spi::SpiBusFlush;
 
 use crate::shared_bus::SpiDeviceError;
 use crate::SetConfig;
@@ -50,30 +49,85 @@ where
     type Error = SpiDeviceError<BUS::Error, CS::Error>;
 }
 
-impl<BUS, M, CS> embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
+impl<BUS, M, CS> embedded_hal_1::spi::SpiDeviceRead for SpiDevice<'_, M, BUS, CS>
 where
     M: RawMutex,
-    BUS: SpiBusFlush,
+    BUS: SpiBusRead,
     CS: OutputPin,
 {
-    type Bus = BUS;
+    fn read_transaction(&mut self, operations: &mut [&mut [u8]]) -> Result<(), Self::Error> {
-
-    fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
         self.bus.lock(|bus| {
             let mut bus = bus.borrow_mut();
             self.cs.set_low().map_err(SpiDeviceError::Cs)?;
 
-            let f_res = f(&mut bus);
+            let op_res = operations.iter_mut().try_for_each(|buf| bus.read(buf));
 
             // On failure, it's important to still flush and deassert CS.
             let flush_res = bus.flush();
             let cs_res = self.cs.set_high();
 
-            let f_res = f_res.map_err(SpiDeviceError::Spi)?;
+            let op_res = op_res.map_err(SpiDeviceError::Spi)?;
             flush_res.map_err(SpiDeviceError::Spi)?;
             cs_res.map_err(SpiDeviceError::Cs)?;
 
-            Ok(f_res)
+            Ok(op_res)
+        })
+    }
+}
+
+impl<BUS, M, CS> embedded_hal_1::spi::SpiDeviceWrite for SpiDevice<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: SpiBusWrite,
+    CS: OutputPin,
+{
+    fn write_transaction(&mut self, operations: &[&[u8]]) -> Result<(), Self::Error> {
+        self.bus.lock(|bus| {
+            let mut bus = bus.borrow_mut();
+            self.cs.set_low().map_err(SpiDeviceError::Cs)?;
+
+            let op_res = operations.iter().try_for_each(|buf| bus.write(buf));
+
+            // On failure, it's important to still flush and deassert CS.
+            let flush_res = bus.flush();
+            let cs_res = self.cs.set_high();
+
+            let op_res = op_res.map_err(SpiDeviceError::Spi)?;
+            flush_res.map_err(SpiDeviceError::Spi)?;
+            cs_res.map_err(SpiDeviceError::Cs)?;
+
+            Ok(op_res)
+        })
+    }
+}
+
+impl<BUS, M, CS> embedded_hal_1::spi::SpiDevice for SpiDevice<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: SpiBus,
+    CS: OutputPin,
+{
+    fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
+        self.bus.lock(|bus| {
+            let mut bus = bus.borrow_mut();
+            self.cs.set_low().map_err(SpiDeviceError::Cs)?;
+
+            let op_res = operations.iter_mut().try_for_each(|op| match op {
+                Operation::Read(buf) => bus.read(buf),
+                Operation::Write(buf) => bus.write(buf),
+                Operation::Transfer(read, write) => bus.transfer(read, write),
+                Operation::TransferInPlace(buf) => bus.transfer_in_place(buf),
+            });
+
+            // On failure, it's important to still flush and deassert CS.
+            let flush_res = bus.flush();
+            let cs_res = self.cs.set_high();
+
+            let op_res = op_res.map_err(SpiDeviceError::Spi)?;
+            flush_res.map_err(SpiDeviceError::Spi)?;
+            cs_res.map_err(SpiDeviceError::Cs)?;
+
+            Ok(op_res)
         })
     }
 }
@@ -89,11 +143,11 @@ where
         self.bus.lock(|bus| {
             let mut bus = bus.borrow_mut();
             self.cs.set_low().map_err(SpiDeviceError::Cs)?;
-            let f_res = bus.transfer(words);
+            let op_res = bus.transfer(words);
             let cs_res = self.cs.set_high();
-            let f_res = f_res.map_err(SpiDeviceError::Spi)?;
+            let op_res = op_res.map_err(SpiDeviceError::Spi)?;
             cs_res.map_err(SpiDeviceError::Cs)?;
-            Ok(f_res)
+            Ok(op_res)
         })
     }
 }
@@ -110,11 +164,11 @@ where
         self.bus.lock(|bus| {
             let mut bus = bus.borrow_mut();
             self.cs.set_low().map_err(SpiDeviceError::Cs)?;
-            let f_res = bus.write(words);
+            let op_res = bus.write(words);
             let cs_res = self.cs.set_high();
-            let f_res = f_res.map_err(SpiDeviceError::Spi)?;
+            let op_res = op_res.map_err(SpiDeviceError::Spi)?;
             cs_res.map_err(SpiDeviceError::Cs)?;
-            Ok(f_res)
+            Ok(op_res)
         })
     }
 }
@@ -146,30 +200,85 @@ where
     type Error = SpiDeviceError<BUS::Error, CS::Error>;
 }
 
-impl<BUS, M, CS> embedded_hal_1::spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
+impl<BUS, M, CS> embedded_hal_1::spi::SpiDeviceRead for SpiDeviceWithConfig<'_, M, BUS, CS>
 where
     M: RawMutex,
-    BUS: SpiBusFlush + SetConfig,
+    BUS: SpiBusRead + SetConfig,
     CS: OutputPin,
 {
-    type Bus = BUS;
+    fn read_transaction(&mut self, operations: &mut [&mut [u8]]) -> Result<(), Self::Error> {
-
-    fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> {
         self.bus.lock(|bus| {
             let mut bus = bus.borrow_mut();
             bus.set_config(&self.config);
             self.cs.set_low().map_err(SpiDeviceError::Cs)?;
 
-            let f_res = f(&mut bus);
+            let op_res = operations.iter_mut().try_for_each(|buf| bus.read(buf));
 
             // On failure, it's important to still flush and deassert CS.
             let flush_res = bus.flush();
             let cs_res = self.cs.set_high();
 
-            let f_res = f_res.map_err(SpiDeviceError::Spi)?;
+            let op_res = op_res.map_err(SpiDeviceError::Spi)?;
             flush_res.map_err(SpiDeviceError::Spi)?;
             cs_res.map_err(SpiDeviceError::Cs)?;
-            Ok(f_res)
+            Ok(op_res)
+        })
+    }
+}
+
+impl<BUS, M, CS> embedded_hal_1::spi::SpiDeviceWrite for SpiDeviceWithConfig<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: SpiBusWrite + SetConfig,
+    CS: OutputPin,
+{
+    fn write_transaction(&mut self, operations: &[&[u8]]) -> Result<(), Self::Error> {
+        self.bus.lock(|bus| {
+            let mut bus = bus.borrow_mut();
+            bus.set_config(&self.config);
+            self.cs.set_low().map_err(SpiDeviceError::Cs)?;
+
+            let op_res = operations.iter().try_for_each(|buf| bus.write(buf));
+
+            // On failure, it's important to still flush and deassert CS.
+            let flush_res = bus.flush();
+            let cs_res = self.cs.set_high();
+
+            let op_res = op_res.map_err(SpiDeviceError::Spi)?;
+            flush_res.map_err(SpiDeviceError::Spi)?;
+            cs_res.map_err(SpiDeviceError::Cs)?;
+            Ok(op_res)
+        })
+    }
+}
+
+impl<BUS, M, CS> embedded_hal_1::spi::SpiDevice for SpiDeviceWithConfig<'_, M, BUS, CS>
+where
+    M: RawMutex,
+    BUS: SpiBus + SetConfig,
+    CS: OutputPin,
+{
+    fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
+        self.bus.lock(|bus| {
+            let mut bus = bus.borrow_mut();
+            bus.set_config(&self.config);
+            self.cs.set_low().map_err(SpiDeviceError::Cs)?;
+
+            let op_res = operations.iter_mut().try_for_each(|op| match op {
+                Operation::Read(buf) => bus.read(buf),
+                Operation::Write(buf) => bus.write(buf),
+                Operation::Transfer(read, write) => bus.transfer(read, write),
+                Operation::TransferInPlace(buf) => bus.transfer_in_place(buf),
+            });
+
+            // On failure, it's important to still flush and deassert CS.
+            let flush_res = bus.flush();
+            let cs_res = self.cs.set_high();
+
+            let op_res = op_res.map_err(SpiDeviceError::Spi)?;
+            flush_res.map_err(SpiDeviceError::Spi)?;
+            cs_res.map_err(SpiDeviceError::Cs)?;
+            Ok(op_res)
         })
     }
 }

embassy-lora/Cargo.toml

@@ -31,8 +31,8 @@ log = { version = "0.4.14", optional = true }
 embassy-time = { version = "0.1.0", path = "../embassy-time" }
 embassy-sync = { version = "0.1.0", path = "../embassy-sync" }
 embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32", default-features = false, optional = true }
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
-embedded-hal-async = { version = "=0.2.0-alpha.0" }
+embedded-hal-async = { version = "=0.2.0-alpha.1" }
 embassy-hal-common = { version = "0.1.0", path = "../embassy-hal-common", default-features = false }
 futures = { version = "0.3.17", default-features = false, features = [ "async-await" ] }
 embedded-hal = { version = "0.2", features = ["unproven"] }

embassy-nrf/Cargo.toml

@@ -87,8 +87,8 @@ embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" }
 embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver", optional=true }
 
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9", optional = true}
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10", optional = true}
-embedded-hal-async = { version = "=0.2.0-alpha.0", optional = true}
+embedded-hal-async = { version = "=0.2.0-alpha.1", optional = true}
 embedded-io = { version = "0.4.0", features = ["async"], optional = true }
 
 defmt = { version = "0.3", optional = true }

embassy-nrf/src/twim.rs

@@ -846,20 +846,6 @@ mod eh1 {
             self.blocking_write(address, buffer)
         }
 
-        fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error>
-        where
-            B: IntoIterator<Item = u8>,
-        {
-            todo!();
-        }
-
-        fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error>
-        where
-            B: IntoIterator<Item = u8>,
-        {
-            todo!();
-        }
-
         fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
             self.blocking_write_read(address, wr_buffer, rd_buffer)
         }
@@ -871,13 +857,6 @@ mod eh1 {
         ) -> Result<(), Self::Error> {
             todo!();
         }
-
-        fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error>
-        where
-            O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
-        {
-            todo!();
-        }
     }
 }
 
@@ -885,28 +864,22 @@ mod eh1 {
 mod eha {
     use super::*;
     impl<'d, T: Instance> embedded_hal_async::i2c::I2c for Twim<'d, T> {
-        async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), Error> {
+        async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-            self.read(address, buffer).await
+            self.read(address, read).await
         }
 
-        async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), Error> {
+        async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.write(address, bytes).await
+            self.write(address, write).await
+        }
+        async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+            self.write_read(address, write, read).await
         }
 
-        async fn write_read<'a>(
+        async fn transaction(
-            &'a mut self,
+            &mut self,
             address: u8,
-            wr_buffer: &'a [u8],
+            operations: &mut [embedded_hal_1::i2c::Operation<'_>],
-            rd_buffer: &'a mut [u8],
+        ) -> Result<(), Self::Error> {
-        ) -> Result<(), Error> {
-            self.write_read(address, wr_buffer, rd_buffer).await
-        }
-
-        async fn transaction<'a, 'b>(
-            &'a mut self,
-            address: u8,
-            operations: &'a mut [embedded_hal_async::i2c::Operation<'b>],
-        ) -> Result<(), Error> {
             let _ = address;
             let _ = operations;
             todo!()

embassy-rp/Cargo.toml

@@ -65,9 +65,9 @@ rp2040-pac2 = { git = "https://github.com/embassy-rs/rp2040-pac2", rev="017e3c90
 #rp2040-pac2 = { path = "../../rp2040-pac2", features = ["rt"] }
 
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9", optional = true}
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10", optional = true}
-embedded-hal-async = { version = "=0.2.0-alpha.0", optional = true}
+embedded-hal-async = { version = "=0.2.0-alpha.1", optional = true}
-embedded-hal-nb = { version = "=1.0.0-alpha.1", optional = true}
+embedded-hal-nb = { version = "=1.0.0-alpha.2", optional = true}
 
 paste = "1.0"
 pio-proc = {version= "0.2", optional = true}

embassy-rp/src/i2c.rs

@@ -490,14 +490,14 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
         }
     }
 
-    fn read_blocking_internal(&mut self, buffer: &mut [u8], restart: bool, send_stop: bool) -> Result<(), Error> {
+    fn read_blocking_internal(&mut self, read: &mut [u8], restart: bool, send_stop: bool) -> Result<(), Error> {
-        if buffer.is_empty() {
+        if read.is_empty() {
             return Err(Error::InvalidReadBufferLength);
         }
 
         let p = T::regs();
-        let lastindex = buffer.len() - 1;
+        let lastindex = read.len() - 1;
-        for (i, byte) in buffer.iter_mut().enumerate() {
+        for (i, byte) in read.iter_mut().enumerate() {
             let first = i == 0;
             let last = i == lastindex;
 
@@ -524,15 +524,15 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
         Ok(())
     }
 
-    fn write_blocking_internal(&mut self, bytes: &[u8], send_stop: bool) -> Result<(), Error> {
+    fn write_blocking_internal(&mut self, write: &[u8], send_stop: bool) -> Result<(), Error> {
-        if bytes.is_empty() {
+        if write.is_empty() {
             return Err(Error::InvalidWriteBufferLength);
         }
 
         let p = T::regs();
 
-        for (i, byte) in bytes.iter().enumerate() {
+        for (i, byte) in write.iter().enumerate() {
-            let last = i == bytes.len() - 1;
+            let last = i == write.len() - 1;
 
             // NOTE(unsafe) We have &mut self
             unsafe {
@@ -572,21 +572,21 @@ impl<'d, T: Instance + 'd, M: Mode> I2c<'d, T, M> {
     // Blocking public API
     // =========================
 
-    pub fn blocking_read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Error> {
         Self::setup(address.into())?;
-        self.read_blocking_internal(buffer, true, true)
+        self.read_blocking_internal(read, true, true)
         // Automatic Stop
     }
 
-    pub fn blocking_write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Error> {
+    pub fn blocking_write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> {
         Self::setup(address.into())?;
-        self.write_blocking_internal(bytes, true)
+        self.write_blocking_internal(write, true)
     }
 
-    pub fn blocking_write_read(&mut self, address: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
         Self::setup(address.into())?;
-        self.write_blocking_internal(bytes, false)?;
+        self.write_blocking_internal(write, false)?;
-        self.read_blocking_internal(buffer, true, true)
+        self.read_blocking_internal(read, true, true)
         // Automatic Stop
     }
 }
@@ -644,48 +644,22 @@ mod eh1 {
     }
 
     impl<'d, T: Instance, M: Mode> embedded_hal_1::i2c::I2c for I2c<'d, T, M> {
-        fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+        fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_read(address, buffer)
+            self.blocking_read(address, read)
         }
 
-        fn write(&mut self, address: u8, buffer: &[u8]) -> Result<(), Self::Error> {
+        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.blocking_write(address, buffer)
+            self.blocking_write(address, write)
         }
 
-        fn write_iter<B>(&mut self, address: u8, bytes: B) -> Result<(), Self::Error>
+        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        where
+            self.blocking_write_read(address, write, read)
-            B: IntoIterator<Item = u8>,
-        {
-            let mut peekable = bytes.into_iter().peekable();
-            Self::setup(address.into())?;
-
-            while let Some(tx) = peekable.next() {
-                self.write_blocking_internal(&[tx], peekable.peek().is_none())?;
-            }
-            Ok(())
         }
 
-        fn write_iter_read<B>(&mut self, address: u8, bytes: B, buffer: &mut [u8]) -> Result<(), Self::Error>
+        fn transaction(
-        where
-            B: IntoIterator<Item = u8>,
-        {
-            let peekable = bytes.into_iter().peekable();
-            Self::setup(address.into())?;
-
-            for tx in peekable {
-                self.write_blocking_internal(&[tx], false)?
-            }
-            self.read_blocking_internal(buffer, true, true)
-        }
-
-        fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_write_read(address, wr_buffer, rd_buffer)
-        }
-
-        fn transaction<'a>(
             &mut self,
             address: u8,
-            operations: &mut [embedded_hal_1::i2c::Operation<'a>],
+            operations: &mut [embedded_hal_1::i2c::Operation<'_>],
         ) -> Result<(), Self::Error> {
             Self::setup(address.into())?;
             for i in 0..operations.len() {
@@ -697,22 +671,6 @@ mod eh1 {
             }
             Ok(())
         }
-
-        fn transaction_iter<'a, O>(&mut self, address: u8, operations: O) -> Result<(), Self::Error>
-        where
-            O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
-        {
-            Self::setup(address.into())?;
-            let mut peekable = operations.into_iter().peekable();
-            while let Some(operation) = peekable.next() {
-                let last = peekable.peek().is_none();
-                match operation {
-                    embedded_hal_1::i2c::Operation::Read(buf) => self.read_blocking_internal(buf, false, last)?,
-                    embedded_hal_1::i2c::Operation::Write(buf) => self.write_blocking_internal(buf, last)?,
-                }
-            }
-            Ok(())
-        }
     }
 }
 #[cfg(all(feature = "unstable-traits", feature = "nightly"))]
@@ -727,36 +685,29 @@ mod nightly {
         A: AddressMode + Into<u16> + 'static,
         T: Instance + 'd,
     {
-        async fn read<'a>(&'a mut self, address: A, read: &'a mut [u8]) -> Result<(), Self::Error> {
+        async fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
             let addr: u16 = address.into();
 
             Self::setup(addr)?;
             self.read_async_internal(read, false, true).await
         }
 
-        async fn write<'a>(&'a mut self, address: A, write: &'a [u8]) -> Result<(), Self::Error> {
+        async fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
             let addr: u16 = address.into();
 
             Self::setup(addr)?;
             self.write_async_internal(write.iter().copied(), true).await
         }
-        async fn write_read<'a>(
+
-            &'a mut self,
+        async fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-            address: A,
-            write: &'a [u8],
-            read: &'a mut [u8],
-        ) -> Result<(), Self::Error> {
             let addr: u16 = address.into();
 
             Self::setup(addr)?;
             self.write_async_internal(write.iter().cloned(), false).await?;
             self.read_async_internal(read, false, true).await
         }
-        async fn transaction<'a, 'b>(
+
-            &'a mut self,
+        async fn transaction(&mut self, address: A, operations: &mut [Operation<'_>]) -> Result<(), Self::Error> {
-            address: A,
-            operations: &'a mut [Operation<'b>],
-        ) -> Result<(), Self::Error> {
             let addr: u16 = address.into();
 
             let mut iterator = operations.iter_mut();

embassy-rp/src/spi.rs

@@ -19,6 +19,7 @@ pub enum Error {
 }
 
 #[non_exhaustive]
+#[derive(Clone)]
 pub struct Config {
     pub frequency: u32,
     pub phase: Phase,

embassy-stm32/Cargo.toml

@@ -44,9 +44,9 @@ embassy-net-driver = { version = "0.1.0", path = "../embassy-net-driver" }
 embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver", optional = true }
 
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9", optional = true}
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10", optional = true}
-embedded-hal-async = { version = "=0.2.0-alpha.0", optional = true}
+embedded-hal-async = { version = "=0.2.0-alpha.1", optional = true}
-embedded-hal-nb = { version = "=1.0.0-alpha.1", optional = true}
+embedded-hal-nb = { version = "=1.0.0-alpha.2", optional = true}
 
 embedded-storage = "0.3.0"
 

embassy-stm32/src/i2c/timeout.rs

@@ -28,64 +28,64 @@ impl<'d, T: Instance, TXDMA, RXDMA> TimeoutI2c<'d, T, TXDMA, RXDMA> {
     }
 
     /// Blocking read with a custom timeout
-    pub fn blocking_read_timeout(&mut self, addr: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error> {
+    pub fn blocking_read_timeout(&mut self, addr: u8, read: &mut [u8], timeout: Duration) -> Result<(), Error> {
-        self.i2c.blocking_read_timeout(addr, buffer, timeout_fn(timeout))
+        self.i2c.blocking_read_timeout(addr, read, timeout_fn(timeout))
     }
 
     /// Blocking read with default timeout, provided in [`TimeoutI2c::new()`]
-    pub fn blocking_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Error> {
-        self.blocking_read_timeout(addr, buffer, self.timeout)
+        self.blocking_read_timeout(addr, read, self.timeout)
     }
 
     /// Blocking write with a custom timeout
-    pub fn blocking_write_timeout(&mut self, addr: u8, bytes: &[u8], timeout: Duration) -> Result<(), Error> {
+    pub fn blocking_write_timeout(&mut self, addr: u8, write: &[u8], timeout: Duration) -> Result<(), Error> {
-        self.i2c.blocking_write_timeout(addr, bytes, timeout_fn(timeout))
+        self.i2c.blocking_write_timeout(addr, write, timeout_fn(timeout))
     }
 
     /// Blocking write with default timeout, provided in [`TimeoutI2c::new()`]
-    pub fn blocking_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
+    pub fn blocking_write(&mut self, addr: u8, write: &[u8]) -> Result<(), Error> {
-        self.blocking_write_timeout(addr, bytes, self.timeout)
+        self.blocking_write_timeout(addr, write, self.timeout)
     }
 
     /// Blocking write-read with a custom timeout
     pub fn blocking_write_read_timeout(
         &mut self,
         addr: u8,
-        bytes: &[u8],
+        write: &[u8],
-        buffer: &mut [u8],
+        read: &mut [u8],
         timeout: Duration,
     ) -> Result<(), Error> {
         self.i2c
-            .blocking_write_read_timeout(addr, bytes, buffer, timeout_fn(timeout))
+            .blocking_write_read_timeout(addr, write, read, timeout_fn(timeout))
     }
 
     /// Blocking write-read with default timeout, provided in [`TimeoutI2c::new()`]
-    pub fn blocking_write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
-        self.blocking_write_read_timeout(addr, bytes, buffer, self.timeout)
+        self.blocking_write_read_timeout(addr, write, read, self.timeout)
     }
 }
 
 impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Read for TimeoutI2c<'d, T, TXDMA, RXDMA> {
     type Error = Error;
 
-    fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+    fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_read(addr, buffer)
+        self.blocking_read(addr, read)
     }
 }
 
 impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Write for TimeoutI2c<'d, T, TXDMA, RXDMA> {
     type Error = Error;
 
-    fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> {
+    fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
-        self.blocking_write(addr, bytes)
+        self.blocking_write(addr, write)
     }
 }
 
 impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::WriteRead for TimeoutI2c<'d, T, TXDMA, RXDMA> {
     type Error = Error;
 
-    fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> {
+    fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_write_read(addr, bytes, buffer)
+        self.blocking_write_read(addr, write, read)
     }
 }
 
@@ -98,45 +98,24 @@ mod eh1 {
     }
 
     impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::I2c for TimeoutI2c<'d, T, TXDMA, RXDMA> {
-        fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+        fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_read(address, buffer)
+            self.blocking_read(address, read)
         }
 
-        fn write(&mut self, address: u8, buffer: &[u8]) -> Result<(), Self::Error> {
+        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.blocking_write(address, buffer)
+            self.blocking_write(address, write)
         }
 
-        fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error>
+        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        where
+            self.blocking_write_read(address, write, read)
-            B: IntoIterator<Item = u8>,
-        {
-            todo!();
         }
 
-        fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error>
+        fn transaction(
-        where
-            B: IntoIterator<Item = u8>,
-        {
-            todo!();
-        }
-
-        fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_write_read(address, wr_buffer, rd_buffer)
-        }
-
-        fn transaction<'a>(
             &mut self,
             _address: u8,
-            _operations: &mut [embedded_hal_1::i2c::Operation<'a>],
+            _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
         ) -> Result<(), Self::Error> {
             todo!();
         }
-
-        fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error>
-        where
-            O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
-        {
-            todo!();
-        }
     }
 }

embassy-stm32/src/i2c/v1.rs

@@ -307,18 +307,18 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         }
     }
 
-    pub fn blocking_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Error> {
-        self.blocking_read_timeout(addr, buffer, || Ok(()))
+        self.blocking_read_timeout(addr, read, || Ok(()))
     }
 
     pub fn blocking_write_timeout(
         &mut self,
         addr: u8,
-        bytes: &[u8],
+        write: &[u8],
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
         unsafe {
-            self.write_bytes(addr, bytes, &check_timeout)?;
+            self.write_bytes(addr, write, &check_timeout)?;
             // Send a STOP condition
             T::regs().cr1().modify(|reg| reg.set_stop(true));
             // Wait for STOP condition to transmit.
@@ -331,49 +331,49 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         Ok(())
     }
 
-    pub fn blocking_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
+    pub fn blocking_write(&mut self, addr: u8, write: &[u8]) -> Result<(), Error> {
-        self.blocking_write_timeout(addr, bytes, || Ok(()))
+        self.blocking_write_timeout(addr, write, || Ok(()))
     }
 
     pub fn blocking_write_read_timeout(
         &mut self,
         addr: u8,
-        bytes: &[u8],
+        write: &[u8],
-        buffer: &mut [u8],
+        read: &mut [u8],
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        unsafe { self.write_bytes(addr, bytes, &check_timeout)? };
+        unsafe { self.write_bytes(addr, write, &check_timeout)? };
-        self.blocking_read_timeout(addr, buffer, &check_timeout)?;
+        self.blocking_read_timeout(addr, read, &check_timeout)?;
 
         Ok(())
     }
 
-    pub fn blocking_write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
-        self.blocking_write_read_timeout(addr, bytes, buffer, || Ok(()))
+        self.blocking_write_read_timeout(addr, write, read, || Ok(()))
     }
 }
 
 impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> {
     type Error = Error;
 
-    fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+    fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_read(addr, buffer)
+        self.blocking_read(addr, read)
     }
 }
 
 impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> {
     type Error = Error;
 
-    fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> {
+    fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
-        self.blocking_write(addr, bytes)
+        self.blocking_write(addr, write)
     }
 }
 
 impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> {
     type Error = Error;
 
-    fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> {
+    fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_write_read(addr, bytes, buffer)
+        self.blocking_write_read(addr, write, read)
     }
 }
 
@@ -402,46 +402,25 @@ mod eh1 {
     }
 
     impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T> {
-        fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+        fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_read(address, buffer)
+            self.blocking_read(address, read)
         }
 
-        fn write(&mut self, address: u8, buffer: &[u8]) -> Result<(), Self::Error> {
+        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.blocking_write(address, buffer)
+            self.blocking_write(address, write)
         }
 
-        fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error>
+        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        where
+            self.blocking_write_read(address, write, read)
-            B: IntoIterator<Item = u8>,
-        {
-            todo!();
         }
 
-        fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error>
+        fn transaction(
-        where
-            B: IntoIterator<Item = u8>,
-        {
-            todo!();
-        }
-
-        fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_write_read(address, wr_buffer, rd_buffer)
-        }
-
-        fn transaction<'a>(
             &mut self,
             _address: u8,
-            _operations: &mut [embedded_hal_1::i2c::Operation<'a>],
+            _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
         ) -> Result<(), Self::Error> {
             todo!();
         }
-
-        fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error>
-        where
-            O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
-        {
-            todo!();
-        }
     }
 }
 

embassy-stm32/src/i2c/v2.rs

@@ -345,12 +345,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     fn read_internal(
         &mut self,
         address: u8,
-        buffer: &mut [u8],
+        read: &mut [u8],
         restart: bool,
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        let completed_chunks = buffer.len() / 255;
+        let completed_chunks = read.len() / 255;
-        let total_chunks = if completed_chunks * 255 == buffer.len() {
+        let total_chunks = if completed_chunks * 255 == read.len() {
             completed_chunks
         } else {
             completed_chunks + 1
@@ -360,7 +360,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         unsafe {
             Self::master_read(
                 address,
-                buffer.len().min(255),
+                read.len().min(255),
                 Stop::Automatic,
                 last_chunk_idx != 0,
                 restart,
@@ -368,7 +368,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
             )?;
         }
 
-        for (number, chunk) in buffer.chunks_mut(255).enumerate() {
+        for (number, chunk) in read.chunks_mut(255).enumerate() {
             if number != 0 {
                 // NOTE(unsafe) We have &mut self
                 unsafe {
@@ -391,12 +391,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     fn write_internal(
         &mut self,
         address: u8,
-        bytes: &[u8],
+        write: &[u8],
         send_stop: bool,
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        let completed_chunks = bytes.len() / 255;
+        let completed_chunks = write.len() / 255;
-        let total_chunks = if completed_chunks * 255 == bytes.len() {
+        let total_chunks = if completed_chunks * 255 == write.len() {
             completed_chunks
         } else {
             completed_chunks + 1
@@ -410,14 +410,14 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         unsafe {
             Self::master_write(
                 address,
-                bytes.len().min(255),
+                write.len().min(255),
                 Stop::Software,
                 last_chunk_idx != 0,
                 &check_timeout,
             )?;
         }
 
-        for (number, chunk) in bytes.chunks(255).enumerate() {
+        for (number, chunk) in write.chunks(255).enumerate() {
             if number != 0 {
                 // NOTE(unsafe) We have &mut self
                 unsafe {
@@ -448,7 +448,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     async fn write_dma_internal(
         &mut self,
         address: u8,
-        bytes: &[u8],
+        write: &[u8],
         first_slice: bool,
         last_slice: bool,
         check_timeout: impl Fn() -> Result<(), Error>,
@@ -456,7 +456,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     where
         TXDMA: crate::i2c::TxDma<T>,
     {
-        let total_len = bytes.len();
+        let total_len = write.len();
         let completed_chunks = total_len / 255;
         let total_chunks = if completed_chunks * 255 == total_len {
             completed_chunks
@@ -476,7 +476,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
 
             let ch = &mut self.tx_dma;
             let request = ch.request();
-            crate::dma::write(ch, request, bytes, dst)
+            crate::dma::write(ch, request, write, dst)
         };
 
         let state = T::state();
@@ -641,25 +641,25 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     // =========================
     //  Async public API
 
-    pub async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Error>
+    pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
     where
         TXDMA: crate::i2c::TxDma<T>,
     {
-        if bytes.is_empty() {
+        if write.is_empty() {
-            self.write_internal(address, bytes, true, || Ok(()))
+            self.write_internal(address, write, true, || Ok(()))
         } else {
-            self.write_dma_internal(address, bytes, true, true, || Ok(())).await
+            self.write_dma_internal(address, write, true, true, || Ok(())).await
         }
     }
 
-    pub async fn write_vectored(&mut self, address: u8, bytes: &[&[u8]]) -> Result<(), Error>
+    pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
     where
         TXDMA: crate::i2c::TxDma<T>,
     {
-        if bytes.is_empty() {
+        if write.is_empty() {
             return Err(Error::ZeroLengthTransfer);
         }
-        let mut iter = bytes.iter();
+        let mut iter = write.iter();
 
         let mut first = true;
         let mut current = iter.next();
@@ -685,21 +685,21 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         }
     }
 
-    pub async fn write_read(&mut self, address: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error>
+    pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
     where
         TXDMA: super::TxDma<T>,
         RXDMA: super::RxDma<T>,
     {
-        if bytes.is_empty() {
+        if write.is_empty() {
-            self.write_internal(address, bytes, false, || Ok(()))?;
+            self.write_internal(address, write, false, || Ok(()))?;
         } else {
-            self.write_dma_internal(address, bytes, true, true, || Ok(())).await?;
+            self.write_dma_internal(address, write, true, true, || Ok(())).await?;
         }
 
-        if buffer.is_empty() {
+        if read.is_empty() {
-            self.read_internal(address, buffer, true, || Ok(()))?;
+            self.read_internal(address, read, true, || Ok(()))?;
         } else {
-            self.read_dma_internal(address, buffer, true, || Ok(())).await?;
+            self.read_dma_internal(address, read, true, || Ok(())).await?;
         }
 
         Ok(())
@@ -711,57 +711,57 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
     pub fn blocking_read_timeout(
         &mut self,
         address: u8,
-        buffer: &mut [u8],
+        read: &mut [u8],
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        self.read_internal(address, buffer, false, &check_timeout)
+        self.read_internal(address, read, false, &check_timeout)
         // Automatic Stop
     }
 
-    pub fn blocking_read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Error> {
-        self.blocking_read_timeout(address, buffer, || Ok(()))
+        self.blocking_read_timeout(address, read, || Ok(()))
     }
 
     pub fn blocking_write_timeout(
         &mut self,
         address: u8,
-        bytes: &[u8],
+        write: &[u8],
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        self.write_internal(address, bytes, true, &check_timeout)
+        self.write_internal(address, write, true, &check_timeout)
     }
 
-    pub fn blocking_write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Error> {
+    pub fn blocking_write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> {
-        self.blocking_write_timeout(address, bytes, || Ok(()))
+        self.blocking_write_timeout(address, write, || Ok(()))
     }
 
     pub fn blocking_write_read_timeout(
         &mut self,
         address: u8,
-        bytes: &[u8],
+        write: &[u8],
-        buffer: &mut [u8],
+        read: &mut [u8],
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        self.write_internal(address, bytes, false, &check_timeout)?;
+        self.write_internal(address, write, false, &check_timeout)?;
-        self.read_internal(address, buffer, true, &check_timeout)
+        self.read_internal(address, read, true, &check_timeout)
         // Automatic Stop
     }
 
-    pub fn blocking_write_read(&mut self, address: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
-        self.blocking_write_read_timeout(address, bytes, buffer, || Ok(()))
+        self.blocking_write_read_timeout(address, write, read, || Ok(()))
     }
 
     pub fn blocking_write_vectored_timeout(
         &mut self,
         address: u8,
-        bytes: &[&[u8]],
+        write: &[&[u8]],
         check_timeout: impl Fn() -> Result<(), Error>,
     ) -> Result<(), Error> {
-        if bytes.is_empty() {
+        if write.is_empty() {
             return Err(Error::ZeroLengthTransfer);
         }
-        let first_length = bytes[0].len();
+        let first_length = write[0].len();
-        let last_slice_index = bytes.len() - 1;
+        let last_slice_index = write.len() - 1;
 
         // NOTE(unsafe) We have &mut self
         unsafe {
@@ -774,7 +774,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
             )?;
         }
 
-        for (idx, slice) in bytes.iter().enumerate() {
+        for (idx, slice) in write.iter().enumerate() {
             let slice_len = slice.len();
             let completed_chunks = slice_len / 255;
             let total_chunks = if completed_chunks * 255 == slice_len {
@@ -828,8 +828,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
         Ok(())
     }
 
-    pub fn blocking_write_vectored(&mut self, address: u8, bytes: &[&[u8]]) -> Result<(), Error> {
+    pub fn blocking_write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error> {
-        self.blocking_write_vectored_timeout(address, bytes, || Ok(()))
+        self.blocking_write_vectored_timeout(address, write, || Ok(()))
     }
 }
 
@@ -847,16 +847,16 @@ mod eh02 {
     impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> {
         type Error = Error;
 
-        fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
+        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.blocking_write(address, bytes)
+            self.blocking_write(address, write)
         }
     }
 
     impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> {
         type Error = Error;
 
-        fn write_read(&mut self, address: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> {
+        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_write_read(address, bytes, buffer)
+            self.blocking_write_read(address, write, read)
         }
     }
 }
@@ -1010,46 +1010,25 @@ mod eh1 {
     }
 
     impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> {
-        fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+        fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_read(address, buffer)
+            self.blocking_read(address, read)
         }
 
-        fn write(&mut self, address: u8, buffer: &[u8]) -> Result<(), Self::Error> {
+        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.blocking_write(address, buffer)
+            self.blocking_write(address, write)
         }
 
-        fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error>
+        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        where
+            self.blocking_write_read(address, write, read)
-            B: IntoIterator<Item = u8>,
-        {
-            todo!();
         }
 
-        fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error>
+        fn transaction(
-        where
-            B: IntoIterator<Item = u8>,
-        {
-            todo!();
-        }
-
-        fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_write_read(address, wr_buffer, rd_buffer)
-        }
-
-        fn transaction<'a>(
             &mut self,
             _address: u8,
-            _operations: &mut [embedded_hal_1::i2c::Operation<'a>],
+            _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
         ) -> Result<(), Self::Error> {
             todo!();
         }
-
-        fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error>
-        where
-            O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
-        {
-            todo!();
-        }
     }
 }
 
@@ -1059,27 +1038,22 @@ mod eha {
     use super::*;
 
     impl<'d, T: Instance, TXDMA: TxDma<T>, RXDMA: RxDma<T>> embedded_hal_async::i2c::I2c for I2c<'d, T, TXDMA, RXDMA> {
-        async fn read<'a>(&'a mut self, address: u8, read: &'a mut [u8]) -> Result<(), Self::Error> {
+        async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
             self.read(address, read).await
         }
 
-        async fn write<'a>(&'a mut self, address: u8, write: &'a [u8]) -> Result<(), Self::Error> {
+        async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
             self.write(address, write).await
         }
 
-        async fn write_read<'a>(
+        async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-            &'a mut self,
-            address: u8,
-            write: &'a [u8],
-            read: &'a mut [u8],
-        ) -> Result<(), Self::Error> {
             self.write_read(address, write, read).await
         }
 
-        async fn transaction<'a, 'b>(
+        async fn transaction(
-            &'a mut self,
+            &mut self,
             address: u8,
-            operations: &'a mut [embedded_hal_1::i2c::Operation<'b>],
+            operations: &mut [embedded_hal_1::i2c::Operation<'_>],
         ) -> Result<(), Self::Error> {
             let _ = address;
             let _ = operations;

embassy-time/Cargo.toml

@@ -152,8 +152,8 @@ defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
 
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6" }
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9", optional = true}
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10", optional = true}
-embedded-hal-async = { version = "=0.2.0-alpha.0", optional = true}
+embedded-hal-async = { version = "=0.2.0-alpha.1", optional = true}
 
 futures-util = { version = "0.3.17", default-features = false }
 embassy-sync = { version = "0.1", path = "../embassy-sync" }

embassy-time/src/delay.rs

@@ -19,14 +19,12 @@ mod eh1 {
     use super::*;
 
     impl embedded_hal_1::delay::DelayUs for Delay {
-        type Error = core::convert::Infallible;
+        fn delay_us(&mut self, us: u32) {
-
+            block_for(Duration::from_micros(us as u64))
-        fn delay_us(&mut self, us: u32) -> Result<(), Self::Error> {
-            Ok(block_for(Duration::from_micros(us as u64)))
         }
 
-        fn delay_ms(&mut self, ms: u32) -> Result<(), Self::Error> {
+        fn delay_ms(&mut self, ms: u32) {
-            Ok(block_for(Duration::from_millis(ms as u64)))
+            block_for(Duration::from_millis(ms as u64))
         }
     }
 }
@@ -37,14 +35,12 @@ mod eha {
     use crate::Timer;
 
     impl embedded_hal_async::delay::DelayUs for Delay {
-        type Error = core::convert::Infallible;
+        async fn delay_us(&mut self, micros: u32) {
-
+            Timer::after(Duration::from_micros(micros as _)).await
-        async fn delay_us(&mut self, micros: u32) -> Result<(), Self::Error> {
-            Ok(Timer::after(Duration::from_micros(micros as _)).await)
         }
 
-        async fn delay_ms(&mut self, millis: u32) -> Result<(), Self::Error> {
+        async fn delay_ms(&mut self, millis: u32) {
-            Ok(Timer::after(Duration::from_millis(millis as _)).await)
+            Timer::after(Duration::from_millis(millis as _)).await
         }
     }
 }

examples/rp/.cargo/config.toml

@@ -1,5 +1,5 @@
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
-runner = "probe-run --chip RP2040"
+runner = "probe-rs-cli run --chip RP2040"
 
 [build]
 target = "thumbv6m-none-eabi"        # Cortex-M0 and Cortex-M0+

examples/rp/Cargo.toml

@@ -6,6 +6,7 @@ license = "MIT OR Apache-2.0"
 
 
 [dependencies]
+embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal", features = ["defmt"] }
 embassy-sync = { version = "0.1.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
 embassy-time = { version = "0.1.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime"] }
@@ -30,8 +31,8 @@ display-interface = "0.4.1"
 byte-slice-cast = { version = "1.2.0", default-features = false }
 smart-leds = "0.3.0"
 
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
-embedded-hal-async = "0.2.0-alpha.0"
+embedded-hal-async = "0.2.0-alpha.1"
 embedded-io = { version = "0.4.0", features = ["async", "defmt"] }
 embedded-storage = { version = "0.3" }
 static_cell = "1.0.0"

examples/rp/src/bin/spi_display.rs

@@ -5,10 +5,13 @@
 use core::cell::RefCell;
 
 use defmt::*;
+use embassy_embedded_hal::shared_bus::blocking::spi::SpiDeviceWithConfig;
 use embassy_executor::Spawner;
 use embassy_rp::gpio::{Level, Output};
 use embassy_rp::spi;
 use embassy_rp::spi::{Blocking, Spi};
+use embassy_sync::blocking_mutex::raw::NoopRawMutex;
+use embassy_sync::blocking_mutex::Mutex;
 use embassy_time::Delay;
 use embedded_graphics::image::{Image, ImageRawLE};
 use embedded_graphics::mono_font::ascii::FONT_10X20;
@@ -21,10 +24,9 @@ use st7789::{Orientation, ST7789};
 use {defmt_rtt as _, panic_probe as _};
 
 use crate::my_display_interface::SPIDeviceInterface;
-use crate::shared_spi::SpiDeviceWithCs;
 use crate::touch::Touch;
 
-//const DISPLAY_FREQ: u32 = 64_000_000;
+const DISPLAY_FREQ: u32 = 64_000_000;
 const TOUCH_FREQ: u32 = 200_000;
 
 #[embassy_executor::main]
@@ -43,16 +45,20 @@ async fn main(_spawner: Spawner) {
     //let touch_irq = p.PIN_17;
 
     // create SPI
-    let mut config = spi::Config::default();
+    let mut display_config = spi::Config::default();
-    config.frequency = TOUCH_FREQ; // use the lowest freq
+    display_config.frequency = DISPLAY_FREQ;
-    config.phase = spi::Phase::CaptureOnSecondTransition;
+    display_config.phase = spi::Phase::CaptureOnSecondTransition;
-    config.polarity = spi::Polarity::IdleHigh;
+    display_config.polarity = spi::Polarity::IdleHigh;
+    let mut touch_config = spi::Config::default();
+    touch_config.frequency = TOUCH_FREQ;
+    touch_config.phase = spi::Phase::CaptureOnSecondTransition;
+    touch_config.polarity = spi::Polarity::IdleHigh;
 
-    let spi: Spi<'_, _, Blocking> = Spi::new_blocking(p.SPI1, clk, mosi, miso, config);
+    let spi: Spi<'_, _, Blocking> = Spi::new_blocking(p.SPI1, clk, mosi, miso, touch_config.clone());
-    let spi_bus = RefCell::new(spi);
+    let spi_bus: Mutex<NoopRawMutex, _> = Mutex::new(RefCell::new(spi));
 
-    let display_spi = SpiDeviceWithCs::new(&spi_bus, Output::new(display_cs, Level::High));
+    let display_spi = SpiDeviceWithConfig::new(&spi_bus, Output::new(display_cs, Level::High), display_config);
-    let touch_spi = SpiDeviceWithCs::new(&spi_bus, Output::new(touch_cs, Level::High));
+    let touch_spi = SpiDeviceWithConfig::new(&spi_bus, Output::new(touch_cs, Level::High), touch_config);
 
     let mut touch = Touch::new(touch_spi);
 
@@ -104,85 +110,9 @@ async fn main(_spawner: Spawner) {
     }
 }
 
-mod shared_spi {
-    use core::cell::RefCell;
-    use core::fmt::Debug;
-
-    use embedded_hal_1::digital::OutputPin;
-    use embedded_hal_1::spi;
-    use embedded_hal_1::spi::SpiDevice;
-
-    #[derive(Copy, Clone, Eq, PartialEq, Debug)]
-    pub enum SpiDeviceWithCsError<BUS, CS> {
-        #[allow(unused)] // will probably use in the future when adding a flush() to SpiBus
-        Spi(BUS),
-        Cs(CS),
-    }
-
-    impl<BUS, CS> spi::Error for SpiDeviceWithCsError<BUS, CS>
-    where
-        BUS: spi::Error + Debug,
-        CS: Debug,
-    {
-        fn kind(&self) -> spi::ErrorKind {
-            match self {
-                Self::Spi(e) => e.kind(),
-                Self::Cs(_) => spi::ErrorKind::Other,
-            }
-        }
-    }
-
-    pub struct SpiDeviceWithCs<'a, BUS, CS> {
-        bus: &'a RefCell<BUS>,
-        cs: CS,
-    }
-
-    impl<'a, BUS, CS> SpiDeviceWithCs<'a, BUS, CS> {
-        pub fn new(bus: &'a RefCell<BUS>, cs: CS) -> Self {
-            Self { bus, cs }
-        }
-    }
-
-    impl<'a, BUS, CS> spi::ErrorType for SpiDeviceWithCs<'a, BUS, CS>
-    where
-        BUS: spi::ErrorType,
-        CS: OutputPin,
-    {
-        type Error = SpiDeviceWithCsError<BUS::Error, CS::Error>;
-    }
-
-    impl<'a, BUS, CS> SpiDevice for SpiDeviceWithCs<'a, BUS, CS>
-    where
-        BUS: spi::SpiBusFlush,
-        CS: OutputPin,
-    {
-        type Bus = BUS;
-
-        fn transaction<R>(
-            &mut self,
-            f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>,
-        ) -> Result<R, Self::Error> {
-            let mut bus = self.bus.borrow_mut();
-            self.cs.set_low().map_err(SpiDeviceWithCsError::Cs)?;
-
-            let f_res = f(&mut bus);
-
-            // On failure, it's important to still flush and deassert CS.
-            let flush_res = bus.flush();
-            let cs_res = self.cs.set_high();
-
-            let f_res = f_res.map_err(SpiDeviceWithCsError::Spi)?;
-            flush_res.map_err(SpiDeviceWithCsError::Spi)?;
-            cs_res.map_err(SpiDeviceWithCsError::Cs)?;
-
-            Ok(f_res)
-        }
-    }
-}
-
 /// Driver for the XPT2046 resistive touchscreen sensor
 mod touch {
-    use embedded_hal_1::spi::{SpiBus, SpiBusRead, SpiBusWrite, SpiDevice};
+    use embedded_hal_1::spi::{Operation, SpiDevice};
 
     struct Calibration {
         x1: i32,
@@ -209,7 +139,6 @@ mod touch {
     impl<SPI> Touch<SPI>
     where
         SPI: SpiDevice,
-        SPI::Bus: SpiBus,
     {
         pub fn new(spi: SPI) -> Self {
             Self { spi }
@@ -219,13 +148,12 @@ mod touch {
             let mut x = [0; 2];
             let mut y = [0; 2];
             self.spi
-                .transaction(|bus| {
+                .transaction(&mut [
-                    bus.write(&[0x90])?;
+                    Operation::Write(&[0x90]),
-                    bus.read(&mut x)?;
+                    Operation::Read(&mut x),
-                    bus.write(&[0xd0])?;
+                    Operation::Write(&[0xd0]),
-                    bus.read(&mut y)?;
+                    Operation::Read(&mut y),
-                    Ok(())
+                ])
-                })
                 .unwrap();
 
             let x = (u16::from_be_bytes(x) >> 3) as i32;
@@ -247,7 +175,7 @@ mod touch {
 mod my_display_interface {
     use display_interface::{DataFormat, DisplayError, WriteOnlyDataCommand};
     use embedded_hal_1::digital::OutputPin;
-    use embedded_hal_1::spi::{SpiBusWrite, SpiDevice};
+    use embedded_hal_1::spi::SpiDeviceWrite;
 
     /// SPI display interface.
     ///
@@ -259,8 +187,7 @@ mod my_display_interface {
 
     impl<SPI, DC> SPIDeviceInterface<SPI, DC>
     where
-        SPI: SpiDevice,
+        SPI: SpiDeviceWrite,
-        SPI::Bus: SpiBusWrite,
         DC: OutputPin,
     {
         /// Create new SPI interface for communciation with a display driver
@@ -271,42 +198,27 @@ mod my_display_interface {
 
     impl<SPI, DC> WriteOnlyDataCommand for SPIDeviceInterface<SPI, DC>
     where
-        SPI: SpiDevice,
+        SPI: SpiDeviceWrite,
-        SPI::Bus: SpiBusWrite,
         DC: OutputPin,
     {
         fn send_commands(&mut self, cmds: DataFormat<'_>) -> Result<(), DisplayError> {
-            let r = self.spi.transaction(|bus| {
+            // 1 = data, 0 = command
-                // 1 = data, 0 = command
+            self.dc.set_low().map_err(|_| DisplayError::DCError)?;
-                if let Err(_) = self.dc.set_low() {
-                    return Ok(Err(DisplayError::DCError));
-                }
 
-                // Send words over SPI
+            send_u8(&mut self.spi, cmds).map_err(|_| DisplayError::BusWriteError)?;
-                send_u8(bus, cmds)?;
+            Ok(())
-
-                Ok(Ok(()))
-            });
-            r.map_err(|_| DisplayError::BusWriteError)?
         }
 
         fn send_data(&mut self, buf: DataFormat<'_>) -> Result<(), DisplayError> {
-            let r = self.spi.transaction(|bus| {
+            // 1 = data, 0 = command
-                // 1 = data, 0 = command
+            self.dc.set_high().map_err(|_| DisplayError::DCError)?;
-                if let Err(_) = self.dc.set_high() {
-                    return Ok(Err(DisplayError::DCError));
-                }
 
-                // Send words over SPI
+            send_u8(&mut self.spi, buf).map_err(|_| DisplayError::BusWriteError)?;
-                send_u8(bus, buf)?;
+            Ok(())
-
-                Ok(Ok(()))
-            });
-            r.map_err(|_| DisplayError::BusWriteError)?
         }
     }
 
-    fn send_u8<T: SpiBusWrite>(spi: &mut T, words: DataFormat<'_>) -> Result<(), T::Error> {
+    fn send_u8<T: SpiDeviceWrite>(spi: &mut T, words: DataFormat<'_>) -> Result<(), T::Error> {
         match words {
             DataFormat::U8(slice) => spi.write(slice),
             DataFormat::U16(slice) => {

examples/stm32f1/Cargo.toml

@@ -8,7 +8,7 @@ license = "MIT OR Apache-2.0"
 embassy-sync = { version = "0.1.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
 embassy-time = { version = "0.1.0", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
-embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "stm32f103c8", "unstable-pac", "memory-x", "time-driver-any"]  }
+embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = ["nightly", "defmt", "stm32f103c8", "unstable-pac", "memory-x", "time-driver-any", "unstable-traits" ]  }
 embassy-usb = { version = "0.1.0", path = "../../embassy-usb", features = ["defmt"] }
 embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 

examples/stm32h5/Cargo.toml

@@ -19,8 +19,8 @@ defmt-rtt = "0.4"
 cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
-embedded-hal-async = { version = "=0.2.0-alpha.0" }
+embedded-hal-async = { version = "=0.2.0-alpha.1" }
 embedded-nal-async = "0.4.0"
 panic-probe = { version = "0.3", features = ["print-defmt"] }
 futures = { version = "0.3.17", default-features = false, features = ["async-await"] }

examples/stm32h7/Cargo.toml

@@ -19,8 +19,8 @@ defmt-rtt = "0.4"
 cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
-embedded-hal-async = { version = "=0.2.0-alpha.0" }
+embedded-hal-async = { version = "=0.2.0-alpha.1" }
 embedded-nal-async = "0.4.0"
 panic-probe = { version = "0.3", features = ["print-defmt"] }
 futures = { version = "0.3.17", default-features = false, features = ["async-await"] }

examples/stm32l4/Cargo.toml

@@ -18,8 +18,8 @@ defmt-rtt = "0.4"
 cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
-embedded-hal-async = { version = "=0.2.0-alpha.0" }
+embedded-hal-async = { version = "=0.2.0-alpha.1" }
 panic-probe = { version = "0.3", features = ["print-defmt"] }
 futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
 heapless = { version = "0.7.5", default-features = false }

tests/rp/Cargo.toml

@@ -17,8 +17,8 @@ defmt-rtt = "0.4"
 cortex-m = { version = "0.7.6" }
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
-embedded-hal-async = { version = "=0.2.0-alpha.0" }
+embedded-hal-async = { version = "=0.2.0-alpha.1" }
 panic-probe = { version = "0.3.0", features = ["print-defmt"] }
 futures = { version = "0.3.17", default-features = false, features = ["async-await"] }
 embedded-io = { version = "0.4.0", features = ["async"] }

tests/stm32/Cargo.toml

@@ -25,8 +25,8 @@ defmt-rtt = "0.4"
 cortex-m = { version = "0.7.6", features = ["critical-section-single-core"] }
 cortex-m-rt = "0.7.0"
 embedded-hal = "0.2.6"
-embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.9" }
+embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
-embedded-hal-async = { version = "=0.2.0-alpha.0" }
+embedded-hal-async = { version = "=0.2.0-alpha.1" }
 panic-probe = { version = "0.3.0", features = ["print-defmt"] }
 
 [profile.dev]