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Add pll1_p_mul_2 clock.

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This commit is contained in:
Eli Orona 2024-02-25 16:12:32 -08:00
parent fd5058875a
commit c23b59bdc8
1 changed files with 5 additions and 0 deletions
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5
embassy-stm32/src/rcc/f013.rs
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@ -209,6 +209,9 @@ pub(crate) unsafe fn init(config: Config) {
out_freq
});
#[cfg(stm32f3)]
let pll_mul_2 = pll.map(|pll| { pll * 2u32 });
#[cfg(any(rcc_f1, rcc_f1cl, stm32f3))]
let usb = match pll {
Some(Hertz(72_000_000)) => Some(crate::pac::rcc::vals::Usbpre::DIV1_5),
@ -374,6 +377,8 @@ pub(crate) unsafe fn init(config: Config) {
hsi: hsi,
hse: hse,
pll1_p: pll,
#[cfg(stm32f3)]
pll1_p_mul_2: pll_mul_2,
sys: Some(sys),
pclk1: Some(pclk1),
pclk2: Some(pclk2),