commit
d3fb9ddf33
3 changed files with 6 additions and 5 deletions
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@ -43,6 +43,7 @@ where
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"set pindirs, 0 side 0"
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// these nops seem to be necessary for fast clkdiv
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"nop side 1"
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"nop side 0"
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"nop side 1"
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// read in y-1 bits
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"lp2:"
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@ -70,11 +71,10 @@ where
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sm.write_instr(relocated.origin() as usize, relocated.code());
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// theoretical maximum according to data sheet, 100Mhz Pio => 50Mhz SPI Freq
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// does not work yet,
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// sm.set_clkdiv(0x0140);
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sm.set_clkdiv(0x0140);
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// same speed as pico-sdk, 62.5Mhz
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sm.set_clkdiv(0x0200);
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// sm.set_clkdiv(0x0200);
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// 32 Mhz
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// sm.set_clkdiv(0x03E8);
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@ -74,7 +74,7 @@ where
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// 32-bit word length, little endian (which is the default endianess).
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self.write32_swapped(
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REG_BUS_CTRL,
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WORD_LENGTH_32 | HIGH_SPEED | INTERRUPT_HIGH | WAKE_UP | STATUS_ENABLE,
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WORD_LENGTH_32 | HIGH_SPEED | INTERRUPT_HIGH | WAKE_UP | STATUS_ENABLE | INTERRUPT_WITH_STATUS,
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)
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.await;
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@ -16,7 +16,8 @@ pub(crate) const WORD_LENGTH_32: u32 = 0x1;
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pub(crate) const HIGH_SPEED: u32 = 0x10;
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pub(crate) const INTERRUPT_HIGH: u32 = 1 << 5;
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pub(crate) const WAKE_UP: u32 = 1 << 7;
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pub(crate) const STATUS_ENABLE: u32 = 0x10000;
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pub(crate) const STATUS_ENABLE: u32 = 1 << 16;
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pub(crate) const INTERRUPT_WITH_STATUS: u32 = 1 << 17;
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// SPI_STATUS_REGISTER bits
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pub(crate) const STATUS_DATA_NOT_AVAILABLE: u32 = 0x00000001;
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