diff --git a/embassy-stm32/src/rcc/h7/mod.rs b/embassy-stm32/src/rcc/h7/mod.rs
index 5ec531820..ee0ba5a35 100644
--- a/embassy-stm32/src/rcc/h7/mod.rs
+++ b/embassy-stm32/src/rcc/h7/mod.rs
@@ -70,6 +70,84 @@ pub struct Config {
     pub pll3: PllConfig,
 }
 
+impl Config {
+    pub fn sys_ck<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.sys_ck = Some(freq.into());
+        self
+    }
+
+    pub fn per_ck<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.per_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pclk1<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pclk1 = Some(freq.into());
+        self
+    }
+
+    pub fn pclk2<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pclk2 = Some(freq.into());
+        self
+    }
+
+    pub fn pclk3<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pclk3 = Some(freq.into());
+        self
+    }
+
+    pub fn pclk4<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pclk4 = Some(freq.into());
+        self
+    }
+
+    pub fn pll1_p<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll1.p_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pll1_q<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll1.q_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pll1_r<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll1.r_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pll2_p<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll2.p_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pll2_q<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll2.q_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pll2_r<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll2.r_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pll3_p<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll3.p_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pll3_q<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll3.q_ck = Some(freq.into());
+        self
+    }
+
+    pub fn pll3_r<T:Into<Hertz>>(mut self, freq: T) -> Self {
+        self.pll3.r_ck = Some(freq.into());
+        self
+    }
+
+}
+
 pub struct Rcc<'d> {
     inner: PhantomData<&'d ()>,
     config: Config,
diff --git a/examples/stm32h7/Cargo.toml b/examples/stm32h7/Cargo.toml
index 8bc6781e0..f313960f9 100644
--- a/examples/stm32h7/Cargo.toml
+++ b/examples/stm32h7/Cargo.toml
@@ -24,8 +24,8 @@ embassy-hal-common = {version = "0.1.0", path = "../../embassy-hal-common" }
 embassy-net = { path = "../../embassy-net", default-features = false, features = ["defmt-debug", "defmt", "tcp", "medium-ethernet", "pool-16"] }
 stm32-metapac = { path = "../../stm32-metapac", features = ["stm32h743zi"] }
 embassy-macros = { path = "../../embassy-macros" }
-stm32h7 = { version = "0.13", features = ["stm32h743"]}
-stm32h7xx-hal = { version = "0.9.0", features = ["stm32h743"] }
+#stm32h7 = { version = "0.13", features = ["stm32h743"]}
+#stm32h7xx-hal = { version = "0.9.0", features = ["stm32h743"] }
 
 defmt = "0.2.0"
 defmt-rtt = "0.2.0"
diff --git a/examples/stm32h7/src/bin/blinky.rs b/examples/stm32h7/src/bin/blinky.rs
index 54e139e79..3db265091 100644
--- a/examples/stm32h7/src/bin/blinky.rs
+++ b/examples/stm32h7/src/bin/blinky.rs
@@ -13,38 +13,13 @@ use embedded_hal::digital::v2::OutputPin;
 use example_common::*;
 
 use cortex_m_rt::entry;
-use stm32h7::stm32h743 as pac;
-
-use hal::prelude::*;
-use stm32h7xx_hal as hal;
+use embassy_stm32::dbgmcu::Dbgmcu;
 
 #[entry]
 fn main() -> ! {
     info!("Hello World!");
 
-    let pp = pac::Peripherals::take().unwrap();
-
-    let pwrcfg = pp.PWR.constrain().freeze();
-
-    let rcc = pp.RCC.constrain();
-
-    rcc.sys_ck(96.mhz())
-        .pclk1(48.mhz())
-        .pclk2(48.mhz())
-        .pclk3(48.mhz())
-        .pclk4(48.mhz())
-        .pll1_q_ck(48.mhz())
-        .freeze(pwrcfg, &pp.SYSCFG);
-
-    let pp = unsafe { pac::Peripherals::steal() };
-
-    pp.DBGMCU.cr.modify(|_, w| {
-        w.dbgsleep_d1().set_bit();
-        w.dbgstby_d1().set_bit();
-        w.dbgstop_d1().set_bit();
-        w.d1dbgcken().set_bit();
-        w
-    });
+    unsafe { Dbgmcu::enable_all() };
 
     let p = embassy_stm32::init(Default::default());
 
diff --git a/examples/stm32h7/src/bin/dac.rs b/examples/stm32h7/src/bin/dac.rs
index 330f69aa1..f1df5425d 100644
--- a/examples/stm32h7/src/bin/dac.rs
+++ b/examples/stm32h7/src/bin/dac.rs
@@ -13,44 +13,24 @@ use embassy_stm32::gpio::NoPin;
 use example_common::*;
 
 use cortex_m_rt::entry;
+use embassy_stm32::Config;
+use embassy_stm32::rcc;
 use embassy_stm32::dac::{Channel, Dac, Value};
-use stm32h7::stm32h743 as pac;
-use stm32h7xx_hal::prelude::*;
+use embassy_stm32::time::U32Ext;
 
 #[entry]
 fn main() -> ! {
     info!("Hello World, dude!");
 
-    let pp = pac::Peripherals::take().unwrap();
+    let p = embassy_stm32::init(Config::default().rcc(
+        rcc::Config::default()
+            .sys_ck(400.mhz())
+            .pll1_q(100.mhz())
+    ));
 
-    let pwrcfg = pp.PWR.constrain().freeze();
-
-    let rcc = pp.RCC.constrain();
-
-    rcc.sys_ck(96.mhz())
-        .pclk1(48.mhz())
-        .pclk2(48.mhz())
-        .pclk3(48.mhz())
-        .pclk4(48.mhz())
-        .pll1_q_ck(48.mhz())
-        .freeze(pwrcfg, &pp.SYSCFG);
-
-    let pp = unsafe { pac::Peripherals::steal() };
-
-    pp.DBGMCU.cr.modify(|_, w| {
-        w.dbgsleep_d1().set_bit();
-        w.dbgstby_d1().set_bit();
-        w.dbgstop_d1().set_bit();
-        w.d1dbgcken().set_bit();
-        w
-    });
-
-    pp.RCC.apb1lenr.modify(|_, w| {
-        w.dac12en().set_bit();
-        w
-    });
-
-    let p = embassy_stm32::init(Default::default());
+    unsafe {
+        Dbgmcu::enable_all();
+    }
 
     let mut dac = Dac::new(p.DAC1, p.PA4, NoPin);
 
@@ -63,6 +43,7 @@ fn main() -> ! {
 }
 
 use micromath::F32Ext;
+use embassy_stm32::dbgmcu::Dbgmcu;
 
 fn to_sine_wave(v: u8) -> u8 {
     if v >= 128 {
diff --git a/examples/stm32h7/src/bin/spi.rs b/examples/stm32h7/src/bin/spi.rs
index ac483a311..ee11d32ec 100644
--- a/examples/stm32h7/src/bin/spi.rs
+++ b/examples/stm32h7/src/bin/spi.rs
@@ -12,35 +12,23 @@ mod example_common;
 use core::fmt::Write;
 use embassy::executor::Executor;
 use embassy::time::Clock;
+use embassy_stm32::Config;
 use embassy::util::Forever;
 use embassy_stm32::dma::NoDma;
+use embassy_stm32::spi;
+use embassy_stm32::rcc;
 use example_common::*;
 use embedded_hal::blocking::spi::Transfer;
 
-use hal::prelude::*;
-use stm32h7xx_hal as hal;
-
 use cortex_m_rt::entry;
-use stm32h7::stm32h743 as pac;
 use heapless::String;
-use embassy_stm32::spi::{Spi, Config};
-use embassy_stm32::time::Hertz;
+use embassy_stm32::time::U32Ext;
+use embassy_stm32::peripherals::SPI3;
+use embassy_stm32::dbgmcu::Dbgmcu;
+use core::str::from_utf8;
 
 #[embassy::task]
-async fn main_task() {
-    let p = embassy_stm32::init(Default::default());
-
-    let mut spi = Spi::new(
-        p.SPI3,
-        p.PB3,
-        p.PB5,
-        p.PB4,
-        NoDma,
-        NoDma,
-        Hertz(1_000_000),
-        Config::default(),
-    );
-
+async fn main_task(mut spi: spi::Spi<'static, SPI3, NoDma, NoDma>) {
     for n in 0u32.. {
         let mut write: String<128> = String::new();
         core::write!(&mut write, "Hello DMA World {}!\r\n", n).unwrap();
@@ -50,7 +38,7 @@ async fn main_task() {
                 defmt::panic!("crap");
             }
         }
-        info!("read via spi: {}", write.as_bytes());
+        info!("read via spi: {}", from_utf8(write.as_bytes()).unwrap());
     }
 }
 
@@ -68,45 +56,31 @@ static EXECUTOR: Forever<Executor> = Forever::new();
 fn main() -> ! {
     info!("Hello World!");
 
-    let pp = pac::Peripherals::take().unwrap();
+    unsafe {
+        Dbgmcu::enable_all();
+    }
 
-    let pwrcfg = pp.PWR.constrain().freeze();
+    let p = embassy_stm32::init(Config::default().rcc(
+        rcc::Config::default()
+            .sys_ck(400.mhz())
+            .pll1_q(100.mhz())
+    ));
 
-    let rcc = pp.RCC.constrain();
-
-    rcc.sys_ck(96.mhz())
-        .pclk1(48.mhz())
-        .pclk2(48.mhz())
-        .pclk3(48.mhz())
-        .pclk4(48.mhz())
-        .pll1_q_ck(48.mhz())
-        .freeze(pwrcfg, &pp.SYSCFG);
-
-    let pp = unsafe { pac::Peripherals::steal() };
-
-    pp.DBGMCU.cr.modify(|_, w| {
-        w.dbgsleep_d1().set_bit();
-        w.dbgstby_d1().set_bit();
-        w.dbgstop_d1().set_bit();
-        w.d1dbgcken().set_bit();
-        w
-    });
-
-    pp.RCC.ahb4enr.modify(|_, w| {
-        w.gpioaen().set_bit();
-        w.gpioben().set_bit();
-        w.gpiocen().set_bit();
-        w.gpioden().set_bit();
-        w.gpioeen().set_bit();
-        w.gpiofen().set_bit();
-        w
-    });
+    let spi = spi::Spi::new(
+        p.SPI3,
+        p.PB3,
+        p.PB5,
+        p.PB4,
+        NoDma,
+        NoDma,
+        1.mhz(),
+        spi::Config::default(),
+    );
 
     unsafe { embassy::time::set_clock(&ZeroClock) };
-
     let executor = EXECUTOR.put(Executor::new());
 
     executor.run(|spawner| {
-        unwrap!(spawner.spawn(main_task()));
+        unwrap!(spawner.spawn(main_task(spi)));
     })
 }
diff --git a/examples/stm32h7/src/bin/spi_dma.rs b/examples/stm32h7/src/bin/spi_dma.rs
index 9dbfd0960..eb213f650 100644
--- a/examples/stm32h7/src/bin/spi_dma.rs
+++ b/examples/stm32h7/src/bin/spi_dma.rs
@@ -11,34 +11,22 @@ mod example_common;
 use core::fmt::Write;
 use embassy::executor::Executor;
 use embassy::time::Clock;
+use embassy_stm32::time::U32Ext;
 use embassy::util::Forever;
 use example_common::*;
 use embassy_traits::spi::FullDuplex;
 
-use hal::prelude::*;
-use stm32h7xx_hal as hal;
-
 use cortex_m_rt::entry;
-use stm32h7::stm32h743 as pac;
 use heapless::String;
-use embassy_stm32::spi::{Spi, Config};
-use embassy_stm32::time::Hertz;
+use embassy_stm32::spi;
+use embassy_stm32::Config;
 use core::str::from_utf8;
+use embassy_stm32::dbgmcu::Dbgmcu;
+use embassy_stm32::rcc;
+use embassy_stm32::peripherals::{DMA1_CH4, DMA1_CH3, SPI3};
 
 #[embassy::task]
-async fn main_task() {
-    let p = embassy_stm32::init(Default::default());
-
-    let mut spi = Spi::new(
-        p.SPI3,
-        p.PB3,
-        p.PB5,
-        p.PB4,
-        p.DMA1_CH3,
-        p.DMA1_CH4,
-        Hertz(1_000_000),
-        Config::default(),
-    );
+async fn main_task(mut spi: spi::Spi<'static, SPI3, DMA1_CH3, DMA1_CH4>) {
 
     for n in 0u32.. {
         let mut write: String<128> = String::new();
@@ -61,49 +49,36 @@ impl Clock for ZeroClock {
 
 static EXECUTOR: Forever<Executor> = Forever::new();
 
+
 #[entry]
 fn main() -> ! {
     info!("Hello World!");
 
-    let pp = pac::Peripherals::take().unwrap();
+    unsafe {
+        Dbgmcu::enable_all();
+    }
 
-    let pwrcfg = pp.PWR.constrain().freeze();
+    let p = embassy_stm32::init(Config::default().rcc(
+        rcc::Config::default()
+            .sys_ck(400.mhz())
+            .pll1_q(100.mhz())
+    ));
 
-    let rcc = pp.RCC.constrain();
-
-    rcc.sys_ck(96.mhz())
-        .pclk1(48.mhz())
-        .pclk2(48.mhz())
-        .pclk3(48.mhz())
-        .pclk4(48.mhz())
-        .pll1_q_ck(48.mhz())
-        .freeze(pwrcfg, &pp.SYSCFG);
-
-    let pp = unsafe { pac::Peripherals::steal() };
-
-    pp.DBGMCU.cr.modify(|_, w| {
-        w.dbgsleep_d1().set_bit();
-        w.dbgstby_d1().set_bit();
-        w.dbgstop_d1().set_bit();
-        w.d1dbgcken().set_bit();
-        w
-    });
-
-    pp.RCC.ahb4enr.modify(|_, w| {
-        w.gpioaen().set_bit();
-        w.gpioben().set_bit();
-        w.gpiocen().set_bit();
-        w.gpioden().set_bit();
-        w.gpioeen().set_bit();
-        w.gpiofen().set_bit();
-        w
-    });
+    let spi = spi::Spi::new(
+        p.SPI3,
+        p.PB3,
+        p.PB5,
+        p.PB4,
+        p.DMA1_CH3,
+        p.DMA1_CH4,
+        1.mhz(),
+        spi::Config::default(),
+    );
 
     unsafe { embassy::time::set_clock(&ZeroClock) };
-
     let executor = EXECUTOR.put(Executor::new());
 
     executor.run(|spawner| {
-        unwrap!(spawner.spawn(main_task()));
+        unwrap!(spawner.spawn(main_task(spi)));
     })
 }
diff --git a/examples/stm32h7/src/bin/usart.rs b/examples/stm32h7/src/bin/usart.rs
index 11e04f33c..ce33f201a 100644
--- a/examples/stm32h7/src/bin/usart.rs
+++ b/examples/stm32h7/src/bin/usart.rs
@@ -16,11 +16,8 @@ use embassy_stm32::dma::NoDma;
 use embassy_stm32::usart::{Config, Uart};
 use example_common::*;
 
-use hal::prelude::*;
-use stm32h7xx_hal as hal;
-
 use cortex_m_rt::entry;
-use stm32h7::stm32h743 as pac;
+use embassy_stm32::dbgmcu::Dbgmcu;
 
 #[embassy::task]
 async fn main_task() {
@@ -53,29 +50,9 @@ static EXECUTOR: Forever<Executor> = Forever::new();
 fn main() -> ! {
     info!("Hello World!");
 
-    let pp = pac::Peripherals::take().unwrap();
-
-    let pwrcfg = pp.PWR.constrain().freeze();
-
-    let rcc = pp.RCC.constrain();
-
-    rcc.sys_ck(96.mhz())
-        .pclk1(48.mhz())
-        .pclk2(48.mhz())
-        .pclk3(48.mhz())
-        .pclk4(48.mhz())
-        .pll1_q_ck(48.mhz())
-        .freeze(pwrcfg, &pp.SYSCFG);
-
-    let pp = unsafe { pac::Peripherals::steal() };
-
-    pp.DBGMCU.cr.modify(|_, w| {
-        w.dbgsleep_d1().set_bit();
-        w.dbgstby_d1().set_bit();
-        w.dbgstop_d1().set_bit();
-        w.d1dbgcken().set_bit();
-        w
-    });
+    unsafe {
+        Dbgmcu::enable_all();
+    }
 
     unsafe { embassy::time::set_clock(&ZeroClock) };
 
diff --git a/examples/stm32h7/src/bin/usart_dma.rs b/examples/stm32h7/src/bin/usart_dma.rs
index fe59a2162..553cf506f 100644
--- a/examples/stm32h7/src/bin/usart_dma.rs
+++ b/examples/stm32h7/src/bin/usart_dma.rs
@@ -18,12 +18,8 @@ use embassy_stm32::usart::{Config, Uart};
 use embassy_traits::uart::Write as _Write;
 use example_common::*;
 
-use hal::prelude::*;
-use stm32h7xx_hal as hal;
-
 use cortex_m_rt::entry;
 use heapless::String;
-use stm32h7::stm32h743 as pac;
 
 #[embassy::task]
 async fn main_task() {
@@ -56,20 +52,6 @@ static EXECUTOR: Forever<Executor> = Forever::new();
 fn main() -> ! {
     info!("Hello World!");
 
-    let pp = pac::Peripherals::take().unwrap();
-
-    let pwrcfg = pp.PWR.constrain().freeze();
-
-    let rcc = pp.RCC.constrain();
-
-    rcc.sys_ck(96.mhz())
-        .pclk1(48.mhz())
-        .pclk2(48.mhz())
-        .pclk3(48.mhz())
-        .pclk4(48.mhz())
-        .pll1_q_ck(48.mhz())
-        .freeze(pwrcfg, &pp.SYSCFG);
-
     unsafe {
         Dbgmcu::enable_all();
     }