diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs index 024a86c91..63bbe5a77 100644 --- a/embassy-nrf/src/uarte.rs +++ b/embassy-nrf/src/uarte.rs @@ -187,13 +187,6 @@ impl<'d, T: Instance> Uarte<'d, T> { s.endtx_waker.wake(); r.intenclr.write(|w| w.endtx().clear()); } - - if r.events_rxto.read().bits() != 0 { - r.intenclr.write(|w| w.rxto().clear()); - } - if r.events_txstopped.read().bits() != 0 { - r.intenclr.write(|w| w.txstopped().clear()); - } } } @@ -208,15 +201,9 @@ impl<'a, T: Instance> Drop for Uarte<'a, T> { info!("did_stoprx {} did_stoptx {}", did_stoprx, did_stoptx); // Wait for rxto or txstopped, if needed. - r.intenset.write(|w| w.rxto().set().txstopped().set()); while (did_stoprx && r.events_rxto.read().bits() == 0) || (did_stoptx && r.events_txstopped.read().bits() == 0) - { - info!("uarte drop: wfe"); - cortex_m::asm::wfe(); - } - - cortex_m::asm::sev(); + {} // Finally we can disable! r.enable.write(|w| w.enable().disabled()); diff --git a/embassy/src/interrupt.rs b/embassy/src/interrupt.rs index df3a79ccc..7848ee698 100644 --- a/embassy/src/interrupt.rs +++ b/embassy/src/interrupt.rs @@ -1,8 +1,8 @@ +use atomic_polyfill::{compiler_fence, AtomicPtr, Ordering}; +use core::mem; use core::ptr; use cortex_m::peripheral::NVIC; -use atomic_polyfill::{compiler_fence, AtomicPtr, Ordering}; - pub use embassy_macros::interrupt_declare as declare; pub use embassy_macros::interrupt_take as take; @@ -124,9 +124,8 @@ impl InterruptExt for T { #[inline] fn set_priority(&self, prio: Self::Priority) { unsafe { - cortex_m::peripheral::Peripherals::steal() - .NVIC - .set_priority(NrWrap(self.number()), prio.into()) + let mut nvic: cortex_m::peripheral::NVIC = mem::transmute(()); + nvic.set_priority(NrWrap(self.number()), prio.into()) } } }