Add support for splitting stm32 usart into TX and RX
* Keeps existing API for usart, but wraps it in Tx and Rx sub-types * Adds split() method similar to nRF for getting indepdendent TX and RX parts * Implements e-h traits for TX and RX types * Add stm32h7 example
This commit is contained in:
Ulf Lilleengen
Ulf Lilleengen
parent
cb1be3983a
commit
e09bde9345
2 changed files with 251 additions and 75 deletions
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@ -72,57 +72,26 @@ pub enum Error {
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}
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pub struct Uart<'d, T: Instance, TxDma = NoDma, RxDma = NoDma> {
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inner: T,
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phantom: PhantomData<&'d mut T>,
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tx: UartTx<'d, T, TxDma>,
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rx: UartRx<'d, T, RxDma>,
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}
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pub struct UartTx<'d, T: Instance, TxDma = NoDma> {
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phantom: PhantomData<&'d mut T>,
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tx_dma: TxDma,
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}
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pub struct UartRx<'d, T: Instance, RxDma = NoDma> {
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phantom: PhantomData<&'d mut T>,
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rx_dma: RxDma,
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}
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impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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pub fn new(
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inner: impl Unborrow<Target = T> + 'd,
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rx: impl Unborrow<Target = impl RxPin<T>> + 'd,
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tx: impl Unborrow<Target = impl TxPin<T>> + 'd,
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tx_dma: impl Unborrow<Target = TxDma> + 'd,
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rx_dma: impl Unborrow<Target = RxDma> + 'd,
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config: Config,
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) -> Self {
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unborrow!(inner, rx, tx, tx_dma, rx_dma);
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T::enable();
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let pclk_freq = T::frequency();
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// TODO: better calculation, including error checking and OVER8 if possible.
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let div = (pclk_freq.0 + (config.baudrate / 2)) / config.baudrate;
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let r = inner.regs();
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unsafe {
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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r.cr2().write(|_w| {});
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r.cr3().write(|_w| {});
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r.brr().write_value(regs::Brr(div));
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r.cr1().write(|w| {
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w.set_ue(true);
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w.set_te(true);
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w.set_re(true);
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w.set_m0(vals::M0::BIT8);
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w.set_pce(config.parity != Parity::ParityNone);
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w.set_ps(match config.parity {
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Parity::ParityOdd => vals::Ps::ODD,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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});
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});
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}
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impl<'d, T: Instance, TxDma> UartTx<'d, T, TxDma> {
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fn new(tx_dma: TxDma) -> Self {
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Self {
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inner,
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phantom: PhantomData,
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tx_dma,
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rx_dma,
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phantom: PhantomData,
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}
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}
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@ -133,16 +102,43 @@ impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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let ch = &mut self.tx_dma;
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let request = ch.request();
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unsafe {
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self.inner.regs().cr3().modify(|reg| {
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T::regs().cr3().modify(|reg| {
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reg.set_dmat(true);
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});
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}
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let r = self.inner.regs();
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let dst = tdr(r);
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let dst = tdr(T::regs());
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crate::dma::write(ch, request, buffer, dst).await;
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Ok(())
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}
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pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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unsafe {
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let r = T::regs();
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for &b in buffer {
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while !sr(r).read().txe() {}
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tdr(r).write_volatile(b);
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}
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}
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Ok(())
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}
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pub fn blocking_flush(&mut self) -> Result<(), Error> {
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unsafe {
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let r = T::regs();
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while !sr(r).read().tc() {}
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}
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Ok(())
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}
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}
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impl<'d, T: Instance, RxDma> UartRx<'d, T, RxDma> {
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fn new(rx_dma: RxDma) -> Self {
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Self {
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rx_dma,
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phantom: PhantomData,
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}
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}
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pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error>
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where
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RxDma: crate::usart::RxDma<T>,
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@ -150,11 +146,11 @@ impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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let ch = &mut self.rx_dma;
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let request = ch.request();
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unsafe {
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self.inner.regs().cr3().modify(|reg| {
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T::regs().cr3().modify(|reg| {
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reg.set_dmar(true);
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});
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}
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let r = self.inner.regs();
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let r = T::regs();
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let src = rdr(r);
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crate::dma::read(ch, request, src, buffer).await;
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Ok(())
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@ -162,7 +158,7 @@ impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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unsafe {
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let r = self.inner.regs();
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let r = T::regs();
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for b in buffer {
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loop {
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let sr = sr(r).read();
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@ -187,36 +183,96 @@ impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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}
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Ok(())
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}
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}
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impl<'d, T: Instance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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pub fn new(
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_inner: impl Unborrow<Target = T> + 'd,
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rx: impl Unborrow<Target = impl RxPin<T>> + 'd,
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tx: impl Unborrow<Target = impl TxPin<T>> + 'd,
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tx_dma: impl Unborrow<Target = TxDma> + 'd,
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rx_dma: impl Unborrow<Target = RxDma> + 'd,
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config: Config,
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) -> Self {
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unborrow!(_inner, rx, tx, tx_dma, rx_dma);
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T::enable();
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let pclk_freq = T::frequency();
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// TODO: better calculation, including error checking and OVER8 if possible.
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let div = (pclk_freq.0 + (config.baudrate / 2)) / config.baudrate;
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let r = T::regs();
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unsafe {
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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r.cr2().write(|_w| {});
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r.cr3().write(|_w| {});
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r.brr().write_value(regs::Brr(div));
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r.cr1().write(|w| {
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w.set_ue(true);
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w.set_te(true);
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w.set_re(true);
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w.set_m0(vals::M0::BIT8);
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w.set_pce(config.parity != Parity::ParityNone);
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w.set_ps(match config.parity {
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Parity::ParityOdd => vals::Ps::ODD,
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Parity::ParityEven => vals::Ps::EVEN,
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_ => vals::Ps::EVEN,
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});
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});
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}
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Self {
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phantom: PhantomData,
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tx: UartTx::new(tx_dma),
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rx: UartRx::new(rx_dma),
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}
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}
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pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error>
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where
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TxDma: crate::usart::TxDma<T>,
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{
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self.tx.write(buffer).await
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}
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pub fn blocking_write(&mut self, buffer: &[u8]) -> Result<(), Error> {
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unsafe {
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let r = self.inner.regs();
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for &b in buffer {
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while !sr(r).read().txe() {}
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tdr(r).write_volatile(b);
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}
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}
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Ok(())
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self.tx.blocking_write(buffer)
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}
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pub fn blocking_flush(&mut self) -> Result<(), Error> {
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unsafe {
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let r = self.inner.regs();
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while !sr(r).read().tc() {}
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self.tx.blocking_flush()
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}
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Ok(())
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pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error>
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where
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RxDma: crate::usart::RxDma<T>,
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{
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self.rx.read(buffer).await
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}
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pub fn blocking_read(&mut self, buffer: &mut [u8]) -> Result<(), Error> {
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self.rx.blocking_read(buffer)
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}
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/// Split the Uart into a transmitter and receiver, which is
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/// particuarly useful when having two tasks correlating to
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/// transmitting and receiving.
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pub fn split(self) -> (UartTx<'d, T, TxDma>, UartRx<'d, T, RxDma>) {
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(self.tx, self.rx)
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}
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}
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mod eh02 {
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use super::*;
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impl<'d, T: Instance, TxDma, RxDma> embedded_hal_02::serial::Read<u8>
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for Uart<'d, T, TxDma, RxDma>
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{
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impl<'d, T: Instance, RxDma> embedded_hal_02::serial::Read<u8> for UartRx<'d, T, RxDma> {
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type Error = Error;
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fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> {
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let r = self.inner.regs();
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let r = T::regs();
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unsafe {
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let sr = sr(r).read();
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if sr.pe() {
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@ -240,6 +296,25 @@ mod eh02 {
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}
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}
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impl<'d, T: Instance, TxDma> embedded_hal_02::blocking::serial::Write<u8> for UartTx<'d, T, TxDma> {
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type Error = Error;
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fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> {
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self.blocking_write(buffer)
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}
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fn bflush(&mut self) -> Result<(), Self::Error> {
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self.blocking_flush()
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}
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}
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impl<'d, T: Instance, TxDma, RxDma> embedded_hal_02::serial::Read<u8>
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for Uart<'d, T, TxDma, RxDma>
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{
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type Error = Error;
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fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> {
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embedded_hal_02::serial::Read::read(&mut self.rx)
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}
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}
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impl<'d, T: Instance, TxDma, RxDma> embedded_hal_02::blocking::serial::Write<u8>
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for Uart<'d, T, TxDma, RxDma>
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{
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@ -273,12 +348,48 @@ mod eh1 {
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{
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type Error = Error;
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}
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impl<'d, T: Instance, TxDma> embedded_hal_1::serial::ErrorType for UartTx<'d, T, TxDma> {
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type Error = Error;
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}
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impl<'d, T: Instance, RxDma> embedded_hal_1::serial::ErrorType for UartRx<'d, T, RxDma> {
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type Error = Error;
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}
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}
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cfg_if::cfg_if! {
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if #[cfg(all(feature = "unstable-traits", feature = "nightly"))] {
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use core::future::Future;
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impl<'d, T: Instance, TxDma> embedded_hal_async::serial::Write for UartTx<'d, T, TxDma>
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where
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TxDma: crate::usart::TxDma<T>,
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{
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type WriteFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn write<'a>(&'a mut self, buf: &'a [u8]) -> Self::WriteFuture<'a> {
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self.write(buf)
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}
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type FlushFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn flush<'a>(&'a mut self) -> Self::FlushFuture<'a> {
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async move { Ok(()) }
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}
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}
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impl<'d, T: Instance, RxDma> embedded_hal_async::serial::Read for UartRx<'d, T, RxDma>
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where
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RxDma: crate::usart::RxDma<T>,
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{
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type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a;
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fn read<'a>(&'a mut self, buf: &'a mut [u8]) -> Self::ReadFuture<'a> {
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self.read(buf)
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}
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}
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impl<'d, T: Instance, TxDma, RxDma> embedded_hal_async::serial::Write for Uart<'d, T, TxDma, RxDma>
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where
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TxDma: crate::usart::TxDma<T>,
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@ -329,7 +440,6 @@ mod buffered {
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}
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struct StateInner<'d, T: Instance> {
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uart: Uart<'d, T, NoDma, NoDma>,
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phantom: PhantomData<&'d mut T>,
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rx_waker: WakerRegistration,
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@ -351,14 +461,14 @@ mod buffered {
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impl<'d, T: Instance> BufferedUart<'d, T> {
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pub unsafe fn new(
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state: &'d mut State<'d, T>,
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uart: Uart<'d, T, NoDma, NoDma>,
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_uart: Uart<'d, T, NoDma, NoDma>,
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irq: impl Unborrow<Target = T::Interrupt> + 'd,
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tx_buffer: &'d mut [u8],
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rx_buffer: &'d mut [u8],
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) -> BufferedUart<'d, T> {
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unborrow!(irq);
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let r = uart.inner.regs();
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let r = T::regs();
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r.cr1().modify(|w| {
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w.set_rxneie(true);
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w.set_idleie(true);
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@ -366,7 +476,6 @@ mod buffered {
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Self {
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inner: PeripheralMutex::new_unchecked(irq, &mut state.0, move || StateInner {
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uart,
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phantom: PhantomData,
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tx: RingBuffer::new(tx_buffer),
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tx_waker: WakerRegistration::new(),
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@ -383,7 +492,7 @@ mod buffered {
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Self: 'd,
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{
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fn on_rx(&mut self) {
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let r = self.uart.inner.regs();
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let r = T::regs();
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unsafe {
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let sr = sr(r).read();
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clear_interrupt_flags(r, sr);
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@ -425,7 +534,7 @@ mod buffered {
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}
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fn on_tx(&mut self) {
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let r = self.uart.inner.regs();
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let r = T::regs();
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unsafe {
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if sr(r).read().txe() {
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let buf = self.tx.pop_buf();
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@ -575,7 +684,7 @@ unsafe fn clear_interrupt_flags(r: crate::pac::usart::Usart, sr: regs::Ixr) {
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pub(crate) mod sealed {
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pub trait Instance {
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fn regs(&self) -> crate::pac::usart::Usart;
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fn regs() -> crate::pac::usart::Usart;
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}
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}
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@ -595,7 +704,7 @@ dma_trait!(RxDma, Instance);
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foreach_interrupt!(
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($inst:ident, usart, $block:ident, $signal_name:ident, $irq:ident) => {
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impl sealed::Instance for peripherals::$inst {
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fn regs(&self) -> crate::pac::usart::Usart {
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fn regs() -> crate::pac::usart::Usart {
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crate::pac::$inst
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}
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}
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67
examples/stm32h7/src/bin/usart_split.rs
Normal file
67
examples/stm32h7/src/bin/usart_split.rs
Normal file
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@ -0,0 +1,67 @@
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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#[path = "../example_common.rs"]
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mod example_common;
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use embassy::blocking_mutex::raw::NoopRawMutex;
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use embassy::channel::mpsc::{self, Channel, Sender};
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use embassy::executor::Spawner;
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use embassy::util::Forever;
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use embassy_stm32::dma::NoDma;
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use embassy_stm32::{
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peripherals::{DMA1_CH1, UART7},
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usart::{Config, Uart, UartRx},
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Peripherals,
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};
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use example_common::*;
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#[embassy::task]
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async fn writer(mut usart: Uart<'static, UART7, NoDma, NoDma>) {
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unwrap!(usart.blocking_write(b"Hello Embassy World!\r\n"));
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info!("wrote Hello, starting echo");
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let mut buf = [0u8; 1];
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loop {
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unwrap!(usart.blocking_read(&mut buf));
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unwrap!(usart.blocking_write(&buf));
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}
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}
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static CHANNEL: Forever<Channel<NoopRawMutex, [u8; 8], 1>> = Forever::new();
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#[embassy::main]
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async fn main(spawner: Spawner, p: Peripherals) -> ! {
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info!("Hello World!");
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let config = Config::default();
|
||||
let mut usart = Uart::new(p.UART7, p.PF6, p.PF7, p.DMA1_CH0, p.DMA1_CH1, config);
|
||||
unwrap!(usart.blocking_write(b"Type 8 chars to echo!\r\n"));
|
||||
|
||||
let (mut tx, rx) = usart.split();
|
||||
|
||||
let c = CHANNEL.put(Channel::new());
|
||||
let (s, mut r) = mpsc::split(c);
|
||||
|
||||
unwrap!(spawner.spawn(reader(rx, s)));
|
||||
|
||||
loop {
|
||||
if let Some(buf) = r.recv().await {
|
||||
info!("writing...");
|
||||
unwrap!(tx.write(&buf).await);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#[embassy::task]
|
||||
async fn reader(
|
||||
mut rx: UartRx<'static, UART7, DMA1_CH1>,
|
||||
s: Sender<'static, NoopRawMutex, [u8; 8], 1>,
|
||||
) {
|
||||
let mut buf = [0; 8];
|
||||
loop {
|
||||
info!("reading...");
|
||||
unwrap!(rx.read(&mut buf).await);
|
||||
unwrap!(s.send(buf).await);
|
||||
}
|
||||
}
|
||||
Loading…
Reference in a new issue