stm32/sdmmc: add hil test for f4.
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parent
82dd7a5f8c
commit
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3 changed files with 234 additions and 1 deletions
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@ -6,7 +6,7 @@ license = "MIT OR Apache-2.0"
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[features]
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stm32f103c8 = ["embassy-stm32/stm32f103c8"] # Blue Pill
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stm32f429zi = ["embassy-stm32/stm32f429zi"] # Nucleo
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stm32f429zi = ["embassy-stm32/stm32f429zi", "sdmmc"] # Nucleo
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stm32g071rb = ["embassy-stm32/stm32g071rb"] # Nucleo
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stm32c031c6 = ["embassy-stm32/stm32c031c6"] # Nucleo
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stm32g491re = ["embassy-stm32/stm32g491re"] # Nucleo
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@ -15,6 +15,8 @@ stm32wb55rg = ["embassy-stm32/stm32wb55rg"] # Nucleo
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stm32h563zi = ["embassy-stm32/stm32h563zi"] # Nucleo
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stm32u585ai = ["embassy-stm32/stm32u585ai"] # IoT board
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sdmmc = []
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[dependencies]
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embassy-sync = { version = "0.2.0", path = "../../embassy-sync", features = ["defmt"] }
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embassy-executor = { version = "0.1.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
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@ -31,6 +33,45 @@ embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10" }
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embedded-hal-async = { version = "=0.2.0-alpha.1" }
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panic-probe = { version = "0.3.0", features = ["print-defmt"] }
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# BEGIN TESTS
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# Generated by gen_test.py. DO NOT EDIT.
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[[bin]]
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name = "gpio"
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path = "src/bin/gpio.rs"
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required-features = []
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[[bin]]
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name = "sdmmc"
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path = "src/bin/sdmmc.rs"
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required-features = [ "sdmmc",]
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[[bin]]
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name = "spi"
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path = "src/bin/spi.rs"
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required-features = []
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[[bin]]
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name = "spi_dma"
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path = "src/bin/spi_dma.rs"
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required-features = []
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[[bin]]
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name = "timer"
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path = "src/bin/timer.rs"
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required-features = []
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[[bin]]
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name = "usart"
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path = "src/bin/usart.rs"
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required-features = []
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[[bin]]
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name = "usart_dma"
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path = "src/bin/usart_dma.rs"
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required-features = []
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# END TESTS
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[profile.dev]
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debug = 2
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debug-assertions = true
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44
tests/stm32/gen_test.py
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44
tests/stm32/gen_test.py
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@ -0,0 +1,44 @@
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import os
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import toml
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from glob import glob
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abspath = os.path.abspath(__file__)
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dname = os.path.dirname(abspath)
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os.chdir(dname)
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# ======= load test list
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tests = {}
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for f in sorted(glob('./src/bin/*.rs')):
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name = os.path.splitext(os.path.basename(f))[0]
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features = []
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with open(f, 'r') as f:
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for line in f:
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if line.startswith('// required-features:'):
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features = line.split(':', 2)[1].strip().split(',')
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tests[name] = features
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# ========= Update Cargo.toml
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things = {
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'bin': [
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{
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'name': f'{name}',
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'path': f'src/bin/{name}.rs',
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'required-features': features,
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}
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for name, features in tests.items()
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]
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}
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SEPARATOR_START = '# BEGIN TESTS\n'
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SEPARATOR_END = '# END TESTS\n'
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HELP = '# Generated by gen_test.py. DO NOT EDIT.\n'
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with open('Cargo.toml', 'r') as f:
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data = f.read()
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before, data = data.split(SEPARATOR_START, maxsplit=1)
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_, after = data.split(SEPARATOR_END, maxsplit=1)
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data = before + SEPARATOR_START + HELP + \
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toml.dumps(things) + SEPARATOR_END + after
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with open('Cargo.toml', 'w') as f:
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f.write(data)
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148
tests/stm32/src/bin/sdmmc.rs
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148
tests/stm32/src/bin/sdmmc.rs
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@ -0,0 +1,148 @@
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// required-features: sdmmc
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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use defmt::{assert_eq, *};
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use embassy_executor::Spawner;
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use embassy_stm32::sdmmc::{DataBlock, Sdmmc};
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use embassy_stm32::time::mhz;
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use embassy_stm32::{interrupt, Config};
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use {defmt_rtt as _, panic_probe as _};
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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info!("Hello World!");
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let mut config = Config::default();
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config.rcc.sys_ck = Some(mhz(48));
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config.rcc.pll48 = true;
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let p = embassy_stm32::init(config);
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#[cfg(feature = "stm32f429zi")]
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let (mut sdmmc, mut irq, mut dma, mut clk, mut cmd, mut d0, mut d1, mut d2, mut d3) = (
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p.SDIO,
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interrupt::take!(SDIO),
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p.DMA2_CH3,
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p.PC12,
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p.PD2,
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p.PC8,
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p.PC9,
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p.PC10,
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p.PC11,
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);
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// Arbitrary block index
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let block_idx = 16;
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let mut pattern1 = DataBlock([0u8; 512]);
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let mut pattern2 = DataBlock([0u8; 512]);
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for i in 0..512 {
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pattern1[i] = i as u8;
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pattern2[i] = !i as u8;
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}
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let mut block = DataBlock([0u8; 512]);
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// ======== Try 4bit. ==============
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info!("initializing in 4-bit mode...");
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let mut s = Sdmmc::new_4bit(
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&mut sdmmc,
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&mut irq,
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&mut dma,
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&mut clk,
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&mut cmd,
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&mut d0,
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&mut d1,
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&mut d2,
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&mut d3,
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Default::default(),
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);
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let mut err = None;
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loop {
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match s.init_card(mhz(24)).await {
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Ok(_) => break,
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Err(e) => {
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if err != Some(e) {
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info!("waiting for card: {:?}", e);
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err = Some(e);
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}
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}
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}
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}
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let card = unwrap!(s.card());
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info!("Card: {:#?}", Debug2Format(card));
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info!("Clock: {}", s.clock());
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info!("writing pattern1...");
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s.write_block(block_idx, &pattern1).await.unwrap();
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info!("reading...");
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s.read_block(block_idx, &mut block).await.unwrap();
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assert_eq!(block, pattern1);
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info!("writing pattern2...");
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s.write_block(block_idx, &pattern2).await.unwrap();
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info!("reading...");
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s.read_block(block_idx, &mut block).await.unwrap();
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assert_eq!(block, pattern2);
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drop(s);
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// ======== Try 1bit. ==============
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info!("initializing in 1-bit mode...");
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let mut s = Sdmmc::new_1bit(
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&mut sdmmc,
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&mut irq,
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&mut dma,
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&mut clk,
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&mut cmd,
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&mut d0,
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Default::default(),
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);
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let mut err = None;
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loop {
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match s.init_card(mhz(24)).await {
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Ok(_) => break,
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Err(e) => {
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if err != Some(e) {
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info!("waiting for card: {:?}", e);
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err = Some(e);
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}
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}
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}
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}
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let card = unwrap!(s.card());
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info!("Card: {:#?}", Debug2Format(card));
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info!("Clock: {}", s.clock());
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info!("reading pattern2 written in 4bit mode...");
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s.read_block(block_idx, &mut block).await.unwrap();
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assert_eq!(block, pattern2);
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info!("writing pattern1...");
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s.write_block(block_idx, &pattern1).await.unwrap();
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info!("reading...");
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s.read_block(block_idx, &mut block).await.unwrap();
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assert_eq!(block, pattern1);
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info!("writing pattern2...");
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s.write_block(block_idx, &pattern2).await.unwrap();
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info!("reading...");
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s.read_block(block_idx, &mut block).await.unwrap();
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assert_eq!(block, pattern2);
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drop(s);
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info!("Test OK");
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cortex_m::asm::bkpt();
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}
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