Write bits directly to intenset/clr + shorts
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1 changed files with 18 additions and 147 deletions
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@ -197,27 +197,8 @@ impl<'d, T: Instance> Timer<'d, T> {
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if regs.events_compare[n].read().bits() != 0 {
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// Clear the interrupt, otherwise the interrupt will be repeatedly raised as soon as the interrupt handler exits.
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// We can't clear the event, because it's used to poll whether the future is done or still pending.
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regs.intenclr.write(|w| match n {
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0 => w.compare0().clear(),
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1 => w.compare1().clear(),
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2 => w.compare2().clear(),
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3 => w.compare3().clear(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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4 => w.compare4().clear(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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5 => w.compare5().clear(),
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_ => unreachable!("No timers have more than 6 CC registers"),
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});
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regs.intenclr
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.modify(|r, w| unsafe { w.bits(r.bits() | (1 << (16 + n))) });
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T::waker(n).wake();
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}
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}
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@ -294,52 +275,16 @@ impl<'a, T: Instance> Cc<'a, T> {
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///
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/// So, when the timer's counter reaches the value stored in this register, the timer's counter will be reset to 0.
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pub fn short_compare_clear(&self) {
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T::regs().shorts.write(|w| match self.n {
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0 => w.compare0_clear().enabled(),
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1 => w.compare1_clear().enabled(),
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2 => w.compare2_clear().enabled(),
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3 => w.compare3_clear().enabled(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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4 => w.compare4_clear().enabled(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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5 => w.compare5_clear().enabled(),
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_ => unreachable!("a `Cc` cannot be created with `n > 5`"),
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})
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T::regs()
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.shorts
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.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.n)) })
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}
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/// Disable the shortcut between this CC register's COMPARE event and the timer's CLEAR task.
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pub fn unshort_compare_clear(&self) {
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T::regs().shorts.write(|w| match self.n {
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0 => w.compare0_clear().disabled(),
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1 => w.compare1_clear().disabled(),
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2 => w.compare2_clear().disabled(),
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3 => w.compare3_clear().disabled(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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4 => w.compare4_clear().disabled(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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5 => w.compare5_clear().disabled(),
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_ => unreachable!("a `Cc` cannot be created with `n > 5`"),
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})
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T::regs()
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.shorts
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.modify(|r, w| unsafe { w.bits(r.bits() & (0 << self.n)) })
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}
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/// Enable the shortcut between this CC register's COMPARE event and the timer's STOP task.
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@ -348,52 +293,16 @@ impl<'a, T: Instance> Cc<'a, T> {
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///
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/// So, when the timer's counter reaches the value stored in this register, the timer will stop counting up.
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pub fn short_compare_stop(&self) {
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T::regs().shorts.write(|w| match self.n {
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0 => w.compare0_stop().enabled(),
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1 => w.compare1_stop().enabled(),
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2 => w.compare2_stop().enabled(),
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3 => w.compare3_stop().enabled(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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4 => w.compare4_stop().enabled(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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5 => w.compare5_stop().enabled(),
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_ => unreachable!("a `Cc` cannot be created with `n > 5`"),
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})
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T::regs()
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.shorts
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.modify(|r, w| unsafe { w.bits(r.bits() | (1 << (8 + self.n))) })
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}
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/// Disable the shortcut between this CC register's COMPARE event and the timer's STOP task.
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pub fn unshort_compare_stop(&self) {
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T::regs().shorts.write(|w| match self.n {
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0 => w.compare0_stop().disabled(),
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1 => w.compare1_stop().disabled(),
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2 => w.compare2_stop().disabled(),
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3 => w.compare3_stop().disabled(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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4 => w.compare4_stop().disabled(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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5 => w.compare5_stop().disabled(),
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_ => unreachable!("a `Cc` cannot be created with `n > 5`"),
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})
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T::regs()
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.shorts
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.modify(|r, w| unsafe { w.bits(r.bits() & (0 << (8 + self.n))) })
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}
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/// Wait until the timer's counter reaches the value stored in this register.
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@ -403,51 +312,13 @@ impl<'a, T: Instance> Cc<'a, T> {
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let regs = T::regs();
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// Enable the interrupt for this CC's COMPARE event.
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regs.intenset.write(|w| match self.n {
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0 => w.compare0().set(),
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1 => w.compare1().set(),
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2 => w.compare2().set(),
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3 => w.compare3().set(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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4 => w.compare4().set(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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5 => w.compare5().set(),
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_ => unreachable!("a `Cc` cannot be created with `n > 5`"),
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});
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regs.intenset
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.modify(|r, w| unsafe { w.bits(r.bits() | (1 << (16 + self.n))) });
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// Disable the interrupt if the future is dropped.
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let on_drop = OnDrop::new(|| {
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regs.intenclr.write(|w| match self.n {
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0 => w.compare0().clear(),
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1 => w.compare1().clear(),
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2 => w.compare2().clear(),
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3 => w.compare3().clear(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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4 => w.compare4().clear(),
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#[cfg(any(
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feature = "nrf52805",
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feature = "nrf52811",
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feature = "nrf52820",
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feature = "nrf52833",
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))]
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5 => w.compare5().clear(),
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_ => unreachable!("a `Cc` cannot be created with `n > 5`"),
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});
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regs.intenclr
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.modify(|r, w| unsafe { w.bits(r.bits() | (1 << (16 + self.n))) });
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});
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poll_fn(|cx| {
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