Disable PPI trigger during normal read
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parent
687dda106f
commit
e9eb3ce6c1
1 changed files with 10 additions and 4 deletions
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@ -288,7 +288,7 @@ impl<'d, T: Instance> Write for Uarte<'d, T> {
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pub struct UarteWithIdle<'d, U: Instance, T: TimerInstance> {
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uarte: Uarte<'d, U>,
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timer: T,
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_ppi_ch1: Ppi<'d, AnyConfigurableChannel>,
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ppi_ch1: Ppi<'d, AnyConfigurableChannel>,
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_ppi_ch2: Ppi<'d, AnyConfigurableChannel>,
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}
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@ -355,7 +355,7 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
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Self {
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uarte,
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timer,
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_ppi_ch1: ppi_ch1,
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ppi_ch1: ppi_ch1,
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_ppi_ch2: ppi_ch2,
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}
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}
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@ -410,11 +410,12 @@ impl<'d, U: Instance, T: TimerInstance> ReadUntilIdle for UarteWithIdle<'d, U, T
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.await;
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compiler_fence(Ordering::SeqCst);
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r.events_rxstarted.reset();
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let n = r.rxd.amount.read().amount().bits() as usize;
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// Stop timer
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rt.tasks_stop.write(|w| unsafe { w.bits(1) });
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r.events_rxstarted.reset();
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drop.defuse();
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Ok(n)
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@ -426,7 +427,12 @@ impl<'d, U: Instance, T: TimerInstance> Read for UarteWithIdle<'d, U, T> {
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#[rustfmt::skip]
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type ReadFuture<'a> where Self: 'a = impl Future<Output = Result<(), Error>> + 'a;
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fn read<'a>(&'a mut self, rx_buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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self.uarte.read(rx_buffer)
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async move {
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self.ppi_ch1.disable();
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let result = self.uarte.read(rx_buffer).await;
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self.ppi_ch1.enable();
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result
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}
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}
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}
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