Expose rx_delay in nrf qspi config
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51de518bd3
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1 changed files with 8 additions and 0 deletions
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@ -80,6 +80,8 @@ pub struct Config {
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pub frequency: Frequency,
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/// Value is specified in number of 16 MHz periods (62.5 ns)
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pub sck_delay: u8,
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/// Value is specified in number of 64 MHz periods (15.625 ns), valid values between 0 and 7 (inclusive)
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pub rx_delay: u8,
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/// Whether data is captured on the clock rising edge and data is output on a falling edge (MODE0) or vice-versa (MODE3)
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pub spi_mode: SpiMode,
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/// Addressing mode (24-bit or 32-bit)
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@ -98,6 +100,7 @@ impl Default for Config {
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deep_power_down: None,
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frequency: Frequency::M8,
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sck_delay: 80,
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rx_delay: 2,
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spi_mode: SpiMode::MODE0,
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address_mode: AddressMode::_24BIT,
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capacity: 0,
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@ -202,6 +205,11 @@ impl<'d, T: Instance> Qspi<'d, T> {
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w
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});
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r.iftiming.write(|w| unsafe {
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w.rxdelay().bits(config.rx_delay & 0b111);
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w
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});
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r.xipoffset.write(|w| unsafe {
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w.xipoffset().bits(config.xip_offset);
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w
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